TimeQuest Timing Analyzer report for atari800core
Sat Mar 28 00:21:49 2015
Quartus II 32-bit Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. TimeQuest Timing Analyzer Summary
  3. Parallel Compilation
  4. SDC File List
  5. Clocks
  6. Slow 1200mV 85C Model Fmax Summary
  7. Timing Closure Recommendations
  8. Slow 1200mV 85C Model Setup Summary
  9. Slow 1200mV 85C Model Hold Summary
 10. Slow 1200mV 85C Model Recovery Summary
 11. Slow 1200mV 85C Model Removal Summary
 12. Slow 1200mV 85C Model Minimum Pulse Width Summary
 13. Slow 1200mV 85C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 14. Slow 1200mV 85C Model Setup: 'usb_pll|altpll_component|auto_generated|pll1|clk[0]'
 15. Slow 1200mV 85C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 16. Slow 1200mV 85C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 17. Slow 1200mV 85C Model Hold: 'usb_pll|altpll_component|auto_generated|pll1|clk[0]'
 18. Slow 1200mV 85C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 19. Slow 1200mV 85C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 20. Slow 1200mV 85C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 21. Slow 1200mV 85C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 22. Slow 1200mV 85C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 23. Slow 1200mV 85C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 24. Slow 1200mV 85C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 25. Slow 1200mV 85C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 26. Slow 1200mV 85C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 27. Slow 1200mV 85C Model Minimum Pulse Width: 'usb_pll|altpll_component|auto_generated|pll1|clk[0]'
 28. Slow 1200mV 85C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 29. Slow 1200mV 85C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0]'
 30. Slow 1200mV 85C Model Minimum Pulse Width: 'FPGA_CLK'
 31. Setup Times
 32. Hold Times
 33. Clock to Output Times
 34. Minimum Clock to Output Times
 35. Output Enable Times
 36. Minimum Output Enable Times
 37. Output Disable Times
 38. Minimum Output Disable Times
 39. Slow 1200mV 85C Model Metastability Report
 40. Slow 1200mV 0C Model Fmax Summary
 41. Slow 1200mV 0C Model Setup Summary
 42. Slow 1200mV 0C Model Hold Summary
 43. Slow 1200mV 0C Model Recovery Summary
 44. Slow 1200mV 0C Model Removal Summary
 45. Slow 1200mV 0C Model Minimum Pulse Width Summary
 46. Slow 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 47. Slow 1200mV 0C Model Setup: 'usb_pll|altpll_component|auto_generated|pll1|clk[0]'
 48. Slow 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 49. Slow 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 50. Slow 1200mV 0C Model Hold: 'usb_pll|altpll_component|auto_generated|pll1|clk[0]'
 51. Slow 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 52. Slow 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 53. Slow 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 54. Slow 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 55. Slow 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 56. Slow 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 57. Slow 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 58. Slow 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 59. Slow 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 60. Slow 1200mV 0C Model Minimum Pulse Width: 'usb_pll|altpll_component|auto_generated|pll1|clk[0]'
 61. Slow 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 62. Slow 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0]'
 63. Slow 1200mV 0C Model Minimum Pulse Width: 'FPGA_CLK'
 64. Setup Times
 65. Hold Times
 66. Clock to Output Times
 67. Minimum Clock to Output Times
 68. Output Enable Times
 69. Minimum Output Enable Times
 70. Output Disable Times
 71. Minimum Output Disable Times
 72. Slow 1200mV 0C Model Metastability Report
 73. Fast 1200mV 0C Model Setup Summary
 74. Fast 1200mV 0C Model Hold Summary
 75. Fast 1200mV 0C Model Recovery Summary
 76. Fast 1200mV 0C Model Removal Summary
 77. Fast 1200mV 0C Model Minimum Pulse Width Summary
 78. Fast 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 79. Fast 1200mV 0C Model Setup: 'usb_pll|altpll_component|auto_generated|pll1|clk[0]'
 80. Fast 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 81. Fast 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 82. Fast 1200mV 0C Model Hold: 'usb_pll|altpll_component|auto_generated|pll1|clk[0]'
 83. Fast 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 84. Fast 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 85. Fast 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 86. Fast 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 87. Fast 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 88. Fast 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 89. Fast 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 90. Fast 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 91. Fast 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 92. Fast 1200mV 0C Model Minimum Pulse Width: 'usb_pll|altpll_component|auto_generated|pll1|clk[0]'
 93. Fast 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 94. Fast 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0]'
 95. Fast 1200mV 0C Model Minimum Pulse Width: 'FPGA_CLK'
 96. Setup Times
 97. Hold Times
 98. Clock to Output Times
 99. Minimum Clock to Output Times
100. Output Enable Times
101. Minimum Output Enable Times
102. Output Disable Times
103. Minimum Output Disable Times
104. Fast 1200mV 0C Model Metastability Report
105. Multicorner Timing Analysis Summary
106. Setup Times
107. Hold Times
108. Clock to Output Times
109. Minimum Clock to Output Times
110. Board Trace Model Assignments
111. Input Transition Times
112. Signal Integrity Metrics (Slow 1200mv 0c Model)
113. Signal Integrity Metrics (Slow 1200mv 85c Model)
114. Signal Integrity Metrics (Fast 1200mv 0c Model)
115. Setup Transfers
116. Hold Transfers
117. Recovery Transfers
118. Removal Transfers
119. Report TCCS
120. Report RSKM
121. Unconstrained Paths
122. TimeQuest Timing Analyzer Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2013 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
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(including device programming or simulation files), and any 
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Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+----------------------------------------------------------------------------------------+
; TimeQuest Timing Analyzer Summary                                                      ;
+--------------------+-------------------------------------------------------------------+
; Quartus II Version ; Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition ;
; Revision Name      ; atari800core                                                      ;
; Device Family      ; Cyclone IV E                                                      ;
; Device Name        ; EP4CE15E22C7                                                      ;
; Timing Models      ; Final                                                             ;
; Delay Model        ; Combined                                                          ;
; Rise/Fall Delays   ; Enabled                                                           ;
+--------------------+-------------------------------------------------------------------+


+------------------------------------------+
; Parallel Compilation                     ;
+----------------------------+-------------+
; Processors                 ; Number      ;
+----------------------------+-------------+
; Number detected on machine ; 4           ;
; Maximum allowed            ; 2           ;
;                            ;             ;
; Average used               ; 1.19        ;
; Maximum used               ; 2           ;
;                            ;             ;
; Usage by Processor         ; % Time Used ;
;     Processor 1            ; 100.0%      ;
;     Processor 2            ;  18.8%      ;
;     Processors 3-4         ;   0.0%      ;
+----------------------------+-------------+


+------------------------------------------------------+
; SDC File List                                        ;
+------------------+--------+--------------------------+
; SDC File Path    ; Status ; Read at                  ;
+------------------+--------+--------------------------+
; atari800core.sdc ; OK     ; Sat Mar 28 00:21:34 2015 ;
+------------------+--------+--------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clocks                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  ;
+--------------------------------------------------------------------------------+-----------+---------+------------+-------+---------+------------+-----------+-------------+-------+--------+-----------+------------+----------+-------------------------------------------------------------------------------+----------------------------------------------------------------------------------+------------------------------------------------------------------------------------+
; Clock Name                                                                     ; Type      ; Period  ; Frequency  ; Rise  ; Fall    ; Duty Cycle ; Divide by ; Multiply by ; Phase ; Offset ; Edge List ; Edge Shift ; Inverted ; Master                                                                        ; Source                                                                           ; Targets                                                                            ;
+--------------------------------------------------------------------------------+-----------+---------+------------+-------+---------+------------+-----------+-------------+-------+--------+-----------+------------+----------+-------------------------------------------------------------------------------+----------------------------------------------------------------------------------+------------------------------------------------------------------------------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Generated ; 11.640  ; 85.91 MHz  ; 0.000 ; 5.820   ; 50.00      ; 1         ; 3           ;       ;        ;           ;            ; false    ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0] ; { \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] } ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Generated ; 34.920  ; 28.64 MHz  ; 0.000 ; 17.460  ; 50.00      ; 1         ; 1           ;       ;        ;           ;            ; false    ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0] ; { \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] } ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ; Generated ; 11.640  ; 85.91 MHz  ; 7.638 ; 13.458  ; 50.00      ; 1         ; 3           ; 236.2 ;        ;           ;            ; false    ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0] ; { \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] } ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Generated ; 8.730   ; 114.55 MHz ; 0.000 ; 4.365   ; 50.00      ; 1         ; 4           ;       ;        ;           ;            ; false    ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0] ; { \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] } ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0]  ; Generated ; 34.920  ; 28.64 MHz  ; 0.000 ; 17.460  ; 50.00      ; 11        ; 63          ;       ;        ;           ;            ; false    ; FPGA_CLK                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|inclk[0]  ; { \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] }  ;
; FPGA_CLK                                                                       ; Base      ; 200.000 ; 5.0 MHz    ; 0.000 ; 100.000 ;            ;           ;             ;       ;        ;           ;            ;          ;                                                                               ;                                                                                  ; { FPGA_CLK }                                                                       ;
; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; Generated ; 20.833  ; 48.0 MHz   ; 0.000 ; 10.416  ; 50.00      ; 5         ; 48          ;       ;        ;           ;            ; false    ; FPGA_CLK                                                                      ; usb_pll|altpll_component|auto_generated|pll1|inclk[0]                            ; { usb_pll|altpll_component|auto_generated|pll1|clk[0] }                            ;
+--------------------------------------------------------------------------------+-----------+---------+------------+-------+---------+------------+-----------+-------------+-------+--------+-----------+------------+----------+-------------------------------------------------------------------------------+----------------------------------------------------------------------------------+------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Fmax Summary                                                                                   ;
+------------+-----------------+--------------------------------------------------------------------------------+------+
; Fmax       ; Restricted Fmax ; Clock Name                                                                     ; Note ;
+------------+-----------------+--------------------------------------------------------------------------------+------+
; 35.03 MHz  ; 35.03 MHz       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;      ;
; 110.35 MHz ; 110.35 MHz      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;      ;
; 137.53 MHz ; 137.53 MHz      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;      ;
; 217.01 MHz ; 217.01 MHz      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;      ;
+------------+-----------------+--------------------------------------------------------------------------------+------+
This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods.  FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock.  Paths of different clocks, including generated clocks, are ignored.  For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.


----------------------------------
; Timing Closure Recommendations ;
----------------------------------
HTML report is unavailable in plain text report export.


+---------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup Summary                                                                     ;
+--------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                          ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; -3.272 ; -249.755      ;
; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; -0.327 ; -10.761       ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.485  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 4.122  ; 0.000         ;
+--------------------------------------------------------------------------------+--------+---------------+


+---------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold Summary                                                                      ;
+--------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                          ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------------------+--------+---------------+
; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; -1.680 ; -122.432      ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.352  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.412  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.439  ; 0.000         ;
+--------------------------------------------------------------------------------+--------+---------------+


+--------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery Summary                                                                 ;
+--------------------------------------------------------------------------------+-------+---------------+
; Clock                                                                          ; Slack ; End Point TNS ;
+--------------------------------------------------------------------------------+-------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 5.454 ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 7.995 ; 0.000         ;
+--------------------------------------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal Summary                                                                  ;
+--------------------------------------------------------------------------------+-------+---------------+
; Clock                                                                          ; Slack ; End Point TNS ;
+--------------------------------------------------------------------------------+-------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 1.444 ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 1.889 ; 0.000         ;
+--------------------------------------------------------------------------------+-------+---------------+


+---------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width Summary                                                       ;
+--------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                          ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 4.090  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.544  ; 0.000         ;
; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; 10.144 ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.099 ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0]  ; 17.433 ; 0.000         ;
; FPGA_CLK                                                                       ; 99.796 ; 0.000         ;
+--------------------------------------------------------------------------------+--------+---------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                               ;
+--------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                                                                                                                          ; To Node                                                                                                                                                                                            ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+--------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; -3.272 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RxPID[0]                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPIDInSTB_reg1[0]        ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -2.379     ; 0.934      ;
; -3.127 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|resumeIntInExtend[0]      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|resumeIntInSTB[2]         ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -2.379     ; 0.789      ;
; -3.113 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[15]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[15]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.973     ; 1.181      ;
; -3.103 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[8]                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[8]       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -2.011     ; 1.133      ;
; -3.082 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[10]                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[10]    ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.973     ; 1.150      ;
; -3.079 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[10]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[10]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.973     ; 1.147      ;
; -3.067 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[5]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[5]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.973     ; 1.135      ;
; -3.052 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[0]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[0]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.973     ; 1.120      ;
; -3.038 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[8]                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[8]       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.945     ; 1.134      ;
; -2.970 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[12]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[12]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -2.011     ; 1.000      ;
; -2.961 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[0]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[0]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -2.004     ; 0.998      ;
; -2.942 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[11]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[11]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -2.011     ; 0.972      ;
; -2.942 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[9]                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[9]       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -2.011     ; 0.972      ;
; -2.941 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[13]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[13]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.973     ; 1.009      ;
; -2.940 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[6]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[6]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -2.004     ; 0.977      ;
; -2.939 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[4]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[4]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -2.004     ; 0.976      ;
; -2.935 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[3]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[3]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.999     ; 0.977      ;
; -2.933 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[0]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[0]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.999     ; 0.975      ;
; -2.918 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[9]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[9]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.973     ; 0.986      ;
; -2.915 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[14]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[14]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.973     ; 0.983      ;
; -2.910 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[4]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[4]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.973     ; 0.978      ;
; -2.910 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[1]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[1]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.973     ; 0.978      ;
; -2.904 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[10]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[10]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.945     ; 1.000      ;
; -2.903 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RxPID[3]                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPIDInSTB_reg1[3]        ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.973     ; 0.971      ;
; -2.900 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RxPID[2]                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPIDInSTB_reg1[2]        ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.973     ; 0.968      ;
; -2.899 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RxPID[1]                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPIDInSTB_reg1[1]        ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.973     ; 0.967      ;
; -2.896 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[2]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[2]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.962     ; 0.975      ;
; -2.896 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIEReceiver:u_SIEReceiver|connectState[0] ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connectStateInSTB_reg1[0] ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.946     ; 0.991      ;
; -2.893 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[8]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[8]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.973     ; 0.961      ;
; -2.890 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RxPID[3]                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPIDInSTB_reg1[3]        ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.963     ; 0.968      ;
; -2.874 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|resumeIntInExtend[0]      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|resumeIntInSTB[2]         ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.963     ; 0.952      ;
; -2.871 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[11]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[11]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.945     ; 0.967      ;
; -2.869 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RxPID[2]                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPIDInSTB_reg1[2]        ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.963     ; 0.947      ;
; -2.869 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[8]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[8]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.933     ; 0.977      ;
; -2.867 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RxPID[0]                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPIDInSTB_reg1[0]        ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.963     ; 0.945      ;
; -2.852 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSentInExtend[0]        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSentInSTB[2]           ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.963     ; 0.930      ;
; -2.794 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[4]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[4]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.999     ; 0.836      ;
; -2.790 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|bitStuffError                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[1]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -2.016     ; 0.815      ;
; -2.789 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[5]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[5]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -2.004     ; 0.826      ;
; -2.788 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|CRCError                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[0]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -2.016     ; 0.813      ;
; -2.787 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RXTimeOut                               ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[3]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -2.016     ; 0.812      ;
; -2.784 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIEReceiver:u_SIEReceiver|connectState[1] ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connectStateInSTB_reg1[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -2.011     ; 0.814      ;
; -2.783 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[6]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[6]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.999     ; 0.825      ;
; -2.783 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIEReceiver:u_SIEReceiver|connectState[0] ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connectStateInSTB_reg1[0] ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -2.011     ; 0.813      ;
; -2.780 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIEReceiver:u_SIEReceiver|connectState[1] ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connectStateInSTB_reg1[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -2.007     ; 0.814      ;
; -2.777 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[2]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[2]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -2.004     ; 0.814      ;
; -2.777 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[3]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[3]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -2.004     ; 0.814      ;
; -2.776 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[1]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[1]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -2.004     ; 0.813      ;
; -2.772 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RXOverflow                              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[2]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.997     ; 0.816      ;
; -2.772 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|bitStuffError                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[1]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.999     ; 0.814      ;
; -2.771 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RXTimeOut                               ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[3]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.999     ; 0.813      ;
; -2.771 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[5]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[5]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.999     ; 0.813      ;
; -2.770 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[1]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[1]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.999     ; 0.812      ;
; -2.770 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[2]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[2]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.999     ; 0.812      ;
; -2.770 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|CRCError                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[0]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.999     ; 0.812      ;
; -2.769 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|NAKRxed                                 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[4]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.997     ; 0.813      ;
; -2.769 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|stallRxed                               ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[5]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.997     ; 0.813      ;
; -2.766 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|dataSequence                            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[7]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -2.016     ; 0.791      ;
; -2.765 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[9]                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[9]       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.970     ; 0.836      ;
; -2.761 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RXOverflow                              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[2]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.989     ; 0.813      ;
; -2.760 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|NAKRxed                                 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[4]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.989     ; 0.812      ;
; -2.760 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|stallRxed                               ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[5]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.989     ; 0.812      ;
; -2.755 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSentInExtend[0]        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSentInSTB[2]           ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -2.007     ; 0.789      ;
; -2.755 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connEventInExtend[0]      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connEventInSTB[2]         ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -2.007     ; 0.789      ;
; -2.754 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|clrTransReqExtend[0]      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|clrTransReqSTB[2]         ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -2.007     ; 0.788      ;
; -2.748 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|ACKRxed                                 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[6]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.999     ; 0.790      ;
; -2.747 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|dataSequence                            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[7]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.999     ; 0.789      ;
; -2.746 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[3]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[3]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.973     ; 0.814      ;
; -2.746 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[7]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[7]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.973     ; 0.814      ;
; -2.746 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[6]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[6]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.973     ; 0.814      ;
; -2.745 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[14]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[14]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.970     ; 0.816      ;
; -2.744 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[2]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[2]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.973     ; 0.812      ;
; -2.743 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[15]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[15]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.970     ; 0.814      ;
; -2.742 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[12]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[12]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.970     ; 0.813      ;
; -2.742 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[13]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[13]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.970     ; 0.813      ;
; -2.739 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|ACKRxed                                 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[6]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.989     ; 0.791      ;
; -2.736 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[6]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[6]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.963     ; 0.814      ;
; -2.736 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[10]                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[10]    ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.963     ; 0.814      ;
; -2.736 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RxPID[1]                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPIDInSTB_reg1[1]        ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.987     ; 0.790      ;
; -2.735 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[5]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[5]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.963     ; 0.813      ;
; -2.735 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[0]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[0]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.963     ; 0.813      ;
; -2.734 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[4]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[4]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.963     ; 0.812      ;
; -2.722 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|clrTransReqExtend[0]      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|clrTransReqSTB[2]         ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.973     ; 0.790      ;
; -2.720 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connEventInExtend[0]      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connEventInSTB[2]         ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.972     ; 0.789      ;
; -2.708 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[9]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[9]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.933     ; 0.816      ;
; -2.706 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[7]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[7]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.933     ; 0.814      ;
; -2.705 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[3]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[3]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.933     ; 0.813      ;
; -2.704 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[1]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[1]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.933     ; 0.812      ;
; 3.167  ; sdram_request_complete_reg                                                                                                                                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|pokey_noise_filter:pokey_noise_filter1|out_reg                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.183     ; 8.288      ;
; 3.188  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                                                                   ; SDRAM_ADDR[19]                                                                                                                                                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.460       ; -0.090     ; 14.180     ;
; 3.206  ; ram_do_reg[6]                                                                                                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.159     ; 8.273      ;
; 3.211  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg                                                  ; SDRAM_ADDR[19]                                                                                                                                                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.460       ; -0.088     ; 14.159     ;
; 3.238  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                                                                 ; SDRAM_ADDR[19]                                                                                                                                                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.460       ; -0.097     ; 14.123     ;
; 3.260  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                                                                   ; SDRAM_ADDR[14]                                                                                                                                                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.460       ; -0.093     ; 14.105     ;
; 3.283  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg                                                  ; SDRAM_ADDR[14]                                                                                                                                                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.460       ; -0.091     ; 14.084     ;
; 3.305  ; sdram_reset_n_reg                                                                                                                                                                                  ; SDRAM_ADDR[19]                                                                                                                                                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.460       ; -0.093     ; 14.060     ;
; 3.310  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                                                                 ; SDRAM_ADDR[14]                                                                                                                                                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.460       ; -0.100     ; 14.048     ;
; 3.323  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                                                                   ; SDRAM_ADDR[17]                                                                                                                                                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.460       ; -0.094     ; 14.041     ;
; 3.344  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                                                                   ; SDRAM_ADDR[15]                                                                                                                                                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.460       ; -0.087     ; 14.027     ;
; 3.346  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg                                                  ; SDRAM_ADDR[17]                                                                                                                                                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.460       ; -0.092     ; 14.020     ;
+--------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: 'usb_pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                         ;
+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                                                                                                                                       ; To Node                                                                                                                                                                                                         ; Launch Clock                                                                   ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; -0.327 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[4]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[4]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.548      ;
; -0.319 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[1]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[1]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.540      ;
; -0.316 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[5]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[5]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.170      ; 1.525      ;
; -0.307 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[4]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[4]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.170      ; 1.516      ;
; -0.297 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[2]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[2]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.170      ; 1.506      ;
; -0.289 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[2]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[2]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.510      ;
; -0.288 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[0]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineState_reg1[0]                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.509      ;
; -0.285 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[6]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[6]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.170      ; 1.494      ;
; -0.234 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[1]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[1]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.170      ; 1.443      ;
; -0.222 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[0]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[0]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.194      ; 1.455      ;
; -0.214 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[0]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[0]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.170      ; 1.423      ;
; -0.197 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[2]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[2]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.170      ; 1.406      ;
; -0.177 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[3]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[3]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.398      ;
; -0.173 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[2]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[2]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.394      ;
; -0.167 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[6]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[6]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.170      ; 1.376      ;
; -0.165 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[3]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[3]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.170      ; 1.374      ;
; -0.165 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[5]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[5]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.386      ;
; -0.163 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[2]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[2]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.384      ;
; -0.158 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|RxfifoBI:u_RxfifoBI|forceEmptyToggle                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|RxfifoBI:u_RxfifoBI|forceEmptyToggleSyncToUsbClk[0]                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.170      ; 1.367      ;
; -0.152 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|preambleEnSTB                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|preambleEn_reg1                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.171      ; 1.362      ;
; -0.150 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSyncSTB                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSync_reg1                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.171      ; 1.360      ;
; -0.146 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxSOFEnableRegSTB                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxSOFEnableReg_reg1                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.367      ;
; -0.146 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|isoEnSTB                               ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|isoEn_reg1                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.171      ; 1.356      ;
; -0.145 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[3]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[3]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.366      ;
; -0.141 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[3]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[3]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.170      ; 1.350      ;
; -0.141 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[3]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[3]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.362      ;
; -0.135 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[4]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[4]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.170      ; 1.344      ;
; -0.134 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[5]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[5]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.355      ;
; -0.132 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[3]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[3]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.181      ; 1.352      ;
; -0.132 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSyncSTB                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSync_reg1                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.353      ;
; -0.132 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeRegSTB[0]                   ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeReg_reg1[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.181      ; 1.352      ;
; -0.130 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[2]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|LineDirectControlEn_reg1               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.171      ; 1.340      ;
; -0.129 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[2]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[2]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.181      ; 1.349      ;
; -0.128 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[3]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[3]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.171      ; 1.338      ;
; -0.127 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[6]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[6]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.348      ;
; -0.127 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[2]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[2]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.181      ; 1.347      ;
; -0.122 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[1]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[1]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.181      ; 1.342      ;
; -0.121 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[0]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[0]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.342      ;
; -0.117 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[0]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[0]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.338      ;
; -0.116 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|transReqSTB                            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|transReq_reg1                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.181      ; 1.336      ;
; -0.116 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[1]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[1]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.337      ;
; -0.116 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[6]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[6]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.181      ; 1.336      ;
; -0.113 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[6]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[6]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.334      ;
; -0.113 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[4]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[4]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.334      ;
; -0.110 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[2]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[2]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.171      ; 1.320      ;
; -0.109 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[0]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[0]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.181      ; 1.329      ;
; -0.108 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeRegSTB[1]                   ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeReg_reg1[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.171      ; 1.318      ;
; -0.108 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[6]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[6]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.170      ; 1.317      ;
; -0.106 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[4]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[4]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.170      ; 1.315      ;
; -0.106 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeRegSTB[1]                   ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeReg_reg1[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.327      ;
; -0.106 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[1]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineState_reg1[1]                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.171      ; 1.316      ;
; -0.105 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[5]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[5]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.170      ; 1.314      ;
; -0.104 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|preambleEnSTB                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|preambleEn_reg1                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.325      ;
; -0.103 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[1]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[1]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.170      ; 1.312      ;
; -0.100 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeRegSTB[0]                   ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeReg_reg1[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.171      ; 1.310      ;
; -0.097 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[0]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[0]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.170      ; 1.306      ;
; -0.096 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[5]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[5]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.170      ; 1.305      ;
; -0.093 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[3]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[3]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.181      ; 1.313      ;
; -0.091 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxSOFEnableRegSTB                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxSOFEnableReg_reg1                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.312      ;
; -0.091 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|hostSlaveMuxBI:u_hostSlaveMuxBI|rstShift[0]                                                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|hostSlaveMuxBI:u_hostSlaveMuxBI|rstSyncToUsbClkFirst                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.312      ;
; -0.091 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[3]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|fullSpeedPol_reg1                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.171      ; 1.301      ;
; -0.089 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[3]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|fullSpeedPol_reg1                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.310      ;
; -0.086 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggle                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggleSyncToUsbClk[0]                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.170      ; 1.295      ;
; -0.085 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|isoEnSTB                               ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|isoEn_reg1                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.306      ;
; -0.085 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[1]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineState_reg1[1]                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.306      ;
; -0.084 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[0]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineState_reg1[0]                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.305      ;
; -0.084 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[4]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|fullSpeedRate_reg1                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.171      ; 1.294      ;
; -0.084 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[0]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[0]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.181      ; 1.304      ;
; -0.083 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[4]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|fullSpeedRate_reg1                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.304      ;
; -0.083 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[0]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[0]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.304      ;
; -0.078 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[2]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|LineDirectControlEn_reg1               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.299      ;
; -0.078 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[4]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[4]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.181      ; 1.298      ;
; -0.074 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[5]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[5]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.181      ; 1.294      ;
; -0.072 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[1]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[1]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.293      ;
; -0.068 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|hostSlaveMuxBI:u_hostSlaveMuxBI|rstShift[0]                                                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|hostSlaveMuxBI:u_hostSlaveMuxBI|rstSyncToUsbClkFirst                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.289      ;
; -0.068 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|transReqSTB                            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|transReq_reg1                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.181      ; 1.288      ;
; -0.057 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggle                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggleSyncToUsbClk[0]                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.278      ;
; -0.055 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|RxfifoBI:u_RxfifoBI|forceEmptyToggle                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|RxfifoBI:u_RxfifoBI|forceEmptyToggleSyncToUsbClk[0]                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.182      ; 1.276      ;
; 0.007  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[1]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[1]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.170      ; 1.202      ;
; 0.019  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[1]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[1]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.181      ; 1.201      ;
; 11.771 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[1]                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.101                              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.479     ; 8.581      ;
; 11.783 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[0]                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.101                              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.479     ; 8.569      ;
; 12.085 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[1]                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.011                              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.479     ; 8.267      ;
; 12.096 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[0]                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.011                              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.479     ; 8.256      ;
; 12.108 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[1]                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.110                              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.479     ; 8.244      ;
; 12.108 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[1]                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.001                              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.479     ; 8.244      ;
; 12.120 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[0]                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.110                              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.479     ; 8.232      ;
; 12.120 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[0]                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.001                              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.479     ; 8.232      ;
; 12.154 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.100101 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.101101 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.073     ; 8.604      ;
; 12.154 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.100101 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.011011 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.073     ; 8.604      ;
; 12.154 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.100101 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.011100 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.073     ; 8.604      ;
; 12.154 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.100101 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.101000 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.073     ; 8.604      ;
; 12.202 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.101001 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.101101 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.081     ; 8.548      ;
; 12.202 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.101001 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.011100 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.081     ; 8.548      ;
; 12.202 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.101001 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.101000 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.081     ; 8.548      ;
; 12.202 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.101001 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.011011 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.081     ; 8.548      ;
; 12.306 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[2]                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.101                              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.059     ; 8.466      ;
; 12.312 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.101001 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.101001 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.069     ; 8.450      ;
; 12.346 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|HCTxPortWEn                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.101101 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.067     ; 8.418      ;
; 12.346 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|HCTxPortWEn                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.011011 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.067     ; 8.418      ;
+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                         ;
+-------+-------------------------+----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node               ; To Node                                                  ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------+----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.485 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.188     ; 5.030      ;
; 0.616 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.188     ; 4.899      ;
; 0.641 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.190     ; 4.872      ;
; 0.671 ; SDRAM_ADDR[15]          ; sdram_ctrl:sdram_controller|r_sdram_addr[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.185     ; 4.847      ;
; 0.772 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.190     ; 4.741      ;
; 0.901 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.176     ; 4.626      ;
; 0.966 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.188     ; 4.549      ;
; 1.032 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.176     ; 4.495      ;
; 1.033 ; SDRAM_ADDR[17]          ; sdram_ctrl:sdram_controller|r_sdram_addr[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.179     ; 4.491      ;
; 1.039 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.191     ; 4.473      ;
; 1.097 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.188     ; 4.418      ;
; 1.170 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.191     ; 4.342      ;
; 1.179 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.176     ; 4.348      ;
; 1.199 ; SDRAM_ADDR[5]           ; sdram_ctrl:sdram_controller|r_sdram_addr[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.185     ; 4.319      ;
; 1.310 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.176     ; 4.217      ;
; 1.394 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_ras_n                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.177     ; 4.132      ;
; 1.423 ; SDRAM_ADDR[14]          ; sdram_ctrl:sdram_controller|r_sdram_addr[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.166     ; 4.114      ;
; 1.428 ; SDRAM_ADDR[6]           ; sdram_ctrl:sdram_controller|r_sdram_addr[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.185     ; 4.090      ;
; 1.447 ; SDRAM_ADDR[18]          ; sdram_ctrl:sdram_controller|r_sdram_addr[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.184     ; 4.072      ;
; 1.455 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.189     ; 4.059      ;
; 1.478 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[11]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.189     ; 4.036      ;
; 1.520 ; SDRAM_ADDR[3]           ; sdram_ctrl:sdram_controller|r_sdram_addr[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.170     ; 4.013      ;
; 1.528 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_ras_n                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.177     ; 3.998      ;
; 1.586 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.189     ; 3.928      ;
; 1.609 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[11]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.189     ; 3.905      ;
; 1.720 ; SDRAM_ADDR[20]          ; sdram_ctrl:sdram_controller|r_sdram_addr[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.182     ; 3.801      ;
; 1.721 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.191     ; 3.791      ;
; 1.727 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[10]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.179     ; 3.797      ;
; 1.741 ; SDRAM_ADDR[16]          ; sdram_ctrl:sdram_controller|r_sdram_addr[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.178     ; 3.784      ;
; 1.760 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.179     ; 3.764      ;
; 1.800 ; SDRAM_ADDR[13]          ; sdram_ctrl:sdram_controller|r_sdram_addr[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.173     ; 3.730      ;
; 1.852 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.191     ; 3.660      ;
; 1.858 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[10]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.179     ; 3.666      ;
; 1.868 ; SDRAM_ADDR[22]          ; sdram_ctrl:sdram_controller|r_sdram_addr[11]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.179     ; 3.656      ;
; 1.891 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.179     ; 3.633      ;
; 1.981 ; SDRAM_ADDR[8]           ; sdram_ctrl:sdram_controller|r_sdram_addr[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.186     ; 3.536      ;
; 1.984 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.179     ; 3.540      ;
; 1.985 ; SDRAM_ADDR[19]          ; sdram_ctrl:sdram_controller|r_sdram_addr[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.184     ; 3.534      ;
; 2.032 ; SDRAM_ADDR[7]           ; sdram_ctrl:sdram_controller|r_sdram_addr[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.187     ; 3.484      ;
; 2.055 ; SDRAM_READ_ENABLE       ; ram_do_reg[27]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.183     ; 3.580      ;
; 2.055 ; SDRAM_READ_ENABLE       ; ram_do_reg[24]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.183     ; 3.580      ;
; 2.055 ; SDRAM_READ_ENABLE       ; ram_do_reg[19]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.183     ; 3.580      ;
; 2.055 ; SDRAM_READ_ENABLE       ; ram_do_reg[16]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.183     ; 3.580      ;
; 2.055 ; SDRAM_READ_ENABLE       ; ram_do_reg[17]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.183     ; 3.580      ;
; 2.055 ; SDRAM_READ_ENABLE       ; ram_do_reg[23]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.183     ; 3.580      ;
; 2.055 ; SDRAM_READ_ENABLE       ; ram_do_reg[31]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.183     ; 3.580      ;
; 2.055 ; SDRAM_READ_ENABLE       ; ram_do_reg[25]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.183     ; 3.580      ;
; 2.077 ; SDRAM_ADDR[4]           ; sdram_ctrl:sdram_controller|r_sdram_addr[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.165     ; 3.461      ;
; 2.115 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.179     ; 3.409      ;
; 2.209 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[14]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.156     ; 3.453      ;
; 2.210 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[5]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.156     ; 3.452      ;
; 2.210 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[8]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.156     ; 3.452      ;
; 2.291 ; SDRAM_ADDR[2]           ; sdram_ctrl:sdram_controller|r_sdram_addr[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.169     ; 3.243      ;
; 2.300 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_ba[0]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.179     ; 3.224      ;
; 2.300 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_ba[1]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.179     ; 3.224      ;
; 2.355 ; SDRAM_READ_ENABLE       ; ram_do_reg[28]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.184     ; 3.279      ;
; 2.355 ; SDRAM_READ_ENABLE       ; ram_do_reg[26]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.184     ; 3.279      ;
; 2.355 ; SDRAM_READ_ENABLE       ; ram_do_reg[30]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.184     ; 3.279      ;
; 2.355 ; SDRAM_READ_ENABLE       ; ram_do_reg[20]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.184     ; 3.279      ;
; 2.355 ; SDRAM_READ_ENABLE       ; ram_do_reg[18]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.184     ; 3.279      ;
; 2.355 ; SDRAM_READ_ENABLE       ; ram_do_reg[22]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.184     ; 3.279      ;
; 2.357 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[1]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.156     ; 3.305      ;
; 2.357 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[10]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.156     ; 3.305      ;
; 2.357 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[13]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.156     ; 3.305      ;
; 2.358 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[0]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.156     ; 3.304      ;
; 2.358 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[6]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.156     ; 3.304      ;
; 2.358 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[9]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.156     ; 3.304      ;
; 2.359 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[2]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.156     ; 3.303      ;
; 2.387 ; SDRAM_ADDR[11]          ; sdram_ctrl:sdram_controller|r_sdram_addr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.172     ; 3.144      ;
; 2.392 ; SDRAM_ADDR[21]          ; sdram_ctrl:sdram_controller|r_sdram_addr[10]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.172     ; 3.139      ;
; 2.416 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[0]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.168     ; 3.234      ;
; 2.431 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_ba[0]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.179     ; 3.093      ;
; 2.431 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_ba[1]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.179     ; 3.093      ;
; 2.482 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[7]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.159     ; 3.177      ;
; 2.489 ; SDRAM_READ_ENABLE       ; ram_do_reg[3]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.189     ; 3.140      ;
; 2.489 ; SDRAM_READ_ENABLE       ; ram_do_reg[2]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.189     ; 3.140      ;
; 2.492 ; SDRAM_READ_ENABLE       ; ram_do_reg[29]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.160     ; 3.166      ;
; 2.496 ; SDRAM_ADDR[1]           ; sdram_ctrl:sdram_controller|r_sdram_addr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.169     ; 3.038      ;
; 2.510 ; SDRAM_WIDTH_8BIT_ACCESS ; ram_di_reg[11]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.152     ; 3.156      ;
; 2.511 ; SDRAM_WIDTH_8BIT_ACCESS ; ram_di_reg[3]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.152     ; 3.155      ;
; 2.511 ; SDRAM_WIDTH_8BIT_ACCESS ; ram_di_reg[7]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.152     ; 3.155      ;
; 2.512 ; SDRAM_WIDTH_8BIT_ACCESS ; ram_di_reg[4]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.152     ; 3.154      ;
; 2.513 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[3]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.159     ; 3.146      ;
; 2.513 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[11]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.159     ; 3.146      ;
; 2.514 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[4]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.159     ; 3.145      ;
; 2.515 ; SDRAM_READ_ENABLE       ; ram_do_reg[1]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.183     ; 3.120      ;
; 2.515 ; SDRAM_READ_ENABLE       ; ram_do_reg[0]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.183     ; 3.120      ;
; 2.515 ; SDRAM_READ_ENABLE       ; ram_do_reg[7]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.183     ; 3.120      ;
; 2.515 ; SDRAM_READ_ENABLE       ; ram_do_reg[11]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.183     ; 3.120      ;
; 2.515 ; SDRAM_READ_ENABLE       ; ram_do_reg[15]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.183     ; 3.120      ;
; 2.515 ; SDRAM_READ_ENABLE       ; ram_do_reg[8]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.183     ; 3.120      ;
; 2.515 ; SDRAM_READ_ENABLE       ; ram_do_reg[9]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.183     ; 3.120      ;
; 2.529 ; SDRAM_READ_ENABLE       ; ram_do_reg[21]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.190     ; 3.099      ;
; 2.531 ; SDRAM_READ_ENABLE       ; ram_do_reg[4]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.184     ; 3.103      ;
; 2.531 ; SDRAM_READ_ENABLE       ; ram_do_reg[5]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.184     ; 3.103      ;
; 2.531 ; SDRAM_READ_ENABLE       ; ram_do_reg[6]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.184     ; 3.103      ;
; 2.531 ; SDRAM_READ_ENABLE       ; ram_do_reg[12]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.184     ; 3.103      ;
; 2.531 ; SDRAM_READ_ENABLE       ; ram_do_reg[13]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.184     ; 3.103      ;
; 2.531 ; SDRAM_READ_ENABLE       ; ram_do_reg[14]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.184     ; 3.103      ;
; 2.531 ; SDRAM_READ_ENABLE       ; ram_do_reg[10]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.184     ; 3.103      ;
+-------+-------------------------+----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                                                          ;
+-------+-------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node               ; To Node                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 4.122 ; svideo_yout_dly2[5]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 4.415      ;
; 4.131 ; svideo_yout_dly2[6]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 4.406      ;
; 4.143 ; svideo_yout_dly2[5]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 4.394      ;
; 4.152 ; svideo_yout_dly2[6]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 4.385      ;
; 4.192 ; svideo_yout_dly2[5]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 4.345      ;
; 4.201 ; svideo_yout_dly2[6]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 4.336      ;
; 4.326 ; svideo_yout_dly2[5]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 4.211      ;
; 4.335 ; svideo_yout_dly2[6]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 4.202      ;
; 4.402 ; svideo_yout_dly2[5]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.078     ; 4.133      ;
; 4.411 ; svideo_yout_dly2[6]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.078     ; 4.124      ;
; 4.430 ; svideo_yout_dly2[4]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 4.107      ;
; 4.443 ; svideo_yout_dly2[7]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 4.094      ;
; 4.451 ; svideo_yout_dly2[4]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 4.086      ;
; 4.460 ; svideo_yout_dly2[7]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 4.077      ;
; 4.500 ; svideo_yout_dly2[4]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 4.037      ;
; 4.503 ; svideo_yout_dly2[5]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 4.035      ;
; 4.508 ; svideo_yout_dly2[7]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 4.029      ;
; 4.512 ; svideo_yout_dly2[6]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 4.026      ;
; 4.534 ; svideo_yout_dly2[5]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.077     ; 4.002      ;
; 4.543 ; svideo_yout_dly2[6]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.077     ; 3.993      ;
; 4.634 ; svideo_yout_dly2[4]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 3.903      ;
; 4.659 ; svideo_yout_dly2[7]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 3.878      ;
; 4.669 ; svideo_yout_dly2[3]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 3.868      ;
; 4.681 ; svideo_yout_dly2[5]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.078     ; 3.854      ;
; 4.690 ; svideo_yout_dly2[3]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 3.847      ;
; 4.690 ; svideo_yout_dly2[6]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.078     ; 3.845      ;
; 4.693 ; svideo_yout_dly2[2]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 3.844      ;
; 4.710 ; svideo_yout_dly2[2]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 3.827      ;
; 4.710 ; svideo_yout_dly2[4]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.078     ; 3.825      ;
; 4.739 ; svideo_yout_dly2[3]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 3.798      ;
; 4.742 ; svideo_yout_dly2[7]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.078     ; 3.793      ;
; 4.750 ; svideo_yout_dly2[1]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 3.787      ;
; 4.758 ; svideo_yout_dly2[2]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 3.779      ;
; 4.771 ; svideo_yout_dly2[1]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 3.766      ;
; 4.811 ; svideo_yout_dly2[4]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 3.727      ;
; 4.820 ; svideo_yout_dly2[1]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 3.717      ;
; 4.842 ; svideo_yout_dly2[4]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.077     ; 3.694      ;
; 4.848 ; svideo_yout_dly2[7]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 3.690      ;
; 4.873 ; svideo_yout_dly2[3]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 3.664      ;
; 4.884 ; svideo_yout_dly2[7]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.077     ; 3.652      ;
; 4.909 ; svideo_yout_dly2[2]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 3.628      ;
; 4.949 ; svideo_yout_dly2[3]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.078     ; 3.586      ;
; 4.954 ; svideo_yout_dly2[1]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 3.583      ;
; 4.989 ; svideo_yout_dly2[4]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.078     ; 3.546      ;
; 4.992 ; svideo_yout_dly2[2]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.078     ; 3.543      ;
; 5.030 ; svideo_yout_dly2[1]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.078     ; 3.505      ;
; 5.031 ; svideo_yout_dly2[7]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.078     ; 3.504      ;
; 5.049 ; svideo_yout_dly2[0]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 3.488      ;
; 5.050 ; svideo_yout_dly2[3]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 3.488      ;
; 5.066 ; svideo_yout_dly2[0]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 3.471      ;
; 5.081 ; svideo_yout_dly2[3]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.077     ; 3.455      ;
; 5.098 ; svideo_yout_dly2[2]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 3.440      ;
; 5.114 ; svideo_yout_dly2[0]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 3.423      ;
; 5.131 ; svideo_yout_dly2[1]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 3.407      ;
; 5.134 ; svideo_yout_dly2[2]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.077     ; 3.402      ;
; 5.162 ; svideo_yout_dly2[1]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.077     ; 3.374      ;
; 5.228 ; svideo_yout_dly2[3]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.078     ; 3.307      ;
; 5.265 ; svideo_yout_dly2[0]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 3.272      ;
; 5.281 ; svideo_yout_dly2[2]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.078     ; 3.254      ;
; 5.309 ; svideo_yout_dly2[1]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.078     ; 3.226      ;
; 5.348 ; svideo_yout_dly2[0]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.078     ; 3.187      ;
; 5.454 ; svideo_yout_dly2[0]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 3.084      ;
; 5.490 ; svideo_yout_dly2[0]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.077     ; 3.046      ;
; 5.637 ; svideo_yout_dly2[0]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.078     ; 2.898      ;
; 5.687 ; svideo:svideo|luma[0]   ; luma_saturated[9]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.180     ; 2.861      ;
; 5.694 ; svideo:svideo|luma[0]   ; luma_saturated[1]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.853      ;
; 5.698 ; svideo:svideo|luma[0]   ; luma_saturated[8]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.180     ; 2.850      ;
; 5.766 ; svideo:svideo|luma[5]   ; luma_saturated[8]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.188     ; 2.774      ;
; 5.785 ; svideo:svideo|luma[5]   ; luma_saturated[9]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.188     ; 2.755      ;
; 5.819 ; svideo:svideo|luma[0]   ; luma_saturated[7]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.180     ; 2.729      ;
; 5.830 ; svideo:svideo|luma[0]   ; luma_saturated[6]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.180     ; 2.718      ;
; 5.898 ; svideo:svideo|luma[5]   ; luma_saturated[6]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.188     ; 2.642      ;
; 5.917 ; svideo:svideo|luma[5]   ; luma_saturated[7]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.188     ; 2.623      ;
; 5.951 ; svideo:svideo|luma[0]   ; luma_saturated[5]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.180     ; 2.597      ;
; 5.952 ; svideo:svideo|luma[8]   ; luma_saturated[9]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.180     ; 2.596      ;
; 5.962 ; svideo:svideo|luma[0]   ; luma_saturated[4]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.180     ; 2.586      ;
; 5.964 ; svideo:svideo|chroma[1] ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.583      ;
; 5.970 ; svideo:svideo|chroma[0] ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.577      ;
; 5.972 ; cvbs1_out[4]            ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.077     ; 2.564      ;
; 5.983 ; svideo:svideo|chroma[1] ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.564      ;
; 6.021 ; svideo:svideo|luma[4]   ; luma_saturated[9]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.188     ; 2.519      ;
; 6.035 ; svideo:svideo|luma_2[1] ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 2.624      ;
; 6.054 ; svideo:svideo|luma_2[1] ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 2.605      ;
; 6.058 ; svideo:svideo|luma[2]   ; luma_saturated[9]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.489      ;
; 6.062 ; svideo:svideo|chroma[2] ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.485      ;
; 6.083 ; svideo:svideo|luma[0]   ; luma_saturated[3]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.180     ; 2.465      ;
; 6.094 ; svideo:svideo|luma[0]   ; luma_saturated[2]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.180     ; 2.454      ;
; 6.096 ; svideo:svideo|chroma[1] ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.451      ;
; 6.102 ; svideo:svideo|chroma[0] ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.445      ;
; 6.115 ; svideo:svideo|chroma[1] ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.432      ;
; 6.121 ; svideo:svideo|chroma[0] ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.426      ;
; 6.129 ; svideo:svideo|luma_2[2] ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 2.531      ;
; 6.153 ; svideo:svideo|luma[4]   ; luma_saturated[7]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.188     ; 2.387      ;
; 6.167 ; svideo:svideo|luma_2[1] ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 2.492      ;
; 6.172 ; svideo:svideo|luma[4]   ; luma_saturated[8]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.188     ; 2.368      ;
; 6.174 ; cvbs1_out[8]            ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.079     ; 2.360      ;
; 6.186 ; svideo:svideo|luma_2[1] ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 2.473      ;
; 6.190 ; svideo:svideo|luma[2]   ; luma_saturated[7]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.357      ;
; 6.191 ; svideo:svideo|chroma[2] ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.356      ;
; 6.194 ; svideo:svideo|chroma[2] ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.353      ;
+-------+-------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: 'usb_pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                              ;
+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                                                                                                                           ; To Node                                                                                                                                                                                                                                         ; Launch Clock                                                                   ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; -1.680 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|RxfifoBI:u_RxfifoBI|forceEmptyToggle                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|RxfifoBI:u_RxfifoBI|forceEmptyToggleSyncToUsbClk[0]                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.063      ;
; -1.678 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggle                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggleSyncToUsbClk[0]                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.065      ;
; -1.672 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|hostSlaveMuxBI:u_hostSlaveMuxBI|rstShift[0]                                                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|hostSlaveMuxBI:u_hostSlaveMuxBI|rstSyncToUsbClkFirst                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.071      ;
; -1.670 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[4]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[4]                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.073      ;
; -1.667 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[5]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[5]                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.076      ;
; -1.657 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|hostSlaveMuxBI:u_hostSlaveMuxBI|rstShift[0]                                                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|hostSlaveMuxBI:u_hostSlaveMuxBI|rstSyncToUsbClkFirst                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.086      ;
; -1.653 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[5]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[5]                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.367      ; 1.078      ;
; -1.646 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[0]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[0]                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.367      ; 1.085      ;
; -1.642 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[0]            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[0]                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.378      ; 1.100      ;
; -1.640 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[1]            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[1]                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.378      ; 1.102      ;
; -1.634 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[4]            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[4]                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.378      ; 1.108      ;
; -1.633 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[4]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[4]                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.367      ; 1.098      ;
; -1.617 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[3]            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[3]                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.378      ; 1.125      ;
; -1.616 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|transReqSTB                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|transReq_reg1                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.127      ;
; -1.615 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[5]            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[5]                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.378      ; 1.127      ;
; -1.610 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSyncSTB                 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSync_reg1                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.369      ; 1.123      ;
; -1.609 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[1]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[1]                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.367      ; 1.122      ;
; -1.609 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[0]            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[0]                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.134      ;
; -1.608 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[1]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[1]                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.135      ;
; -1.606 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|preambleEnSTB              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|preambleEn_reg1                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.369      ; 1.127      ;
; -1.605 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|isoEnSTB                   ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|isoEn_reg1                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.369      ; 1.128      ;
; -1.594 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[1]            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[1]                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.149      ;
; -1.591 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[2]            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[2]                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.152      ;
; -1.589 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[3]            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[3]                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.154      ;
; -1.586 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeRegSTB[0]       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeReg_reg1[0]                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.157      ;
; -1.581 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|RxfifoBI:u_RxfifoBI|forceEmptyToggle                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|RxfifoBI:u_RxfifoBI|forceEmptyToggleSyncToUsbClk[0]                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.367      ; 1.150      ;
; -1.546 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[1]            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[1]                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.197      ;
; -1.538 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[0]            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[0]                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.205      ;
; -1.537 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|isoEnSTB                   ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|isoEn_reg1                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.206      ;
; -1.537 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[0]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[0]                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.206      ;
; -1.536 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[2]        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|LineDirectControlEn_reg1                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.378      ; 1.206      ;
; -1.536 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[1]        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineState_reg1[1]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.378      ; 1.206      ;
; -1.533 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggle                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggleSyncToUsbClk[0]                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.368      ; 1.199      ;
; -1.533 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[0]        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineState_reg1[0]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.378      ; 1.209      ;
; -1.531 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[4]        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|fullSpeedRate_reg1                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.368      ; 1.201      ;
; -1.530 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[4]        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|fullSpeedRate_reg1                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.378      ; 1.212      ;
; -1.530 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[3]        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|fullSpeedPol_reg1                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.368      ; 1.202      ;
; -1.529 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[3]        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|fullSpeedPol_reg1                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.378      ; 1.213      ;
; -1.528 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeRegSTB[1]       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeReg_reg1[1]                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.215      ;
; -1.524 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxSOFEnableRegSTB          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxSOFEnableReg_reg1                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.219      ;
; -1.520 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeRegSTB[0]       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeReg_reg1[0]                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.370      ; 1.214      ;
; -1.518 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[2]            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[2]                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.370      ; 1.216      ;
; -1.518 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[5]            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[5]                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.367      ; 1.213      ;
; -1.517 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[1]            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[1]                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.367      ; 1.214      ;
; -1.516 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[0]                                              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[0]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.227      ;
; -1.514 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[6]            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[6]                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.367      ; 1.217      ;
; -1.512 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|preambleEnSTB              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|preambleEn_reg1                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.231      ;
; -1.510 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeRegSTB[1]       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeReg_reg1[1]                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.370      ; 1.224      ;
; -1.507 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[1]        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineState_reg1[1]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.368      ; 1.225      ;
; -1.506 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[6]                                              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[6]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.237      ;
; -1.504 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[6]            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[6]                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.378      ; 1.238      ;
; -1.493 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|transReqSTB                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|transReq_reg1                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.250      ;
; -1.493 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[3]            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[3]                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.370      ; 1.241      ;
; -1.493 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[3]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[3]                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.250      ;
; -1.482 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[3]                                              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[3]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.261      ;
; -1.481 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[3]                                              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[3]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.368      ; 1.251      ;
; -1.481 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSyncSTB                 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSync_reg1                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.262      ;
; -1.481 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[4]            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[4]                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.367      ; 1.250      ;
; -1.478 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[6]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[6]                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.265      ;
; -1.477 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[2]        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|LineDirectControlEn_reg1                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.368      ; 1.255      ;
; -1.472 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxSOFEnableRegSTB          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxSOFEnableReg_reg1                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.271      ;
; -1.466 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[5]                                              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[5]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.277      ;
; -1.460 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[2]                                              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[2]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.283      ;
; -1.459 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[2]            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[2]                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.284      ;
; -1.458 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[3]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[3]                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.367      ; 1.273      ;
; -1.458 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[2]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[2]                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.285      ;
; -1.448 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[3]            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[3]                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.295      ;
; -1.443 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[6]                                              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[6]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.368      ; 1.289      ;
; -1.434 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[2]            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[2]                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.309      ;
; -1.432 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[0]        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineState_reg1[0]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.311      ;
; -1.426 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[6]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[6]                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.367      ; 1.305      ;
; -1.424 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[0]            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[0]                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.391      ; 1.331      ;
; -1.422 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[0]                                              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[0]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.368      ; 1.310      ;
; -1.421 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[2]                                              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[2]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.368      ; 1.311      ;
; -1.421 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[4]                                              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[4]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.368      ; 1.311      ;
; -1.414 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[5]                                              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[5]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.368      ; 1.318      ;
; -1.405 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[2]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[2]                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.367      ; 1.326      ;
; -1.400 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[4]                                              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[4]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.343      ;
; -1.398 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[1]                                              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[1]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.368      ; 1.334      ;
; -1.394 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[1]                                              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[1]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.379      ; 1.349      ;
; 0.403  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RXFifoData[1]                            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|altsyncram:buffer_rtl_0|altsyncram_6tc1:auto_generated|ram_block1a0~porta_datain_reg0 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.423      ; 1.048      ;
; 0.411  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RXFifoData[2]                            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|altsyncram:buffer_rtl_0|altsyncram_6tc1:auto_generated|ram_block1a0~porta_datain_reg0 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.423      ; 1.056      ;
; 0.413  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxByte:u_processRxByte|RxByte[4]    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxByte:u_processRxByte|RxByte[4]                                                ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxByte:u_processRxByte|RxByte[5]    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxByte:u_processRxByte|RxByte[5]                                                ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxByte:u_processRxByte|RxByte[1]    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxByte:u_processRxByte|RxByte[1]                                                ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxByte:u_processRxByte|RxByte[7]    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxByte:u_processRxByte|RxByte[7]                                                ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxByte:u_processRxByte|RxByte[6]    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxByte:u_processRxByte|RxByte[6]                                                ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxByte:u_processRxByte|RxByte[2]    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxByte:u_processRxByte|RxByte[2]                                                ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxByte:u_processRxByte|RxByte[3]    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxByte:u_processRxByte|RxByte[3]                                                ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxByte:u_processRxByte|RxByte[0]    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxByte:u_processRxByte|RxByte[0]                                                ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|updateCRC5:RxUpdateCRC5|loopEnd[0]         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|updateCRC5:RxUpdateCRC5|loopEnd[0]                                                     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxByte:u_processRxByte|RxCtrl[0]    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxByte:u_processRxByte|RxCtrl[0]                                                ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|readUSBWireData:u_readUSBWireData|SIERxWEn ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|readUSBWireData:u_readUSBWireData|SIERxWEn                                             ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|CurrState_sofCntl.100            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|CurrState_sofCntl.100                                                        ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|HCTxPortReq                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|HCTxPortReq                                                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|CurrState_sndPkt.00000                 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|CurrState_sndPkt.00000                                                             ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|CurrState_sndPkt.00001                 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|CurrState_sndPkt.00001                                                             ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|HCTxPortReq                            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|HCTxPortReq                                                                        ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|HCTxPortArbiter:u_HCTxPortArbiter|directCntlGnt                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|HCTxPortArbiter:u_HCTxPortArbiter|directCntlGnt                                                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|directControl:u_directControl|CurrState_drctCntl.111           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|directControl:u_directControl|CurrState_drctCntl.111                                                       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                   ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                                                       ; To Node                                                                                                                                                                                                                                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.352 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizep1_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.436      ; 1.010      ;
; 0.352 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[5]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.006      ;
; 0.357 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.436      ; 1.015      ;
; 0.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.013      ;
; 0.366 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.020      ;
; 0.369 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizep2_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.436      ; 1.027      ;
; 0.369 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.023      ;
; 0.375 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|cntr_pqf:cntr1|counter_reg_bit[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~portb_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.028      ;
; 0.375 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|cntr_pqf:cntr1|counter_reg_bit[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 1.027      ;
; 0.375 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.029      ;
; 0.379 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.033      ;
; 0.380 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.436      ; 1.038      ;
; 0.381 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~portb_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 1.033      ;
; 0.381 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.429      ; 1.032      ;
; 0.383 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.436      ; 1.041      ;
; 0.384 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.437      ; 1.043      ;
; 0.385 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.437      ; 1.044      ;
; 0.385 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.437      ; 1.044      ;
; 0.385 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.436      ; 1.043      ;
; 0.395 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.049      ;
; 0.396 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~portb_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 1.048      ;
; 0.396 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.429      ; 1.047      ;
; 0.396 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSentInt                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSentInt                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.087      ; 0.669      ;
; 0.396 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|resumeInt                              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|resumeInt                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.087      ; 0.669      ;
; 0.397 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connEventInt                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connEventInt                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.086      ; 0.669      ;
; 0.407 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizep2_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.436      ; 1.065      ;
; 0.409 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|cntr_4pf:cntr1|counter_reg_bit[0]    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~portb_address_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.427      ; 1.058      ;
; 0.409 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|cntr_4pf:cntr1|counter_reg_bit[0]    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_address_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.426      ; 1.057      ;
; 0.410 ; svideo:svideo|ampl_V[7]                                                                                                                                                                                         ; svideo:svideo|sin_cos:tab_inst|sin_rom:sin_inst|altsyncram:altsyncram_component|altsyncram_r842:auto_generated|ram_block1a0~portb_address_reg0                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.420      ; 1.052      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[10]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[10]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[1]                                                                                                                    ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[1]                                                                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[2]                                                                                                                    ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[2]                                                                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[3]                                                                                                                    ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[3]                                                                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[18]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[18]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[0]                                                                                                                                                            ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[0]                                                                                                                                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[5]                                                                                                                                                    ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[5]                                                                                                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[16]                                                                                                                                                   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[16]                                                                                                                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[27]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[27]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|assert_data                                                                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|assert_data                                                                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|ss_n[0]                                                                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|ss_n[0]                                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[9]                                                                                                                                                                 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[9]                                                                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[20]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[20]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[21]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[21]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[23]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[23]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[26]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[26]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[28]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[28]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[369]                                                                                                                                                                 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[369]                                                                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[126]                                                                                                                                                                 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[126]                                                                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[5]                                                                                                                             ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[5]                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[0]                                                                                                                             ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[0]                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[1]                                                                                                                             ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[1]                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[2]                                                                                                                             ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[2]                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[3]                                                                                                                             ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[3]                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[4]                                                                                                                             ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[4]                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[6]                                                                                                                             ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[6]                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[7]                                                                                                                             ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[7]                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[62]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[62]                                                                                                                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[118]                                                                                                                                                                 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[118]                                                                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[58]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[58]                                                                                                                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[26]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[26]                                                                                                                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[273]                                                                                                                                                                 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[273]                                                                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[27]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[27]                                                                                                                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[30]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[30]                                                                                                                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[22]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[22]                                                                                                                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[91]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[91]                                                                                                                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[69]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[69]                                                                                                                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[77]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[77]                                                                                                                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[5]                                                                                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[5]                                                                                                                                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[4]                                                                                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[4]                                                                                                                                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[119]                                                                                                                                                                 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[119]                                                                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[10]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[10]                                                                                                                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[4]                                                                                                                             ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[4]                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[0]                                                                                                                             ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[0]                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[1]                                                                                                                             ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[1]                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[3]                                                                                                                             ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[3]                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[6]                                                                                                                             ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[6]                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[5]                                                                                                                             ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[5]                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[7]                                                                                                                             ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[7]                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[1]                                                                                                                             ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[1]                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggle                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggle                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[6]                                                                                                                                                    ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[6]                                                                                                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[11]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[11]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[7]                                                                                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[7]                                                                                                                                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[17]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[17]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[372]                                                                                                                                                                 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[372]                                                                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[0]                                                                                                                    ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[0]                                                                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[370]                                                                                                                                                                 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[370]                                                                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[0]                                                                                                                                                    ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[0]                                                                                                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_popped                                                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_popped                                                                                                                                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[19]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[19]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[1]                                                                                                                                                    ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[1]                                                                                                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|sclk                                                                                                                                             ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|sclk                                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vblank_reg                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vblank_reg                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_cache_ready_reg                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_cache_ready_reg                                                                                                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[2]                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[2]                                                                                                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[0]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[0]                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[3]                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[3]                                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[1]                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[1]                                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                             ;
+-------+-----------------------------------------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                 ; To Node                                                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.412 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; sdram_ctrl:sdram_controller|r_refr_act                    ; sdram_ctrl:sdram_controller|r_refr_act                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; sdram_ctrl:sdram_controller|r_sdram_addr[6]~_Duplicate_1  ; sdram_ctrl:sdram_controller|r_sdram_addr[6]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; sdram_ctrl:sdram_controller|r_sdram_addr[7]~_Duplicate_1  ; sdram_ctrl:sdram_controller|r_sdram_addr[7]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.413 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sdram_ctrl:sdram_controller|sdram_rdy                     ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sdram_request_reg                                         ; sdram_request_reg                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sdram_ctrl:sdram_controller|r_rd_act                      ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sdram_ctrl:sdram_controller|r_wr_act                      ; sdram_ctrl:sdram_controller|r_wr_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sdram_ctrl:sdram_controller|r_sdram_addr[2]~_Duplicate_1  ; sdram_ctrl:sdram_controller|r_sdram_addr[2]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sdram_ctrl:sdram_controller|r_sdram_addr[3]~_Duplicate_1  ; sdram_ctrl:sdram_controller|r_sdram_addr[3]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sdram_ctrl:sdram_controller|r_sdram_addr[4]~_Duplicate_1  ; sdram_ctrl:sdram_controller|r_sdram_addr[4]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.417 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.674      ;
; 0.475 ; seq_reg[0]                                                ; seq_reg[1]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.732      ;
; 0.565 ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.821      ;
; 0.601 ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.857      ;
; 0.602 ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.858      ;
; 0.608 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.864      ;
; 0.626 ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ; sdram_ctrl:sdram_controller|r_wr_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.882      ;
; 0.629 ; seq_reg[8]                                                ; seq_reg[9]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.886      ;
; 0.631 ; seq_reg[5]                                                ; seq_reg[6]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.888      ;
; 0.638 ; seq_reg[4]                                                ; seq_reg[5]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.895      ;
; 0.642 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.899      ;
; 0.643 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.900      ;
; 0.644 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.901      ;
; 0.645 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.902      ;
; 0.646 ; seq_reg[7]                                                ; seq_reg[8]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.903      ;
; 0.646 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.903      ;
; 0.647 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.904      ;
; 0.648 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.905      ;
; 0.649 ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.906      ;
; 0.661 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.918      ;
; 0.664 ; seq_reg[3]                                                ; seq_reg[4]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.921      ;
; 0.665 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.922      ;
; 0.687 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.943      ;
; 0.689 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.945      ;
; 0.697 ; sdram_ctrl:sdram_controller|r_rd_act                      ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.953      ;
; 0.697 ; seq_reg[11]                                               ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.953      ;
; 0.699 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.955      ;
; 0.706 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.962      ;
; 0.718 ; seq_reg[11]                                               ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.974      ;
; 0.720 ; sdram_request_complete_reg                                ; sdram_request_reg                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.976      ;
; 0.734 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.990      ;
; 0.770 ; seq_reg[9]                                                ; seq_reg[10]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.027      ;
; 0.854 ; seq_reg[1]                                                ; seq_reg[2]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.061      ; 1.101      ;
; 0.860 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.116      ;
; 0.862 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.118      ;
; 0.866 ; seq_reg[6]                                                ; seq_reg[7]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.123      ;
; 0.888 ; sdram_ctrl:sdram_controller|r_wr_act                      ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.144      ;
; 0.908 ; seq_reg[11]                                               ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.165      ;
; 0.936 ; sdram_ctrl:sdram_controller|r_sdram_addr[1]~_Duplicate_1  ; sdram_ctrl:sdram_controller|r_sdram_addr[1]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.193      ;
; 0.938 ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.194      ;
; 0.960 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.217      ;
; 0.961 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.218      ;
; 0.961 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.218      ;
; 0.963 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.220      ;
; 0.966 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.223      ;
; 0.972 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.229      ;
; 0.974 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.231      ;
; 0.974 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.231      ;
; 0.975 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.232      ;
; 0.975 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.232      ;
; 0.977 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.234      ;
; 0.978 ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.234      ;
; 0.979 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.236      ;
; 0.979 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.236      ;
; 0.980 ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.236      ;
; 0.980 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.237      ;
; 0.980 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.237      ;
; 0.999 ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.255      ;
; 1.024 ; sdram_ctrl:sdram_controller|r_sdram_addr[11]~_Duplicate_1 ; sdram_ctrl:sdram_controller|r_sdram_addr[11]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.281      ;
; 1.075 ; sdram_ctrl:sdram_controller|r_sdram_addr[0]~_Duplicate_1  ; sdram_ctrl:sdram_controller|r_sdram_addr[0]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.332      ;
; 1.081 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.338      ;
; 1.082 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.339      ;
; 1.082 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.339      ;
; 1.086 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.343      ;
; 1.087 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.344      ;
; 1.087 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.344      ;
; 1.096 ; sdram_ctrl:sdram_controller|r_psel[0]                     ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.073      ; 1.355      ;
; 1.100 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.357      ;
; 1.100 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.357      ;
; 1.101 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.358      ;
; 1.101 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.358      ;
; 1.105 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.362      ;
; 1.105 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.362      ;
; 1.106 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.363      ;
; 1.106 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.363      ;
; 1.115 ; seq_reg[11]                                               ; sdram_ctrl:sdram_controller|r_psel[0]                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.371      ;
; 1.122 ; sdram_ctrl:sdram_controller|r_rd_reg                      ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; -0.331     ; 0.977      ;
; 1.142 ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ; sdram_request_complete_reg                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.398      ;
; 1.143 ; seq_reg[2]                                                ; seq_reg[3]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 1.410      ;
; 1.146 ; sdram_ctrl:sdram_controller|r_sdram_addr[8]~_Duplicate_1  ; sdram_ctrl:sdram_controller|r_sdram_addr[8]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.403      ;
; 1.147 ; seq_reg[1]                                                ; sdram_ctrl:sdram_controller|r_wr_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.060      ; 1.393      ;
; 1.149 ; seq_reg[0]                                                ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 1.402      ;
; 1.154 ; sdram_ctrl:sdram_controller|r_sdram_addr[9]~_Duplicate_1  ; sdram_ctrl:sdram_controller|r_sdram_addr[9]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.411      ;
; 1.158 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.414      ;
+-------+-----------------------------------------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                                                             ;
+-------+---------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                 ; To Node                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.439 ; svideo:svideo|luma_1[4]   ; svideo:svideo|luma_2[4]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.695      ;
; 0.440 ; svideo:svideo|luma_1[7]   ; svideo:svideo|luma_2[7]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.695      ;
; 0.440 ; svideo:svideo|luma_1[9]   ; svideo:svideo|luma_2[9]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.696      ;
; 0.441 ; svideo:svideo|luma_1[8]   ; svideo:svideo|luma_2[8]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.696      ;
; 0.441 ; svideo_yout_dly1[4]       ; svideo_yout_dly2[4]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.696      ;
; 0.441 ; svideo_yout_dly1[1]       ; svideo_yout_dly2[1]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.696      ;
; 0.442 ; svideo_yout_dly1[5]       ; svideo_yout_dly2[5]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.697      ;
; 0.443 ; svideo_yout_dly1[3]       ; svideo_yout_dly2[3]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.698      ;
; 0.510 ; svideo:svideo|luma[6]     ; svideo:svideo|luma_1[6]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.158      ; 0.874      ;
; 0.548 ; svideo:svideo|luma[1]     ; svideo:svideo|luma_1[1]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.159      ; 0.913      ;
; 0.552 ; svideo:svideo|luma[6]     ; luma_saturated[6]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.158      ; 0.916      ;
; 0.586 ; luma_saturated[9]         ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.841      ;
; 0.609 ; svideo:svideo|luma_1[5]   ; svideo:svideo|luma_2[5]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.865      ;
; 0.610 ; svideo:svideo|luma_1[0]   ; svideo:svideo|luma_2[0]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.866      ;
; 0.610 ; svideo:svideo|luma_1[1]   ; svideo:svideo|luma_2[1]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.866      ;
; 0.610 ; svideo:svideo|luma_1[2]   ; svideo:svideo|luma_2[2]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.866      ;
; 0.610 ; svideo:svideo|luma_1[3]   ; svideo:svideo|luma_2[3]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.866      ;
; 0.612 ; svideo:svideo|luma_1[6]   ; svideo:svideo|luma_2[6]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.867      ;
; 0.612 ; svideo_yout_dly1[7]       ; svideo_yout_dly2[7]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.867      ;
; 0.613 ; svideo_yout_dly1[2]       ; svideo_yout_dly2[2]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.868      ;
; 0.613 ; svideo_yout_dly1[6]       ; svideo_yout_dly2[6]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.868      ;
; 0.614 ; svideo_yout_dly1[0]       ; svideo_yout_dly2[0]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.869      ;
; 0.648 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.904      ;
; 0.649 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.905      ;
; 0.649 ; svideo:svideo|luma_2[5]   ; svideo:svideo|luma_acc[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.905      ;
; 0.666 ; svideo:svideo|luma_2[0]   ; svideo:svideo|luma_acc[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.922      ;
; 0.729 ; svideo:svideo|luma[9]     ; luma_saturated[9]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.160      ; 1.095      ;
; 0.748 ; svideo:svideo|luma[9]     ; svideo:svideo|luma_1[9]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.161      ; 1.115      ;
; 0.808 ; luma_saturated[3]         ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.063      ;
; 0.809 ; svideo:svideo|luma_2[7]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.066      ;
; 0.812 ; luma_saturated[2]         ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.067      ;
; 0.816 ; svideo:svideo|luma_acc[8] ; svideo_yout_dly1[6]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.067      ; 1.069      ;
; 0.817 ; svideo:svideo|luma_acc[2] ; svideo_yout_dly1[0]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.067      ; 1.070      ;
; 0.839 ; svideo:svideo|luma_acc[9] ; svideo_yout_dly1[7]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.067      ; 1.092      ;
; 0.845 ; luma_saturated[8]         ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.100      ;
; 0.848 ; luma_saturated[6]         ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.103      ;
; 0.848 ; luma_saturated[4]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.103      ;
; 0.866 ; svideo:svideo|luma[6]     ; luma_saturated[7]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.158      ; 1.230      ;
; 0.870 ; svideo:svideo|luma_acc[6] ; svideo_yout_dly1[4]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.067      ; 1.123      ;
; 0.870 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.126      ;
; 0.875 ; svideo:svideo|luma_acc[3] ; svideo_yout_dly1[1]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.067      ; 1.128      ;
; 0.877 ; svideo:svideo|luma_acc[4] ; svideo_yout_dly1[2]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.067      ; 1.130      ;
; 0.877 ; svideo:svideo|luma_acc[7] ; svideo_yout_dly1[5]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.067      ; 1.130      ;
; 0.885 ; svideo:svideo|luma_acc[5] ; svideo_yout_dly1[3]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.067      ; 1.138      ;
; 0.889 ; svideo:svideo|luma[2]     ; svideo:svideo|luma_1[2]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.160      ; 1.255      ;
; 0.891 ; svideo:svideo|luma[1]     ; luma_saturated[2]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.158      ; 1.255      ;
; 0.896 ; svideo:svideo|luma[1]     ; luma_saturated[3]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.158      ; 1.260      ;
; 0.897 ; svideo:svideo|luma_2[9]   ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.154      ;
; 0.898 ; svideo:svideo|luma[7]     ; svideo:svideo|luma_1[7]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.160      ; 1.264      ;
; 0.913 ; svideo:svideo|chroma[3]   ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.161      ; 1.280      ;
; 0.924 ; svideo:svideo|chroma[4]   ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.161      ; 1.291      ;
; 0.926 ; svideo:svideo|chroma[5]   ; cvbs1_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.161      ; 1.293      ;
; 0.927 ; svideo:svideo|luma[2]     ; luma_saturated[2]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.160      ; 1.293      ;
; 0.940 ; svideo:svideo|luma[7]     ; luma_saturated[7]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.160      ; 1.306      ;
; 0.946 ; svideo:svideo|chroma[7]   ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.161      ; 1.313      ;
; 0.950 ; svideo:svideo|chroma[6]   ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.161      ; 1.317      ;
; 0.963 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.219      ;
; 0.964 ; svideo:svideo|luma[3]     ; luma_saturated[3]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.160      ; 1.330      ;
; 0.966 ; svideo:svideo|luma_2[5]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.222      ;
; 0.967 ; svideo:svideo|luma[3]     ; svideo:svideo|luma_1[3]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.160      ; 1.333      ;
; 0.968 ; svideo:svideo|chroma[8]   ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.161      ; 1.335      ;
; 0.971 ; svideo:svideo|chroma[8]   ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.161      ; 1.338      ;
; 0.975 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.231      ;
; 0.979 ; svideo:svideo|luma_2[0]   ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.235      ;
; 0.980 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.236      ;
; 0.981 ; luma_saturated[0]         ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.237      ;
; 0.984 ; svideo:svideo|luma_2[0]   ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.240      ;
; 0.987 ; svideo:svideo|luma[6]     ; luma_saturated[8]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.158      ; 1.351      ;
; 0.992 ; svideo:svideo|luma[6]     ; luma_saturated[9]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.158      ; 1.356      ;
; 0.994 ; svideo:svideo|chroma[2]   ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.161      ; 1.361      ;
; 1.008 ; svideo:svideo|luma[4]     ; svideo:svideo|luma_1[4]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.156      ; 1.370      ;
; 1.012 ; svideo:svideo|luma_2[3]   ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.072      ; 1.270      ;
; 1.017 ; svideo:svideo|luma[1]     ; luma_saturated[4]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.158      ; 1.381      ;
; 1.022 ; svideo:svideo|luma[1]     ; luma_saturated[5]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.158      ; 1.386      ;
; 1.062 ; luma_saturated[7]         ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.317      ;
; 1.079 ; svideo:svideo|luma[4]     ; luma_saturated[4]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.154      ; 1.439      ;
; 1.084 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.340      ;
; 1.087 ; svideo:svideo|luma_2[5]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.343      ;
; 1.089 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.345      ;
; 1.092 ; svideo:svideo|luma_2[5]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.348      ;
; 1.096 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.353      ;
; 1.101 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.357      ;
; 1.102 ; luma_saturated[0]         ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.358      ;
; 1.105 ; luma_saturated[5]         ; cvbs1_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.360      ;
; 1.105 ; svideo:svideo|luma_2[0]   ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.361      ;
; 1.106 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.362      ;
; 1.107 ; luma_saturated[0]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.363      ;
; 1.110 ; svideo:svideo|luma_2[0]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.366      ;
; 1.112 ; svideo:svideo|luma_2[8]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.369      ;
; 1.122 ; luma_saturated[3]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.377      ;
; 1.126 ; svideo:svideo|luma_2[7]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.383      ;
; 1.128 ; luma_saturated[1]         ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.384      ;
; 1.141 ; luma_saturated[2]         ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.396      ;
; 1.143 ; svideo:svideo|luma[1]     ; luma_saturated[6]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.158      ; 1.507      ;
; 1.146 ; luma_saturated[2]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.401      ;
; 1.148 ; svideo:svideo|luma[1]     ; luma_saturated[7]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.158      ; 1.512      ;
; 1.149 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.072      ; 1.407      ;
; 1.168 ; luma_saturated[8]         ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.423      ;
; 1.171 ; svideo:svideo|luma_2[1]   ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.428      ;
; 1.173 ; luma_saturated[6]         ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.428      ;
+-------+---------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                        ;
+-------+---------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                             ; To Node                                                                                                                                      ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.169     ; 6.015      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[10]                                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.169     ; 6.015      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_shift_reg[5]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[1]                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.159     ; 6.025      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[2]                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.159     ; 6.025      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[3]                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.159     ; 6.025      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[18]                                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.169     ; 6.015      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[0]                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[1]                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[2]                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[3]                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[4]                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[5]                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[6]                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[7]                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[8]                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[9]                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[10]                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[11]                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[12]                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[13]                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[14]                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[15]                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[16]                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.162     ; 6.022      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[17]                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.162     ; 6.022      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[18]                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.162     ; 6.022      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[19]                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.162     ; 6.022      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[20]                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.162     ; 6.022      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[21]                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.162     ; 6.022      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[22]                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.162     ; 6.022      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[23]                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.162     ; 6.022      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[24]                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.162     ; 6.022      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[25]                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.162     ; 6.022      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[26]                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.162     ; 6.022      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[27]                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.162     ; 6.022      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[27]                                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.169     ; 6.015      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[28]                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.162     ; 6.022      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[29]                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.162     ; 6.022      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[30]                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.162     ; 6.022      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|ss_n[0]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.162     ; 6.022      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[7]                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[6]                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[9]                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.169     ; 6.015      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[12]                                                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.170     ; 6.014      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[20]                                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.169     ; 6.015      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addrend_reg[4]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.169     ; 6.015      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[21]                                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.169     ; 6.015      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addrend_reg[5]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.169     ; 6.015      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addrend_reg[0]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.169     ; 6.015      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addrend_reg[1]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.169     ; 6.015      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[23]                                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.169     ; 6.015      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addrend_reg[7]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.169     ; 6.015      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addrend_reg[6]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.169     ; 6.015      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[2]                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[26]                                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.169     ; 6.015      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[28]                                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.170     ; 6.014      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[1]                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.165     ; 6.019      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[4]                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.165     ; 6.019      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|skctl_reg[7]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.162     ; 6.022      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serout_holding_reg[1]                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.160     ; 6.024      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serout_holding_reg[4]                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.160     ; 6.024      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serout_holding_reg[5]                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.160     ; 6.024      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serout_holding_reg[7]                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.160     ; 6.024      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serout_shift_reg[9]                                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.160     ; 6.024      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serout_holding_reg[6]                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.160     ; 6.024      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serout_holding_reg[3]                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.160     ; 6.024      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serout_holding_reg[2]                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.160     ; 6.024      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serout_holding_reg[0]                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.160     ; 6.024      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|delay_line:stimer_delay|shift_reg[1]                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[5]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.162     ; 6.022      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[0]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.162     ; 6.022      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer1|count_reg[0]                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[1]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.162     ; 6.022      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer1|count_reg[1]                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[2]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.162     ; 6.022      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer1|count_reg[2]                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[3]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.162     ; 6.022      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer1|count_reg[3]                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[4]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.162     ; 6.022      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer1|count_reg[4]                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer1|count_reg[5]                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[6]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.162     ; 6.022      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer1|count_reg[6]                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[7]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.162     ; 6.022      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer1|count_reg[7]                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[5]                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.169     ; 6.015      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[1]                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.171     ; 6.013      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[6]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.159     ; 6.025      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[5]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.159     ; 6.025      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[1]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.162     ; 6.022      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serout_holding_full_reg                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.160     ; 6.024      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serout_active_reg                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.160     ; 6.024      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_shift_reg[9]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_shift_reg[8]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_shift_reg[7]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
; 5.454 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_shift_reg[6]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 6.023      ;
+-------+---------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                      ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node              ; To Node                                                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 7.995 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[7]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.262     ; 3.259      ;
; 8.065 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[4]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.183     ; 3.275      ;
; 8.065 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[5]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.183     ; 3.275      ;
; 8.065 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[9]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 3.274      ;
; 8.065 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[11]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 3.274      ;
; 8.068 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[6]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.185     ; 3.270      ;
; 8.068 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[7]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.186     ; 3.269      ;
; 8.068 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[8]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.186     ; 3.269      ;
; 8.082 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[8]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.322     ; 3.111      ;
; 8.085 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[9]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.329     ; 3.101      ;
; 8.087 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[13]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.323     ; 3.105      ;
; 8.087 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[14]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.323     ; 3.105      ;
; 8.087 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[15]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.323     ; 3.105      ;
; 8.088 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[7]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 3.263      ;
; 8.089 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[2]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 3.263      ;
; 8.089 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[3]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 3.263      ;
; 8.090 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[12]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.324     ; 3.101      ;
; 8.090 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[10]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.324     ; 3.101      ;
; 8.090 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[11]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.324     ; 3.101      ;
; 8.090 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[8]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.211     ; 3.224      ;
; 8.091 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ba[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.174     ; 3.258      ;
; 8.091 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ba[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.174     ; 3.258      ;
; 8.091 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[0]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.174     ; 3.258      ;
; 8.091 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[1]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.174     ; 3.258      ;
; 8.091 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.174     ; 3.258      ;
; 8.093 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[9]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.218     ; 3.214      ;
; 8.095 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[13]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.212     ; 3.218      ;
; 8.095 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[14]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.212     ; 3.218      ;
; 8.095 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[15]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.212     ; 3.218      ;
; 8.098 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[10]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.213     ; 3.214      ;
; 8.098 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[11]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.213     ; 3.214      ;
; 8.098 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[12]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.213     ; 3.214      ;
; 8.100 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[5]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.303     ; 3.112      ;
; 8.100 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[6]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.302     ; 3.113      ;
; 8.104 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[4]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.322     ; 3.089      ;
; 8.106 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[0]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.310     ; 3.099      ;
; 8.106 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[3]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.313     ; 3.096      ;
; 8.106 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[1]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.310     ; 3.099      ;
; 8.106 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[2]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.310     ; 3.099      ;
; 8.108 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[5]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.192     ; 3.225      ;
; 8.108 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[6]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.191     ; 3.226      ;
; 8.112 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[4]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.211     ; 3.202      ;
; 8.114 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[0]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.199     ; 3.212      ;
; 8.114 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[1]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.199     ; 3.212      ;
; 8.114 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[2]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.199     ; 3.212      ;
; 8.114 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[3]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.202     ; 3.209      ;
; 8.209 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[6]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.154     ; 3.275      ;
; 8.209 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[7]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.154     ; 3.275      ;
; 8.314 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.183     ; 3.026      ;
; 8.337 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_we_n                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 3.014      ;
; 8.337 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 3.014      ;
; 8.338 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ras_n                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 3.013      ;
; 8.338 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cas_n                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 3.013      ;
; 8.338 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 3.013      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; seq_reg[0]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.150     ; 2.893      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; seq_reg[1]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.150     ; 2.893      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; seq_reg[3]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.150     ; 2.893      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; seq_reg[4]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.150     ; 2.893      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; seq_reg[5]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.150     ; 2.893      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; seq_reg[6]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.150     ; 2.893      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; seq_reg[7]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.150     ; 2.893      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; seq_reg[8]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.150     ; 2.893      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; seq_reg[9]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.150     ; 2.893      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; seq_reg[10]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.150     ; 2.893      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; ram_do_reg[29]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.155     ; 2.888      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_req                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.151     ; 2.892      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_act                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.153     ; 2.890      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.153     ; 2.890      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.153     ; 2.890      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.153     ; 2.890      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; ram_di_reg[0]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.151     ; 2.892      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; ram_di_reg[1]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.151     ; 2.892      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; ram_di_reg[2]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.151     ; 2.892      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; ram_di_reg[3]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.154     ; 2.889      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; ram_di_reg[4]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.154     ; 2.889      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; ram_di_reg[5]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.151     ; 2.892      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; ram_di_reg[6]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.151     ; 2.892      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; ram_di_reg[7]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.154     ; 2.889      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; ram_di_reg[8]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.151     ; 2.892      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; ram_di_reg[9]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.151     ; 2.892      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; ram_di_reg[10]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.151     ; 2.892      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; ram_di_reg[11]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.154     ; 2.889      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; ram_di_reg[12]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.154     ; 2.889      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; ram_di_reg[13]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.151     ; 2.892      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; ram_di_reg[14]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.151     ; 2.892      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; ram_di_reg[15]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.154     ; 2.889      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_oe                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.162     ; 2.881      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[1]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.155     ; 2.888      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[0]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.155     ; 2.888      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[2]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.153     ; 2.890      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[3]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.153     ; 2.890      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[4]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.153     ; 2.890      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[5]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.153     ; 2.890      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[8]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.153     ; 2.890      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[9]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.153     ; 2.890      ;
; 8.595 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[11]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.153     ; 2.890      ;
; 8.598 ; sdram_reset_ctrl_n_reg ; ram_do_reg[21]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.185     ; 2.855      ;
; 8.599 ; sdram_reset_ctrl_n_reg ; seq_reg[2]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.160     ; 2.879      ;
; 8.599 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.160     ; 2.879      ;
; 8.599 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.160     ; 2.879      ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                 ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                           ; To Node                                                                                                                                                                                                                ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 1.444 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a5 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.391      ; 2.021      ;
; 1.444 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a4 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.391      ; 2.021      ;
; 1.444 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a3 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.391      ; 2.021      ;
; 1.444 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a2 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.391      ; 2.021      ;
; 1.444 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.391      ; 2.021      ;
; 1.444 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.391      ; 2.021      ;
; 1.483 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a55  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.057      ;
; 1.483 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a54  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.057      ;
; 1.483 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a53  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.057      ;
; 1.483 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a52  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.057      ;
; 1.483 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a51  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.057      ;
; 1.483 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a50  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.057      ;
; 1.483 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a49  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.057      ;
; 1.483 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a48  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.057      ;
; 1.483 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a39  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.057      ;
; 1.483 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a38  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.057      ;
; 1.483 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a37  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.057      ;
; 1.483 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a36  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.057      ;
; 1.483 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a35  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.057      ;
; 1.483 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a34  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.057      ;
; 1.483 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a33  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.057      ;
; 1.483 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a32  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.057      ;
; 1.483 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a19  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.057      ;
; 1.483 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a18  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.057      ;
; 1.483 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a17  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.057      ;
; 1.483 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a16  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.057      ;
; 1.483 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a7   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.057      ;
; 1.483 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a6   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.057      ;
; 1.483 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a5   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.057      ;
; 1.483 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a4   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.057      ;
; 1.483 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a3   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.057      ;
; 1.483 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a2   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.057      ;
; 1.483 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a1   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.057      ;
; 1.483 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.057      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a63  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a62  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a61  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a60  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a59  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a58  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a57  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a56  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a47  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a46  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a45  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a44  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a43  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a42  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a41  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a40  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a31  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a30  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a29  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a28  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a27  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a26  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a25  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a24  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a23  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a22  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a21  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a20  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a15  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a14  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a13  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a12  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a11  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a10  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a9   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.071      ;
; 1.718 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a6 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.300      ;
; 1.718 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a5 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.300      ;
; 1.718 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a4 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.300      ;
; 1.718 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a3 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.300      ;
; 1.718 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a2 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.300      ;
; 1.718 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.300      ;
; 1.718 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.300      ;
; 1.987 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a15   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.405      ; 2.578      ;
; 1.987 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a14   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.405      ; 2.578      ;
; 1.987 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a13   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.405      ; 2.578      ;
; 1.987 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a12   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.405      ; 2.578      ;
; 1.987 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a11   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.405      ; 2.578      ;
; 1.987 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a10   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.405      ; 2.578      ;
; 1.987 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a9    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.405      ; 2.578      ;
; 1.987 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a8    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.405      ; 2.578      ;
; 1.987 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a7    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.405      ; 2.578      ;
; 1.987 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a6    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.405      ; 2.578      ;
; 1.987 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a5    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.405      ; 2.578      ;
; 1.987 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a4    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.405      ; 2.578      ;
; 1.987 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a3    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.405      ; 2.578      ;
; 1.987 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a2    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.405      ; 2.578      ;
; 1.987 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a1    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.405      ; 2.578      ;
; 1.987 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.405      ; 2.578      ;
; 4.703 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|pot_from_signed:pot0|enable_divider:pot_clock_div|count_reg[0]                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.083      ; 4.972      ;
; 4.703 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|pot_from_signed:pot0|enable_divider:pot_clock_div|count_reg[1]                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.083      ; 4.972      ;
; 4.703 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|pot_from_signed:pot0|enable_divider:pot_clock_div|count_reg[2]                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.083      ; 4.972      ;
; 4.703 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|pot_from_signed:pot0|enable_divider:pot_clock_div|count_reg[3]                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.083      ; 4.972      ;
; 4.703 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|pot_from_signed:pot0|enable_divider:pot_clock_div|count_reg[4]                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.083      ; 4.972      ;
; 4.703 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|pot_from_signed:pot0|enable_divider:pot_clock_div|count_reg[5]                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.083      ; 4.972      ;
; 4.703 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|pot_from_signed:pot0|enable_divider:pot_clock_div|count_reg[6]                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.083      ; 4.972      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                       ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node              ; To Node                                                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 1.889 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_reg                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.607      ; 2.702      ;
; 1.889 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_reg                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.607      ; 2.702      ;
; 2.304 ; sdram_reset_ctrl_n_reg ; ram_do_reg[28]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 2.672      ;
; 2.304 ; sdram_reset_ctrl_n_reg ; ram_do_reg[26]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 2.672      ;
; 2.304 ; sdram_reset_ctrl_n_reg ; ram_do_reg[27]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.163      ; 2.673      ;
; 2.304 ; sdram_reset_ctrl_n_reg ; ram_do_reg[24]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.163      ; 2.673      ;
; 2.304 ; sdram_reset_ctrl_n_reg ; ram_do_reg[30]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 2.672      ;
; 2.304 ; sdram_reset_ctrl_n_reg ; ram_do_reg[19]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.163      ; 2.673      ;
; 2.304 ; sdram_reset_ctrl_n_reg ; ram_do_reg[1]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.163      ; 2.673      ;
; 2.304 ; sdram_reset_ctrl_n_reg ; ram_do_reg[0]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.163      ; 2.673      ;
; 2.304 ; sdram_reset_ctrl_n_reg ; ram_do_reg[4]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 2.672      ;
; 2.304 ; sdram_reset_ctrl_n_reg ; ram_do_reg[5]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 2.672      ;
; 2.304 ; sdram_reset_ctrl_n_reg ; ram_do_reg[7]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.163      ; 2.673      ;
; 2.304 ; sdram_reset_ctrl_n_reg ; ram_do_reg[6]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 2.672      ;
; 2.304 ; sdram_reset_ctrl_n_reg ; ram_do_reg[11]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.163      ; 2.673      ;
; 2.304 ; sdram_reset_ctrl_n_reg ; ram_do_reg[12]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 2.672      ;
; 2.304 ; sdram_reset_ctrl_n_reg ; ram_do_reg[16]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.163      ; 2.673      ;
; 2.304 ; sdram_reset_ctrl_n_reg ; ram_do_reg[17]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.163      ; 2.673      ;
; 2.304 ; sdram_reset_ctrl_n_reg ; ram_do_reg[15]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.163      ; 2.673      ;
; 2.304 ; sdram_reset_ctrl_n_reg ; ram_do_reg[13]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 2.672      ;
; 2.304 ; sdram_reset_ctrl_n_reg ; ram_do_reg[14]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 2.672      ;
; 2.304 ; sdram_reset_ctrl_n_reg ; ram_do_reg[10]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 2.672      ;
; 2.304 ; sdram_reset_ctrl_n_reg ; ram_do_reg[20]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 2.672      ;
; 2.304 ; sdram_reset_ctrl_n_reg ; ram_do_reg[8]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.163      ; 2.673      ;
; 2.304 ; sdram_reset_ctrl_n_reg ; ram_do_reg[9]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.163      ; 2.673      ;
; 2.304 ; sdram_reset_ctrl_n_reg ; ram_do_reg[23]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.163      ; 2.673      ;
; 2.304 ; sdram_reset_ctrl_n_reg ; ram_do_reg[18]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 2.672      ;
; 2.304 ; sdram_reset_ctrl_n_reg ; ram_do_reg[22]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 2.672      ;
; 2.304 ; sdram_reset_ctrl_n_reg ; ram_do_reg[31]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.163      ; 2.673      ;
; 2.304 ; sdram_reset_ctrl_n_reg ; ram_do_reg[25]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.163      ; 2.673      ;
; 2.305 ; sdram_reset_ctrl_n_reg ; seq_reg[2]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 2.694      ;
; 2.305 ; sdram_reset_ctrl_n_reg ; seq_reg[11]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.179      ; 2.690      ;
; 2.305 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.179      ; 2.690      ;
; 2.305 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 2.694      ;
; 2.305 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 2.694      ;
; 2.305 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 2.694      ;
; 2.305 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 2.694      ;
; 2.305 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 2.694      ;
; 2.305 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 2.694      ;
; 2.305 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 2.694      ;
; 2.305 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 2.694      ;
; 2.305 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 2.694      ;
; 2.305 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 2.694      ;
; 2.305 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.180      ; 2.691      ;
; 2.305 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.179      ; 2.690      ;
; 2.305 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.179      ; 2.690      ;
; 2.305 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.179      ; 2.690      ;
; 2.305 ; sdram_reset_ctrl_n_reg ; sdram_request_reg                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.182      ; 2.693      ;
; 2.305 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.182      ; 2.693      ;
; 2.305 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.182      ; 2.693      ;
; 2.305 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_psel[0]                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.179      ; 2.690      ;
; 2.305 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.182      ; 2.693      ;
; 2.305 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.182      ; 2.693      ;
; 2.305 ; sdram_reset_ctrl_n_reg ; sdram_request_complete_reg                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.182      ; 2.693      ;
; 2.305 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.179      ; 2.690      ;
; 2.305 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[0]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.180      ; 2.691      ;
; 2.305 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[1]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.180      ; 2.691      ;
; 2.305 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.179      ; 2.690      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; seq_reg[0]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.193      ; 2.705      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; seq_reg[1]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.193      ; 2.705      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; seq_reg[3]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.193      ; 2.705      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; seq_reg[4]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.193      ; 2.705      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; seq_reg[5]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.193      ; 2.705      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; seq_reg[6]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.193      ; 2.705      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; seq_reg[7]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.193      ; 2.705      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; seq_reg[8]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.193      ; 2.705      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; seq_reg[9]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.193      ; 2.705      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; seq_reg[10]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.193      ; 2.705      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_req                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 2.704      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_act                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.190      ; 2.702      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; ram_di_reg[0]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 2.704      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; ram_di_reg[1]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 2.704      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; ram_di_reg[2]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 2.704      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; ram_di_reg[3]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.189      ; 2.701      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; ram_di_reg[4]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.189      ; 2.701      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; ram_di_reg[5]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 2.704      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; ram_di_reg[6]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 2.704      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; ram_di_reg[7]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.189      ; 2.701      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; ram_di_reg[8]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 2.704      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; ram_di_reg[9]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 2.704      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; ram_di_reg[10]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 2.704      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; ram_di_reg[11]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.189      ; 2.701      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; ram_di_reg[12]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.189      ; 2.701      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; ram_di_reg[13]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 2.704      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; ram_di_reg[14]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 2.704      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; ram_di_reg[15]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.189      ; 2.701      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_oe                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.180      ; 2.692      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[5]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.190      ; 2.702      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[8]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.190      ; 2.702      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[9]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.190      ; 2.702      ;
; 2.306 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[11]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.190      ; 2.702      ;
; 2.307 ; sdram_reset_ctrl_n_reg ; ram_do_reg[29]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 2.700      ;
; 2.307 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.189      ; 2.702      ;
; 2.307 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.189      ; 2.702      ;
; 2.307 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.189      ; 2.702      ;
; 2.307 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[1]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 2.700      ;
; 2.307 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[0]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 2.700      ;
; 2.307 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[2]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.189      ; 2.702      ;
; 2.307 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[3]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.189      ; 2.702      ;
; 2.307 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[4]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.189      ; 2.702      ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                        ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+---------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                                                          ; Clock Edge ; Target                    ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+---------------------------+
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[2]              ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[3]              ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[4]              ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[5]              ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[6]              ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[7]              ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[8]              ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[9]              ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[0]         ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[1]         ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[2]         ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[3]         ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[4]         ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[5]         ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[6]         ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[7]         ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[8]         ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[9]         ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[0]   ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[1]   ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[2]   ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[3]   ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[4]   ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[5]   ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[6]   ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[7]   ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[8]   ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[9]   ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[0]   ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[1]   ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[2]   ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[3]   ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[4]   ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[5]   ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[6]   ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[7]   ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[8]   ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[9]   ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[0] ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[1] ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[2] ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[3] ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[4] ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[5] ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[6] ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[7] ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[8] ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[9] ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[0]       ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[1]       ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[2]       ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[3]       ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[4]       ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[5]       ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[6]       ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[7]       ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[0]       ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[1]       ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[2]       ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[3]       ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[4]       ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[5]       ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[6]       ;
; 4.090 ; 4.310        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[7]       ;
; 4.207 ; 4.360        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[0]              ;
; 4.207 ; 4.360        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[1]              ;
; 4.207 ; 4.360        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[2]              ;
; 4.207 ; 4.360        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[3]              ;
; 4.207 ; 4.360        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[4]              ;
; 4.207 ; 4.360        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[5]              ;
; 4.207 ; 4.360        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[6]              ;
; 4.207 ; 4.360        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[7]              ;
; 4.212 ; 4.370        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[0]              ;
; 4.212 ; 4.370        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[1]              ;
; 4.212 ; 4.370        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[2]              ;
; 4.212 ; 4.370        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[3]              ;
; 4.212 ; 4.370        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[4]              ;
; 4.212 ; 4.370        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[5]              ;
; 4.212 ; 4.370        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[6]              ;
; 4.212 ; 4.370        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[7]              ;
; 4.232 ; 4.420        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[2]              ;
; 4.232 ; 4.420        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[3]              ;
; 4.232 ; 4.420        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[4]              ;
; 4.232 ; 4.420        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[5]              ;
; 4.232 ; 4.420        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[6]              ;
; 4.232 ; 4.420        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[7]              ;
; 4.232 ; 4.420        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[8]              ;
; 4.232 ; 4.420        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[9]              ;
; 4.232 ; 4.420        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[0]         ;
; 4.232 ; 4.420        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[1]         ;
; 4.232 ; 4.420        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[2]         ;
; 4.232 ; 4.420        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[3]         ;
; 4.232 ; 4.420        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[4]         ;
; 4.232 ; 4.420        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[5]         ;
; 4.232 ; 4.420        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[6]         ;
; 4.232 ; 4.420        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[7]         ;
; 4.232 ; 4.420        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[8]         ;
; 4.232 ; 4.420        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[9]         ;
; 4.232 ; 4.420        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[0]   ;
; 4.232 ; 4.420        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[1]   ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+---------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                        ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-----------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                                                          ; Clock Edge ; Target                                                    ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-----------------------------------------------------------+
; 5.544 ; 5.764        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[0]                                             ;
; 5.544 ; 5.764        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[10]                                            ;
; 5.544 ; 5.764        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[11]                                            ;
; 5.544 ; 5.764        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[12]                                            ;
; 5.544 ; 5.764        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[13]                                            ;
; 5.544 ; 5.764        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[14]                                            ;
; 5.544 ; 5.764        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[15]                                            ;
; 5.544 ; 5.764        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[16]                                            ;
; 5.544 ; 5.764        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[17]                                            ;
; 5.544 ; 5.764        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[18]                                            ;
; 5.544 ; 5.764        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[19]                                            ;
; 5.544 ; 5.764        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[1]                                             ;
; 5.544 ; 5.764        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[20]                                            ;
; 5.544 ; 5.764        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[21]                                            ;
; 5.544 ; 5.764        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[22]                                            ;
; 5.544 ; 5.764        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[23]                                            ;
; 5.544 ; 5.764        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[24]                                            ;
; 5.544 ; 5.764        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[25]                                            ;
; 5.544 ; 5.764        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[26]                                            ;
; 5.544 ; 5.764        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[27]                                            ;
; 5.544 ; 5.764        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[28]                                            ;
; 5.544 ; 5.764        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[2]                                             ;
; 5.544 ; 5.764        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[30]                                            ;
; 5.544 ; 5.764        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[31]                                            ;
; 5.544 ; 5.764        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[3]                                             ;
; 5.544 ; 5.764        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[4]                                             ;
; 5.544 ; 5.764        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[5]                                             ;
; 5.544 ; 5.764        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[6]                                             ;
; 5.544 ; 5.764        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[7]                                             ;
; 5.544 ; 5.764        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[8]                                             ;
; 5.544 ; 5.764        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[9]                                             ;
; 5.546 ; 5.766        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ;
; 5.546 ; 5.766        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ;
; 5.546 ; 5.766        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ;
; 5.546 ; 5.766        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ;
; 5.546 ; 5.766        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ;
; 5.546 ; 5.766        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ;
; 5.546 ; 5.766        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ;
; 5.546 ; 5.766        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ;
; 5.546 ; 5.766        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ;
; 5.546 ; 5.766        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ;
; 5.546 ; 5.766        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ;
; 5.546 ; 5.766        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ;
; 5.546 ; 5.766        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ;
; 5.546 ; 5.766        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ;
; 5.546 ; 5.766        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ;
; 5.546 ; 5.766        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_psel[0]                     ;
; 5.546 ; 5.766        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ;
; 5.546 ; 5.766        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[0]~_Duplicate_1  ;
; 5.546 ; 5.766        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ;
; 5.546 ; 5.766        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[1]~_Duplicate_1  ;
; 5.546 ; 5.766        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1     ;
; 5.546 ; 5.766        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_act                      ;
; 5.546 ; 5.766        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ;
; 5.546 ; 5.766        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|sdram_rdy                     ;
; 5.546 ; 5.766        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_request_complete_reg                                ;
; 5.546 ; 5.766        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_request_reg                                         ;
; 5.546 ; 5.766        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[11]                                               ;
; 5.546 ; 5.766        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[2]                                                ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_bena_reg[0]                                           ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_bena_reg[1]                                           ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[11]                                            ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[12]                                            ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[15]                                            ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[3]                                             ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[4]                                             ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[7]                                             ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[29]                                            ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[0]                                             ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[10]                                            ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[13]                                            ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[14]                                            ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[1]                                             ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[2]                                             ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[5]                                             ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[6]                                             ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[8]                                             ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[9]                                             ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_act                      ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_reg                      ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_refr_req                    ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[2]~_Duplicate_1  ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[3]~_Duplicate_1  ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[4]~_Duplicate_1  ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_dq_oe                 ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_reg                      ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_refr_act                    ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[11]~_Duplicate_1 ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[5]~_Duplicate_1  ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[6]~_Duplicate_1  ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[7]~_Duplicate_1  ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[8]~_Duplicate_1  ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[9]~_Duplicate_1  ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[0]                                                ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[10]                                               ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[1]                                                ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[3]                                                ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[4]                                                ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-----------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: 'usb_pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                              ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                               ; Clock Edge ; Target                                                                                                                                                                                                         ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|LineDirectControlEn_reg1              ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineState_reg1[1]                   ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|fullSpeedPol_reg1                     ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|fullSpeedRate_reg1                    ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|RxfifoBI:u_RxfifoBI|forceEmptyToggleSyncToUsbClk[0]                                     ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[0]                                                         ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[1]                                                         ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[2]                                                         ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[3]                                                         ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[4]                                                         ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[5]                                                         ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[6]                                                         ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[0]                                             ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[1]                                             ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[2]                                             ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[3]                                             ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[4]                                             ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[5]                                             ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[6]                                             ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|fifoFull                                                                 ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggleSyncToUsbClk[1]                                     ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggleSyncToUsbClk[2]                                     ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[0]                                              ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[1]                                              ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[2]                                              ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[3]                                              ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[4]                                              ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[5]                                              ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[6]                                              ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferOutIndex[0]                                                        ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferOutIndex[1]                                                        ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferOutIndex[2]                                                        ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferOutIndex[3]                                                        ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferOutIndex[4]                                                        ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferOutIndex[5]                                                        ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferOutIndex[6]                                                        ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dataOut[3]                                                               ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dataOut[4]                                                               ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dataOut[5]                                                               ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dataOut[6]                                                               ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dataOut[7]                                                               ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|fifoEmpty                                                                ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|fifoREnDelayed                                                           ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg[3]                          ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg[5]                          ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connEventInExtend[1]                  ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connEventInExtend[2]                  ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|resumeIntInExtend[1]                  ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|resumeIntInExtend[2]                  ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|ACKRxed                                             ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|CRCError                                            ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|CurrState_getPkt.00000                              ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|CurrState_getPkt.00001                              ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|CurrState_getPkt.00010                              ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|CurrState_getPkt.00011                              ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|CurrState_getPkt.00100                              ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|CurrState_getPkt.00101                              ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|CurrState_getPkt.00110                              ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|CurrState_getPkt.00111                              ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|CurrState_getPkt.01000                              ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|CurrState_getPkt.01001                              ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|CurrState_getPkt.01100                              ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|CurrState_getPkt.01101                              ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|CurrState_getPkt.01110                              ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|CurrState_getPkt.01111                              ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|CurrState_getPkt.10000                              ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|CurrState_getPkt.10001                              ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RXPacketRdy                                         ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RXStreamStatus[0]                                   ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RXStreamStatus[1]                                   ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RXTimeOut                                           ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|SIERxTimeOutEn                                      ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|bitStuffError                                       ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|dataSequence                                        ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|rxStatusMonitor:u_rxStatusMonitor|connectionEventOut                      ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|rxStatusMonitor:u_rxStatusMonitor|oldConnectState[0]                      ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|rxStatusMonitor:u_rxStatusMonitor|oldConnectState[1]                      ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|CurrState_sndPkt.01011                            ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|CurrState_sndPkt.10010                            ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|readUSBWireData:u_readUSBWireData|RxBitsInReg[0]      ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|readUSBWireData:u_readUSBWireData|RxBitsInReg[1]      ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|readUSBWireData:u_readUSBWireData|RxBitsInSyncReg2[0] ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|readUSBWireData:u_readUSBWireData|RxBitsInSyncReg2[1] ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|readUSBWireData:u_readUSBWireData|oldRxBitsIn[0]      ;
; 10.144 ; 10.364       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|readUSBWireData:u_readUSBWireData|oldRxBitsIn[1]      ;
; 10.145 ; 10.365       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg[5]                          ;
; 10.145 ; 10.365       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[1]                     ;
; 10.145 ; 10.365       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[4]                     ;
; 10.145 ; 10.365       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[5]                     ;
; 10.145 ; 10.365       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[6]                     ;
; 10.145 ; 10.365       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggleSyncToUsbClk[0]                                     ;
; 10.145 ; 10.365       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dataOut[0]                                                               ;
; 10.145 ; 10.365       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dataOut[1]                                                               ;
; 10.145 ; 10.365       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dataOut[2]                                                               ;
; 10.145 ; 10.365       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|LineDirectControlEn                   ;
; 10.145 ; 10.365       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|LineDirectControlEn_reg1              ;
; 10.145 ; 10.365       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSentInExtend[0]                    ;
; 10.145 ; 10.365       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSentInExtend[1]                    ;
; 10.145 ; 10.365       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSentInExtend[2]                    ;
; 10.145 ; 10.365       ; 0.220          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSync_reg1                          ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                  ;
+--------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                                          ; Clock Edge ; Target                                                                                                                                                                                             ;
+--------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 17.099 ; 17.450       ; 0.351          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[0]                                          ;
; 17.099 ; 17.450       ; 0.351          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[1]                                          ;
; 17.099 ; 17.450       ; 0.351          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[2]                                          ;
; 17.099 ; 17.450       ; 0.351          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[3]                                          ;
; 17.099 ; 17.450       ; 0.351          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[4]                                          ;
; 17.099 ; 17.450       ; 0.351          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[10]                                               ;
; 17.099 ; 17.450       ; 0.351          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[11]                                               ;
; 17.099 ; 17.450       ; 0.351          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[12]                                               ;
; 17.099 ; 17.450       ; 0.351          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[13]                                               ;
; 17.099 ; 17.450       ; 0.351          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[14]                                               ;
; 17.099 ; 17.450       ; 0.351          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[15]                                               ;
; 17.099 ; 17.450       ; 0.351          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[16]                                               ;
; 17.099 ; 17.450       ; 0.351          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[17]                                               ;
; 17.099 ; 17.450       ; 0.351          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[18]                                               ;
; 17.099 ; 17.450       ; 0.351          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[19]                                               ;
; 17.099 ; 17.450       ; 0.351          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[20]                                               ;
; 17.099 ; 17.450       ; 0.351          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[5]                                                ;
; 17.099 ; 17.450       ; 0.351          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[6]                                                ;
; 17.099 ; 17.450       ; 0.351          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[7]                                                ;
; 17.099 ; 17.450       ; 0.351          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[8]                                                ;
; 17.099 ; 17.450       ; 0.351          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[9]                                                ;
; 17.100 ; 17.451       ; 0.351          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[0]                                          ;
; 17.100 ; 17.451       ; 0.351          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[1]                                          ;
; 17.100 ; 17.451       ; 0.351          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[2]                                          ;
; 17.100 ; 17.451       ; 0.351          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[3]                                          ;
; 17.100 ; 17.451       ; 0.351          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[4]                                          ;
; 17.100 ; 17.451       ; 0.351          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[10]                                               ;
; 17.100 ; 17.451       ; 0.351          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[11]                                               ;
; 17.100 ; 17.451       ; 0.351          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[12]                                               ;
; 17.100 ; 17.451       ; 0.351          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[13]                                               ;
; 17.100 ; 17.451       ; 0.351          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[14]                                               ;
; 17.100 ; 17.451       ; 0.351          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[15]                                               ;
; 17.100 ; 17.451       ; 0.351          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[16]                                               ;
; 17.100 ; 17.451       ; 0.351          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[17]                                               ;
; 17.100 ; 17.451       ; 0.351          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[18]                                               ;
; 17.100 ; 17.451       ; 0.351          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[19]                                               ;
; 17.100 ; 17.451       ; 0.351          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[20]                                               ;
; 17.100 ; 17.451       ; 0.351          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[5]                                                ;
; 17.100 ; 17.451       ; 0.351          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[6]                                                ;
; 17.100 ; 17.451       ; 0.351          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[7]                                                ;
; 17.100 ; 17.451       ; 0.351          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[8]                                                ;
; 17.100 ; 17.451       ; 0.351          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[9]                                                ;
; 17.176 ; 17.396       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSentInSTB[2]           ;
; 17.176 ; 17.396       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|clrTransReqSTB[2]         ;
; 17.176 ; 17.396       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connEventInSTB[2]         ;
; 17.176 ; 17.396       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connectStateInSTB[1]      ;
; 17.176 ; 17.396       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connectStateInSTB_reg1[1] ;
; 17.179 ; 17.399       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB[11]           ;
; 17.179 ; 17.399       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB[12]           ;
; 17.179 ; 17.399       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB[8]            ;
; 17.179 ; 17.399       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB[9]            ;
; 17.179 ; 17.399       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[11]      ;
; 17.179 ; 17.399       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[12]      ;
; 17.179 ; 17.399       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[8]       ;
; 17.179 ; 17.399       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[9]       ;
; 17.179 ; 17.399       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connectStateInSTB[0]      ;
; 17.179 ; 17.399       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connectStateInSTB[1]      ;
; 17.179 ; 17.399       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connectStateInSTB_reg1[0] ;
; 17.179 ; 17.399       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connectStateInSTB_reg1[1] ;
; 17.180 ; 17.400       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[0]                                  ;
; 17.180 ; 17.400       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[1]                                  ;
; 17.180 ; 17.400       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[2]                                  ;
; 17.180 ; 17.400       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[3]                                  ;
; 17.180 ; 17.400       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[4]                                  ;
; 17.180 ; 17.400       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[5]                                  ;
; 17.180 ; 17.400       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[6]                                  ;
; 17.180 ; 17.400       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB[4]       ;
; 17.180 ; 17.400       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[2]  ;
; 17.180 ; 17.400       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[4]  ;
; 17.180 ; 17.400       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[5]  ;
; 17.181 ; 17.401       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[0]  ;
; 17.181 ; 17.401       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[1]  ;
; 17.181 ; 17.401       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[3]  ;
; 17.181 ; 17.401       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[6]  ;
; 17.181 ; 17.401       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[7]  ;
; 17.182 ; 17.402       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[0]  ;
; 17.182 ; 17.402       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[1]  ;
; 17.182 ; 17.402       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[3]  ;
; 17.182 ; 17.402       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[7]  ;
; 17.184 ; 17.404       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[0]                                  ;
; 17.184 ; 17.404       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[1]                                  ;
; 17.184 ; 17.404       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[2]                                  ;
; 17.184 ; 17.404       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[3]                                  ;
; 17.184 ; 17.404       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[4]                                  ;
; 17.184 ; 17.404       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[5]                                  ;
; 17.184 ; 17.404       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[6]                                  ;
; 17.184 ; 17.404       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB[2]       ;
; 17.184 ; 17.404       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB[4]       ;
; 17.184 ; 17.404       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB[6]       ;
; 17.184 ; 17.404       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[2]  ;
; 17.184 ; 17.404       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[4]  ;
; 17.184 ; 17.404       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[5]  ;
; 17.184 ; 17.404       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[6]  ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|csync_dly                                                                                                                                                                            ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|sof_dly[0]                                                                                                                                                                           ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|sof_dly[1]                                                                                                                                                                           ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[0]           ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[15]                                                                                          ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[17]                                                                                          ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[18]                                                                                          ;
+--------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                   ;
+--------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                                         ; Clock Edge ; Target                                                                                              ;
+--------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------+
; 17.433 ; 17.433       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]                      ;
; 17.433 ; 17.433       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]                      ;
; 17.433 ; 17.433       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]                      ;
; 17.433 ; 17.433       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]                      ;
; 17.433 ; 17.433       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|observablevcoout            ;
; 17.438 ; 17.438       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|inclk[0] ;
; 17.438 ; 17.438       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|outclk   ;
; 17.443 ; 17.443       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]                    ;
; 17.476 ; 17.476       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]                    ;
; 17.481 ; 17.481       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|inclk[0] ;
; 17.481 ; 17.481       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|outclk   ;
; 17.485 ; 17.485       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]                      ;
; 17.485 ; 17.485       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]                      ;
; 17.485 ; 17.485       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]                      ;
; 17.485 ; 17.485       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]                      ;
; 17.485 ; 17.485       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|observablevcoout            ;
+--------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: 'FPGA_CLK'                                                                                                                        ;
+---------+--------------+----------------+------------------+----------+------------+-----------------------------------------------------------------------------------------+
; Slack   ; Actual Width ; Required Width ; Type             ; Clock    ; Clock Edge ; Target                                                                                  ;
+---------+--------------+----------------+------------------+----------+------------+-----------------------------------------------------------------------------------------+
; 99.796  ; 99.796       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 99.796  ; 99.796       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 99.798  ; 99.798       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                                     ;
; 99.798  ; 99.798       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|observablevcoout                           ;
; 99.818  ; 99.818       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; FPGA_CLK~input|o                                                                        ;
; 99.850  ; 99.850       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 99.852  ; 99.852       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|inclk[0]                                   ;
; 100.000 ; 100.000      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; FPGA_CLK~input|i                                                                        ;
; 100.000 ; 100.000      ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; FPGA_CLK~input|i                                                                        ;
; 100.147 ; 100.147      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|inclk[0]                                   ;
; 100.149 ; 100.149      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 100.182 ; 100.182      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; FPGA_CLK~input|o                                                                        ;
; 100.200 ; 100.200      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                                     ;
; 100.200 ; 100.200      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|observablevcoout                           ;
; 100.202 ; 100.202      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 100.202 ; 100.202      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 196.000 ; 200.000      ; 4.000          ; Port Rate        ; FPGA_CLK ; Rise       ; FPGA_CLK                                                                                ;
+---------+--------------+----------------+------------------+----------+------------+-----------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                                                              ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 2.724 ; 2.903 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 2.705 ; 2.884 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 2.705 ; 2.884 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 2.705 ; 2.884 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 2.708 ; 2.887 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 2.717 ; 2.896 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 2.698 ; 2.877 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 2.697 ; 2.876 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 2.656 ; 2.834 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 2.717 ; 2.896 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 2.724 ; 2.903 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 2.719 ; 2.898 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 2.719 ; 2.898 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 2.719 ; 2.898 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 2.718 ; 2.897 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 2.718 ; 2.897 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 2.718 ; 2.897 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0       ; FPGA_CLK   ; 3.932 ; 4.039 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 0.790 ; 0.969 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dminus2       ; FPGA_CLK   ; 0.796 ; 0.975 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus1        ; FPGA_CLK   ; 0.799 ; 0.978 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus2        ; FPGA_CLK   ; 0.793 ; 0.972 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                                                 ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; -1.783 ; -1.961 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; -1.828 ; -2.007 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; -1.828 ; -2.007 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; -1.828 ; -2.007 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; -1.831 ; -2.010 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; -1.840 ; -2.019 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; -1.821 ; -2.000 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; -1.820 ; -1.999 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; -1.783 ; -1.961 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; -1.840 ; -2.019 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; -1.847 ; -2.026 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; -1.842 ; -2.021 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; -1.842 ; -2.021 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; -1.842 ; -2.021 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; -1.841 ; -2.020 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; -1.841 ; -2.020 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; -1.841 ; -2.020 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0       ; FPGA_CLK   ; -2.950 ; -3.050 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; -0.173 ; -0.352 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dminus2       ; FPGA_CLK   ; -0.179 ; -0.358 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus1        ; FPGA_CLK   ; -0.182 ; -0.361 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus2        ; FPGA_CLK   ; -0.176 ; -0.355 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                                                      ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_A[*]    ; FPGA_CLK   ; 5.688  ; 5.935  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]   ; FPGA_CLK   ; 3.084  ; 2.871  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]   ; FPGA_CLK   ; 3.084  ; 2.871  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]   ; FPGA_CLK   ; 3.087  ; 2.874  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]   ; FPGA_CLK   ; 3.087  ; 2.874  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]   ; FPGA_CLK   ; 3.074  ; 2.861  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]   ; FPGA_CLK   ; 3.074  ; 2.861  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]   ; FPGA_CLK   ; 3.072  ; 2.859  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]   ; FPGA_CLK   ; 2.251  ; 2.177  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]   ; FPGA_CLK   ; 5.688  ; 5.935  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]   ; FPGA_CLK   ; 3.073  ; 2.860  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]  ; FPGA_CLK   ; 3.084  ; 2.871  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]  ; FPGA_CLK   ; 3.073  ; 2.860  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]   ; FPGA_CLK   ; 5.701  ; 5.948  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]  ; FPGA_CLK   ; 5.701  ; 5.948  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]  ; FPGA_CLK   ; 2.264  ; 2.190  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N   ; FPGA_CLK   ; 2.265  ; 2.191  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N    ; FPGA_CLK   ; 3.085  ; 2.872  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]   ; FPGA_CLK   ; 5.024  ; 5.448  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 3.455  ; 3.310  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 3.455  ; 3.310  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 3.455  ; 3.310  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 5.024  ; 5.448  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 5.015  ; 5.439  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 2.421  ; 2.400  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 3.283  ; 3.129  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 3.086  ; 2.873  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 3.443  ; 3.298  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 5.008  ; 5.432  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 3.441  ; 3.296  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 3.441  ; 3.296  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 3.441  ; 3.296  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 5.014  ; 5.438  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 3.442  ; 3.297  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 3.442  ; 3.297  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n  ; FPGA_CLK   ; 3.074  ; 2.861  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n  ; FPGA_CLK   ; 3.086  ; 2.873  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N   ; FPGA_CLK   ; 3.085  ; 2.872  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N    ; FPGA_CLK   ; 5.703  ; 5.950  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L       ; FPGA_CLK   ; 8.045  ; 8.431  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R       ; FPGA_CLK   ; 6.015  ; 5.887  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK        ; FPGA_CLK   ; 3.411  ; 3.357  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD        ; FPGA_CLK   ; 3.475  ; 3.435  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3       ; FPGA_CLK   ; 3.643  ; 3.723  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK     ; FPGA_CLK   ; 12.195 ;        ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK     ; FPGA_CLK   ;        ; 12.543 ; Fall       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]      ; FPGA_CLK   ; 4.868  ; 5.254  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]     ; FPGA_CLK   ; 2.252  ; 2.178  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]     ; FPGA_CLK   ; 4.868  ; 5.254  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]     ; FPGA_CLK   ; 2.251  ; 2.177  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]     ; FPGA_CLK   ; 2.254  ; 2.180  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]      ; FPGA_CLK   ; 4.870  ; 5.256  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]     ; FPGA_CLK   ; 2.253  ; 2.179  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]     ; FPGA_CLK   ; 2.253  ; 2.179  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]     ; FPGA_CLK   ; 2.253  ; 2.179  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]     ; FPGA_CLK   ; 4.870  ; 5.256  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; dminus1       ; FPGA_CLK   ; 4.249  ; 4.237  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dminus2       ; FPGA_CLK   ; 4.063  ; 4.042  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus1        ; FPGA_CLK   ; 6.673  ; 7.097  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus2        ; FPGA_CLK   ; 4.066  ; 4.045  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                                                              ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_A[*]    ; FPGA_CLK   ; 1.524  ; 1.450  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]   ; FPGA_CLK   ; 2.324  ; 2.116  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]   ; FPGA_CLK   ; 2.324  ; 2.116  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]   ; FPGA_CLK   ; 2.327  ; 2.119  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]   ; FPGA_CLK   ; 2.327  ; 2.119  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]   ; FPGA_CLK   ; 2.315  ; 2.107  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]   ; FPGA_CLK   ; 2.315  ; 2.107  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]   ; FPGA_CLK   ; 2.313  ; 2.105  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]   ; FPGA_CLK   ; 1.524  ; 1.450  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]   ; FPGA_CLK   ; 4.929  ; 5.181  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]   ; FPGA_CLK   ; 2.314  ; 2.106  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]  ; FPGA_CLK   ; 2.324  ; 2.116  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]  ; FPGA_CLK   ; 2.314  ; 2.106  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]   ; FPGA_CLK   ; 1.536  ; 1.462  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]  ; FPGA_CLK   ; 4.941  ; 5.193  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]  ; FPGA_CLK   ; 1.536  ; 1.462  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N   ; FPGA_CLK   ; 1.538  ; 1.464  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N    ; FPGA_CLK   ; 2.326  ; 2.118  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]   ; FPGA_CLK   ; 1.694  ; 1.674  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 2.694  ; 2.556  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 2.694  ; 2.556  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 2.694  ; 2.556  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 4.297  ; 4.722  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 4.288  ; 4.713  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 1.694  ; 1.674  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 2.522  ; 2.375  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 2.326  ; 2.118  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 2.682  ; 2.544  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 4.281  ; 4.706  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 2.680  ; 2.542  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 2.680  ; 2.542  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 2.680  ; 2.542  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 4.287  ; 4.712  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 2.681  ; 2.543  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 2.681  ; 2.543  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n  ; FPGA_CLK   ; 2.315  ; 2.107  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n  ; FPGA_CLK   ; 2.326  ; 2.118  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N   ; FPGA_CLK   ; 2.326  ; 2.118  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N    ; FPGA_CLK   ; 4.943  ; 5.195  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L       ; FPGA_CLK   ; 7.107  ; 7.492  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R       ; FPGA_CLK   ; 5.054  ; 4.928  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK        ; FPGA_CLK   ; 2.553  ; 2.498  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD        ; FPGA_CLK   ; 2.616  ; 2.575  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3       ; FPGA_CLK   ; 2.773  ; 2.853  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK     ; FPGA_CLK   ; 11.406 ;        ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK     ; FPGA_CLK   ;        ; 11.756 ; Fall       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]      ; FPGA_CLK   ; 1.524  ; 1.450  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]     ; FPGA_CLK   ; 1.525  ; 1.451  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]     ; FPGA_CLK   ; 4.141  ; 4.527  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]     ; FPGA_CLK   ; 1.524  ; 1.450  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]     ; FPGA_CLK   ; 1.527  ; 1.453  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]      ; FPGA_CLK   ; 1.526  ; 1.452  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]     ; FPGA_CLK   ; 1.526  ; 1.452  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]     ; FPGA_CLK   ; 1.526  ; 1.452  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]     ; FPGA_CLK   ; 1.526  ; 1.452  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]     ; FPGA_CLK   ; 4.143  ; 4.529  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; dminus1       ; FPGA_CLK   ; 3.782  ; 3.771  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dminus2       ; FPGA_CLK   ; 3.596  ; 3.576  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus1        ; FPGA_CLK   ; 6.206  ; 6.631  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus2        ; FPGA_CLK   ; 3.599  ; 3.579  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                                                      ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 3.201 ; 3.115 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 4.495 ; 4.419 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 4.495 ; 4.419 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 4.495 ; 4.419 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 6.543 ; 6.904 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 6.192 ; 6.553 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 3.201 ; 3.115 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 3.476 ; 3.390 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 3.422 ; 3.274 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 5.559 ; 5.483 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 7.631 ; 7.992 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 4.852 ; 4.776 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 4.852 ; 4.776 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 4.852 ; 4.776 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 7.256 ; 7.617 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 4.826 ; 4.750 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 4.826 ; 4.750 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 3.923 ; 3.775 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 5.621 ; 5.545 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dminus2       ; FPGA_CLK   ; 7.120 ; 7.034 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus1        ; FPGA_CLK   ; 8.430 ; 8.791 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus2        ; FPGA_CLK   ; 7.115 ; 7.029 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                                                              ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 2.362 ; 2.276 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 3.612 ; 3.536 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 3.612 ; 3.536 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 3.612 ; 3.536 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 5.674 ; 6.035 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 5.338 ; 5.699 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 2.362 ; 2.276 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 2.626 ; 2.540 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 2.538 ; 2.390 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 4.633 ; 4.557 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 6.719 ; 7.080 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 3.954 ; 3.878 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 3.954 ; 3.878 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 3.954 ; 3.878 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 6.359 ; 6.720 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 3.929 ; 3.853 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 3.929 ; 3.853 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 3.019 ; 2.871 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 5.018 ; 4.942 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dminus2       ; FPGA_CLK   ; 6.450 ; 6.364 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus1        ; FPGA_CLK   ; 7.812 ; 8.173 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus2        ; FPGA_CLK   ; 6.446 ; 6.360 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                                                             ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 3.136     ; 3.222     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 4.433     ; 4.509     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 4.433     ; 4.509     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 4.433     ; 4.509     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 6.913     ; 6.552     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 6.565     ; 6.204     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 3.136     ; 3.222     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 3.391     ; 3.477     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 3.269     ; 3.417     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 5.493     ; 5.569     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 8.011     ; 7.650     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 4.794     ; 4.870     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 4.794     ; 4.870     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 4.794     ; 4.870     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 7.633     ; 7.272     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 4.767     ; 4.843     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 4.767     ; 4.843     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 3.761     ; 3.909     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 5.563     ; 5.639     ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dminus2       ; FPGA_CLK   ; 7.127     ; 7.213     ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus1        ; FPGA_CLK   ; 8.806     ; 8.445     ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus2        ; FPGA_CLK   ; 7.124     ; 7.210     ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                                                     ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 2.296     ; 2.382     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 3.549     ; 3.625     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 3.549     ; 3.625     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 3.549     ; 3.625     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 6.045     ; 5.684     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 5.710     ; 5.349     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 2.296     ; 2.382     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 2.541     ; 2.627     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 2.385     ; 2.533     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 4.567     ; 4.643     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 7.099     ; 6.738     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 3.895     ; 3.971     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 3.895     ; 3.971     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 3.895     ; 3.971     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 6.736     ; 6.375     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 3.869     ; 3.945     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 3.869     ; 3.945     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 2.857     ; 3.005     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 4.959     ; 5.035     ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dminus2       ; FPGA_CLK   ; 6.453     ; 6.539     ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus1        ; FPGA_CLK   ; 8.188     ; 7.827     ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus2        ; FPGA_CLK   ; 6.451     ; 6.537     ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+


----------------------------------------------
; Slow 1200mV 85C Model Metastability Report ;
----------------------------------------------
No synchronizer chains to report.


+----------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Fmax Summary                                                                                    ;
+------------+-----------------+--------------------------------------------------------------------------------+------+
; Fmax       ; Restricted Fmax ; Clock Name                                                                     ; Note ;
+------------+-----------------+--------------------------------------------------------------------------------+------+
; 38.33 MHz  ; 38.33 MHz       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;      ;
; 119.33 MHz ; 119.33 MHz      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;      ;
; 151.52 MHz ; 151.52 MHz      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;      ;
; 237.76 MHz ; 237.76 MHz      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;      ;
+------------+-----------------+--------------------------------------------------------------------------------+------+
This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods.  FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock.  Paths of different clocks, including generated clocks, are ignored.  For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.


+---------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup Summary                                                                      ;
+--------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                          ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; -2.907 ; -220.428      ;
; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; -0.287 ; -10.149       ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 1.001  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 4.524  ; 0.000         ;
+--------------------------------------------------------------------------------+--------+---------------+


+---------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold Summary                                                                       ;
+--------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                          ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------------------+--------+---------------+
; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; -1.474 ; -107.385      ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.348  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.363  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.405  ; 0.000         ;
+--------------------------------------------------------------------------------+--------+---------------+


+--------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery Summary                                                                  ;
+--------------------------------------------------------------------------------+-------+---------------+
; Clock                                                                          ; Slack ; End Point TNS ;
+--------------------------------------------------------------------------------+-------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 6.042 ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.363 ; 0.000         ;
+--------------------------------------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal Summary                                                                   ;
+--------------------------------------------------------------------------------+-------+---------------+
; Clock                                                                          ; Slack ; End Point TNS ;
+--------------------------------------------------------------------------------+-------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 1.300 ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 1.683 ; 0.000         ;
+--------------------------------------------------------------------------------+-------+---------------+


+---------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width Summary                                                        ;
+--------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                          ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 4.089  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.525  ; 0.000         ;
; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; 10.123 ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.122 ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0]  ; 17.428 ; 0.000         ;
; FPGA_CLK                                                                       ; 99.778 ; 0.000         ;
+--------------------------------------------------------------------------------+--------+---------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                ;
+--------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                                                                                                                          ; To Node                                                                                                                                                                                            ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+--------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; -2.907 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RxPID[0]                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPIDInSTB_reg1[0]        ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -2.106     ; 0.843      ;
; -2.775 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|resumeIntInExtend[0]      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|resumeIntInSTB[2]         ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -2.107     ; 0.710      ;
; -2.745 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[15]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[15]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.730     ; 1.057      ;
; -2.743 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[8]                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[8]       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.766     ; 1.019      ;
; -2.719 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[10]                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[10]    ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.730     ; 1.031      ;
; -2.717 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[10]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[10]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.730     ; 1.029      ;
; -2.709 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[5]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[5]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.730     ; 1.021      ;
; -2.694 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[0]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[0]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.730     ; 1.006      ;
; -2.682 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[8]                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[8]       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.703     ; 1.021      ;
; -2.624 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[12]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[12]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.766     ; 0.900      ;
; -2.620 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[0]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[0]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.762     ; 0.900      ;
; -2.602 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[6]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[6]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.762     ; 0.882      ;
; -2.601 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[4]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[4]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.762     ; 0.881      ;
; -2.598 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[3]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[3]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.758     ; 0.882      ;
; -2.597 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[11]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[11]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.766     ; 0.873      ;
; -2.597 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[9]                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[9]       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.766     ; 0.873      ;
; -2.596 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[0]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[0]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.758     ; 0.880      ;
; -2.593 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[13]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[13]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.730     ; 0.905      ;
; -2.573 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[9]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[9]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.730     ; 0.885      ;
; -2.572 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[4]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[4]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.730     ; 0.884      ;
; -2.571 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[1]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[1]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.730     ; 0.883      ;
; -2.569 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[14]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[14]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.730     ; 0.881      ;
; -2.560 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RxPID[3]                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPIDInSTB_reg1[3]        ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.731     ; 0.871      ;
; -2.560 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[10]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[10]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.703     ; 0.899      ;
; -2.559 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[2]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[2]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.718     ; 0.883      ;
; -2.555 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RxPID[2]                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPIDInSTB_reg1[2]        ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.731     ; 0.866      ;
; -2.555 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RxPID[1]                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPIDInSTB_reg1[1]        ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.731     ; 0.866      ;
; -2.551 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIEReceiver:u_SIEReceiver|connectState[0] ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connectStateInSTB_reg1[0] ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.703     ; 0.890      ;
; -2.550 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[8]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[8]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.730     ; 0.862      ;
; -2.543 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RxPID[3]                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPIDInSTB_reg1[3]        ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.719     ; 0.866      ;
; -2.534 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|resumeIntInExtend[0]      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|resumeIntInSTB[2]         ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.720     ; 0.856      ;
; -2.531 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[11]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[11]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.703     ; 0.870      ;
; -2.530 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[8]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[8]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.690     ; 0.882      ;
; -2.522 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RxPID[2]                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPIDInSTB_reg1[2]        ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.719     ; 0.845      ;
; -2.522 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RxPID[0]                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPIDInSTB_reg1[0]        ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.719     ; 0.845      ;
; -2.519 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSentInExtend[0]        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSentInSTB[2]           ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.720     ; 0.841      ;
; -2.468 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[4]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[4]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.758     ; 0.752      ;
; -2.463 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[5]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[5]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.762     ; 0.743      ;
; -2.463 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|bitStuffError                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[1]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.771     ; 0.734      ;
; -2.460 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RXTimeOut                               ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[3]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.771     ; 0.731      ;
; -2.460 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|CRCError                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[0]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.771     ; 0.731      ;
; -2.458 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[6]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[6]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.758     ; 0.742      ;
; -2.458 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIEReceiver:u_SIEReceiver|connectState[1] ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connectStateInSTB_reg1[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.767     ; 0.733      ;
; -2.457 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIEReceiver:u_SIEReceiver|connectState[1] ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connectStateInSTB_reg1[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.766     ; 0.733      ;
; -2.456 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIEReceiver:u_SIEReceiver|connectState[0] ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connectStateInSTB_reg1[0] ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.766     ; 0.732      ;
; -2.453 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[2]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[2]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.762     ; 0.733      ;
; -2.452 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[1]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[1]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.762     ; 0.732      ;
; -2.452 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[3]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[3]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.762     ; 0.732      ;
; -2.448 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|bitStuffError                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[1]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.757     ; 0.733      ;
; -2.447 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[1]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[1]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.758     ; 0.731      ;
; -2.447 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[2]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[2]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.758     ; 0.731      ;
; -2.447 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[5]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[5]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.758     ; 0.731      ;
; -2.447 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RXOverflow                              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[2]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.754     ; 0.735      ;
; -2.446 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RXTimeOut                               ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[3]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.757     ; 0.731      ;
; -2.446 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|CRCError                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[0]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.757     ; 0.731      ;
; -2.443 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|NAKRxed                                 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[4]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.754     ; 0.731      ;
; -2.443 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|stallRxed                               ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[5]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.754     ; 0.731      ;
; -2.441 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|dataSequence                            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[7]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.771     ; 0.712      ;
; -2.441 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RXOverflow                              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[2]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.751     ; 0.732      ;
; -2.441 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[9]                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[9]       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.730     ; 0.753      ;
; -2.440 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|NAKRxed                                 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[4]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.751     ; 0.731      ;
; -2.440 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|stallRxed                               ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[5]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.751     ; 0.731      ;
; -2.434 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSentInExtend[0]        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSentInSTB[2]           ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.766     ; 0.710      ;
; -2.434 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connEventInExtend[0]      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connEventInSTB[2]         ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.766     ; 0.710      ;
; -2.433 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|clrTransReqExtend[0]      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|clrTransReqSTB[2]         ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.766     ; 0.709      ;
; -2.427 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|ACKRxed                                 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[6]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.757     ; 0.712      ;
; -2.425 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|dataSequence                            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[7]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.757     ; 0.710      ;
; -2.422 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[14]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[14]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.730     ; 0.734      ;
; -2.421 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[3]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[3]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.730     ; 0.733      ;
; -2.421 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[7]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[7]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.730     ; 0.733      ;
; -2.421 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[15]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[15]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.730     ; 0.733      ;
; -2.421 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|ACKRxed                                 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[6]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.751     ; 0.712      ;
; -2.421 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[6]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[6]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.730     ; 0.733      ;
; -2.420 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[12]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[12]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.730     ; 0.732      ;
; -2.420 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[13]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[13]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.730     ; 0.732      ;
; -2.419 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[2]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[2]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.730     ; 0.731      ;
; -2.411 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RxPID[1]                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPIDInSTB_reg1[1]        ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.742     ; 0.711      ;
; -2.410 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[6]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[6]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.719     ; 0.733      ;
; -2.409 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[5]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[5]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.719     ; 0.732      ;
; -2.409 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[10]                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[10]    ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.719     ; 0.732      ;
; -2.408 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[4]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[4]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.719     ; 0.731      ;
; -2.408 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[0]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[0]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.719     ; 0.731      ;
; -2.401 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|clrTransReqExtend[0]      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|clrTransReqSTB[2]         ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.732     ; 0.711      ;
; -2.398 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connEventInExtend[0]      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connEventInSTB[2]         ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.730     ; 0.710      ;
; -2.383 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[9]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[9]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.690     ; 0.735      ;
; -2.381 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[7]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[7]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.690     ; 0.733      ;
; -2.380 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[3]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[3]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.690     ; 0.732      ;
; -2.379 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[1]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[1]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.690     ; 0.731      ;
; 3.836  ; sdram_request_complete_reg                                                                                                                                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|pokey_noise_filter:pokey_noise_filter1|out_reg                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.164     ; 7.639      ;
; 4.033  ; ram_do_reg[6]                                                                                                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.142     ; 7.464      ;
; 4.073  ; sdram_request_complete_reg                                                                                                                                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[1]                                                                                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.145     ; 7.421      ;
; 4.082  ; ram_do_reg[6]                                                                                                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32]                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.137     ; 7.420      ;
; 4.090  ; ram_do_reg[6]                                                                                                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37]                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.141     ; 7.408      ;
; 4.122  ; sdram_request_complete_reg                                                                                                                                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|pot0_reg[3]                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.158     ; 7.359      ;
; 4.122  ; sdram_request_complete_reg                                                                                                                                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|pot0_reg[2]                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.158     ; 7.359      ;
; 4.123  ; sdram_request_complete_reg                                                                                                                                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[2]                                                                                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.145     ; 7.371      ;
; 4.154  ; sdram_request_complete_reg                                                                                                                                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|pot0_reg[4]                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.159     ; 7.326      ;
; 4.154  ; sdram_request_complete_reg                                                                                                                                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|pot0_reg[5]                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.159     ; 7.326      ;
; 4.155  ; sdram_request_complete_reg                                                                                                                                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[6]                                                                                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.145     ; 7.339      ;
; 4.155  ; ram_do_reg[7]                                                                                                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.142     ; 7.342      ;
+--------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: 'usb_pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                          ;
+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                                                                                                                                       ; To Node                                                                                                                                                                                                         ; Launch Clock                                                                   ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; -0.287 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[4]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[4]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.380      ;
; -0.283 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[1]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[1]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.376      ;
; -0.280 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[5]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[5]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.042      ; 1.362      ;
; -0.271 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[4]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[4]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.042      ; 1.353      ;
; -0.267 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[2]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[2]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.042      ; 1.349      ;
; -0.256 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[0]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineState_reg1[0]                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.349      ;
; -0.254 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[2]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[2]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.054      ; 1.348      ;
; -0.250 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[6]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[6]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.042      ; 1.332      ;
; -0.212 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[1]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[1]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.042      ; 1.294      ;
; -0.203 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[0]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[0]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.062      ; 1.305      ;
; -0.193 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[0]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[0]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.042      ; 1.275      ;
; -0.192 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[2]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[2]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.042      ; 1.274      ;
; -0.174 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[6]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[6]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.042      ; 1.256      ;
; -0.167 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[3]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[3]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.260      ;
; -0.158 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[2]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[2]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.251      ;
; -0.156 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[2]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[2]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.249      ;
; -0.150 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[5]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[5]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.243      ;
; -0.149 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxSOFEnableRegSTB                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxSOFEnableReg_reg1                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.242      ;
; -0.146 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[3]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[3]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.042      ; 1.228      ;
; -0.144 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[2]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[2]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.237      ;
; -0.142 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[3]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[3]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.043      ; 1.225      ;
; -0.139 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSyncSTB                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSync_reg1                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.054      ; 1.233      ;
; -0.139 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[3]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[3]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.232      ;
; -0.138 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|RxfifoBI:u_RxfifoBI|forceEmptyToggle                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|RxfifoBI:u_RxfifoBI|forceEmptyToggleSyncToUsbClk[0]                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.042      ; 1.220      ;
; -0.138 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|preambleEnSTB                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|preambleEn_reg1                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.041      ; 1.219      ;
; -0.138 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[4]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[4]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.043      ; 1.221      ;
; -0.136 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[2]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|LineDirectControlEn_reg1               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.044      ; 1.220      ;
; -0.136 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSyncSTB                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSync_reg1                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.041      ; 1.217      ;
; -0.133 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|isoEnSTB                               ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|isoEn_reg1                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.041      ; 1.214      ;
; -0.126 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[3]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[3]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.219      ;
; -0.126 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[3]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[3]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.041      ; 1.207      ;
; -0.123 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|transReqSTB                            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|transReq_reg1                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.054      ; 1.217      ;
; -0.121 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[6]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[6]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.214      ;
; -0.120 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[5]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[5]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.213      ;
; -0.116 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[3]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[3]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.209      ;
; -0.115 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeRegSTB[0]                   ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeReg_reg1[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.208      ;
; -0.114 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[6]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[6]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.207      ;
; -0.113 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[2]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[2]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.206      ;
; -0.112 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeRegSTB[1]                   ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeReg_reg1[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.041      ; 1.193      ;
; -0.111 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[6]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[6]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.204      ;
; -0.111 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[2]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[2]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.041      ; 1.192      ;
; -0.111 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[3]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[3]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.204      ;
; -0.110 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|preambleEnSTB                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|preambleEn_reg1                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.054      ; 1.204      ;
; -0.109 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeRegSTB[0]                   ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeReg_reg1[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.041      ; 1.190      ;
; -0.108 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[1]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineState_reg1[1]                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.044      ; 1.192      ;
; -0.108 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[6]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[6]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.043      ; 1.191      ;
; -0.107 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[1]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[1]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.200      ;
; -0.106 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[0]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[0]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.199      ;
; -0.105 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[1]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[1]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.043      ; 1.188      ;
; -0.104 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[5]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[5]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.043      ; 1.187      ;
; -0.103 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[1]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[1]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.196      ;
; -0.103 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[0]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[0]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.196      ;
; -0.102 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[4]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[4]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.195      ;
; -0.101 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxSOFEnableRegSTB                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxSOFEnableReg_reg1                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.194      ;
; -0.099 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[0]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[0]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.192      ;
; -0.093 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[3]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|fullSpeedPol_reg1                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.044      ; 1.177      ;
; -0.093 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeRegSTB[1]                   ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeReg_reg1[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.054      ; 1.187      ;
; -0.092 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[4]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[4]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.043      ; 1.175      ;
; -0.092 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggle                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggleSyncToUsbClk[0]                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.043      ; 1.175      ;
; -0.091 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[4]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|fullSpeedRate_reg1                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.044      ; 1.175      ;
; -0.089 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[0]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[0]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.182      ;
; -0.088 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[3]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|fullSpeedPol_reg1                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.181      ;
; -0.087 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[4]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|fullSpeedRate_reg1                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.180      ;
; -0.087 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|isoEnSTB                               ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|isoEn_reg1                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.054      ; 1.181      ;
; -0.084 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[1]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineState_reg1[1]                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.177      ;
; -0.083 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[0]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[0]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.042      ; 1.165      ;
; -0.083 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[0]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineState_reg1[0]                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.176      ;
; -0.082 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[0]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[0]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.175      ;
; -0.081 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[5]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[5]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.043      ; 1.164      ;
; -0.081 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[2]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|LineDirectControlEn_reg1               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.174      ;
; -0.081 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[1]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[1]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.174      ;
; -0.079 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|hostSlaveMuxBI:u_hostSlaveMuxBI|rstShift[0]                                                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|hostSlaveMuxBI:u_hostSlaveMuxBI|rstSyncToUsbClkFirst                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.172      ;
; -0.064 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[4]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[4]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.157      ;
; -0.062 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[5]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[5]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.155      ;
; -0.058 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|transReqSTB                            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|transReq_reg1                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.151      ;
; -0.057 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|hostSlaveMuxBI:u_hostSlaveMuxBI|rstShift[0]                                                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|hostSlaveMuxBI:u_hostSlaveMuxBI|rstSyncToUsbClkFirst                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.150      ;
; -0.048 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggle                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggleSyncToUsbClk[0]                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.141      ;
; -0.046 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|RxfifoBI:u_RxfifoBI|forceEmptyToggle                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|RxfifoBI:u_RxfifoBI|forceEmptyToggleSyncToUsbClk[0]                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.139      ;
; -0.018 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[1]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[1]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.042      ; 1.100      ;
; -0.015 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[1]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[1]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 1.053      ; 1.108      ;
; 12.453 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[1]                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.101                              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.444     ; 7.935      ;
; 12.473 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[0]                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.101                              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.444     ; 7.915      ;
; 12.736 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[1]                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.011                              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.444     ; 7.652      ;
; 12.750 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[1]                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.001                              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.444     ; 7.638      ;
; 12.756 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[0]                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.011                              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.444     ; 7.632      ;
; 12.760 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[1]                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.110                              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.444     ; 7.628      ;
; 12.770 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[0]                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.001                              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.444     ; 7.618      ;
; 12.780 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[0]                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.110                              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.444     ; 7.608      ;
; 12.904 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.100101 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.101101 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.066     ; 7.862      ;
; 12.904 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.100101 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.011011 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.066     ; 7.862      ;
; 12.904 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.100101 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.011100 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.066     ; 7.862      ;
; 12.904 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.100101 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.101000 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.066     ; 7.862      ;
; 12.905 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.101001 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.101101 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.072     ; 7.855      ;
; 12.905 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.101001 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.011100 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.072     ; 7.855      ;
; 12.905 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.101001 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.101000 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.072     ; 7.855      ;
; 12.905 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.101001 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.011011 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.072     ; 7.855      ;
; 12.980 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[2]                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.101                              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.054     ; 7.798      ;
; 13.034 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|HCTxPortWEn                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.101101 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.060     ; 7.738      ;
; 13.034 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|HCTxPortWEn                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.011011 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.060     ; 7.738      ;
; 13.034 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|HCTxPortWEn                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.011100 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.060     ; 7.738      ;
+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                          ;
+-------+-------------------------+----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node               ; To Node                                                  ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------+----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 1.001 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.156     ; 4.550      ;
; 1.040 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.158     ; 4.509      ;
; 1.122 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.156     ; 4.429      ;
; 1.161 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.158     ; 4.388      ;
; 1.211 ; SDRAM_ADDR[15]          ; sdram_ctrl:sdram_controller|r_sdram_addr[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 4.345      ;
; 1.363 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.144     ; 4.200      ;
; 1.377 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.156     ; 4.174      ;
; 1.404 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.158     ; 4.145      ;
; 1.429 ; SDRAM_ADDR[17]          ; sdram_ctrl:sdram_controller|r_sdram_addr[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.148     ; 4.130      ;
; 1.484 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.144     ; 4.079      ;
; 1.498 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.156     ; 4.053      ;
; 1.525 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.158     ; 4.024      ;
; 1.612 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.144     ; 3.951      ;
; 1.683 ; SDRAM_ADDR[5]           ; sdram_ctrl:sdram_controller|r_sdram_addr[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 3.873      ;
; 1.733 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.144     ; 3.830      ;
; 1.779 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_ras_n                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.145     ; 3.783      ;
; 1.811 ; SDRAM_ADDR[18]          ; sdram_ctrl:sdram_controller|r_sdram_addr[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 3.745      ;
; 1.826 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.157     ; 3.724      ;
; 1.835 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[11]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.157     ; 3.715      ;
; 1.843 ; SDRAM_ADDR[14]          ; sdram_ctrl:sdram_controller|r_sdram_addr[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.134     ; 3.730      ;
; 1.854 ; SDRAM_ADDR[3]           ; sdram_ctrl:sdram_controller|r_sdram_addr[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.137     ; 3.716      ;
; 1.888 ; SDRAM_ADDR[6]           ; sdram_ctrl:sdram_controller|r_sdram_addr[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 3.668      ;
; 1.902 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_ras_n                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.145     ; 3.660      ;
; 1.947 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.157     ; 3.603      ;
; 1.956 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[11]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.157     ; 3.594      ;
; 2.065 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[10]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.148     ; 3.494      ;
; 2.082 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.158     ; 3.467      ;
; 2.099 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.148     ; 3.460      ;
; 2.106 ; SDRAM_ADDR[20]          ; sdram_ctrl:sdram_controller|r_sdram_addr[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.150     ; 3.451      ;
; 2.107 ; SDRAM_ADDR[16]          ; sdram_ctrl:sdram_controller|r_sdram_addr[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.146     ; 3.454      ;
; 2.180 ; SDRAM_ADDR[13]          ; sdram_ctrl:sdram_controller|r_sdram_addr[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.139     ; 3.388      ;
; 2.186 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[10]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.148     ; 3.373      ;
; 2.203 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.158     ; 3.346      ;
; 2.204 ; SDRAM_ADDR[22]          ; sdram_ctrl:sdram_controller|r_sdram_addr[11]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.147     ; 3.356      ;
; 2.220 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.148     ; 3.339      ;
; 2.299 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.148     ; 3.260      ;
; 2.339 ; SDRAM_ADDR[8]           ; sdram_ctrl:sdram_controller|r_sdram_addr[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.152     ; 3.216      ;
; 2.360 ; SDRAM_ADDR[19]          ; sdram_ctrl:sdram_controller|r_sdram_addr[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 3.196      ;
; 2.369 ; SDRAM_READ_ENABLE       ; ram_do_reg[27]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 3.299      ;
; 2.369 ; SDRAM_READ_ENABLE       ; ram_do_reg[24]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 3.299      ;
; 2.369 ; SDRAM_READ_ENABLE       ; ram_do_reg[19]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 3.299      ;
; 2.369 ; SDRAM_READ_ENABLE       ; ram_do_reg[16]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 3.299      ;
; 2.369 ; SDRAM_READ_ENABLE       ; ram_do_reg[17]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 3.299      ;
; 2.369 ; SDRAM_READ_ENABLE       ; ram_do_reg[23]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 3.299      ;
; 2.369 ; SDRAM_READ_ENABLE       ; ram_do_reg[31]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 3.299      ;
; 2.369 ; SDRAM_READ_ENABLE       ; ram_do_reg[25]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 3.299      ;
; 2.402 ; SDRAM_ADDR[7]           ; sdram_ctrl:sdram_controller|r_sdram_addr[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.153     ; 3.152      ;
; 2.420 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.148     ; 3.139      ;
; 2.429 ; SDRAM_ADDR[4]           ; sdram_ctrl:sdram_controller|r_sdram_addr[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.133     ; 3.145      ;
; 2.577 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[14]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.126     ; 3.116      ;
; 2.578 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[5]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.126     ; 3.115      ;
; 2.578 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[8]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.126     ; 3.115      ;
; 2.621 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_ba[0]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.148     ; 2.938      ;
; 2.621 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_ba[1]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.148     ; 2.938      ;
; 2.656 ; SDRAM_ADDR[2]           ; sdram_ctrl:sdram_controller|r_sdram_addr[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.138     ; 2.913      ;
; 2.665 ; SDRAM_READ_ENABLE       ; ram_do_reg[28]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 3.003      ;
; 2.665 ; SDRAM_READ_ENABLE       ; ram_do_reg[26]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 3.003      ;
; 2.665 ; SDRAM_READ_ENABLE       ; ram_do_reg[30]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 3.003      ;
; 2.665 ; SDRAM_READ_ENABLE       ; ram_do_reg[20]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 3.003      ;
; 2.665 ; SDRAM_READ_ENABLE       ; ram_do_reg[18]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 3.003      ;
; 2.665 ; SDRAM_READ_ENABLE       ; ram_do_reg[22]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 3.003      ;
; 2.723 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[6]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.126     ; 2.970      ;
; 2.723 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[9]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.126     ; 2.970      ;
; 2.724 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[2]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.126     ; 2.969      ;
; 2.724 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[10]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.126     ; 2.969      ;
; 2.724 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[13]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.126     ; 2.969      ;
; 2.725 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[0]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.126     ; 2.968      ;
; 2.725 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[1]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.126     ; 2.968      ;
; 2.731 ; SDRAM_ADDR[21]          ; sdram_ctrl:sdram_controller|r_sdram_addr[10]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.141     ; 2.835      ;
; 2.732 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[0]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.135     ; 2.952      ;
; 2.740 ; SDRAM_ADDR[11]          ; sdram_ctrl:sdram_controller|r_sdram_addr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.140     ; 2.827      ;
; 2.742 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_ba[0]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.148     ; 2.817      ;
; 2.742 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_ba[1]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.148     ; 2.817      ;
; 2.781 ; SDRAM_READ_ENABLE       ; ram_do_reg[29]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.131     ; 2.907      ;
; 2.821 ; SDRAM_WIDTH_8BIT_ACCESS ; ram_di_reg[11]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.122     ; 2.876      ;
; 2.822 ; SDRAM_WIDTH_8BIT_ACCESS ; ram_di_reg[3]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.122     ; 2.875      ;
; 2.822 ; SDRAM_WIDTH_8BIT_ACCESS ; ram_di_reg[4]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.122     ; 2.875      ;
; 2.826 ; SDRAM_READ_ENABLE       ; ram_do_reg[3]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.157     ; 2.836      ;
; 2.826 ; SDRAM_READ_ENABLE       ; ram_do_reg[2]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.157     ; 2.836      ;
; 2.827 ; SDRAM_WIDTH_8BIT_ACCESS ; ram_di_reg[7]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.122     ; 2.870      ;
; 2.829 ; SDRAM_ADDR[1]           ; sdram_ctrl:sdram_controller|r_sdram_addr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.138     ; 2.740      ;
; 2.837 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[11]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.129     ; 2.853      ;
; 2.838 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[3]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.129     ; 2.852      ;
; 2.838 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[4]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.129     ; 2.852      ;
; 2.839 ; SDRAM_READ_ENABLE       ; ram_do_reg[21]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.158     ; 2.822      ;
; 2.843 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[7]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.129     ; 2.847      ;
; 2.851 ; SDRAM_READ_ENABLE       ; ram_do_reg[1]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 2.817      ;
; 2.851 ; SDRAM_READ_ENABLE       ; ram_do_reg[0]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 2.817      ;
; 2.851 ; SDRAM_READ_ENABLE       ; ram_do_reg[7]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 2.817      ;
; 2.851 ; SDRAM_READ_ENABLE       ; ram_do_reg[11]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 2.817      ;
; 2.851 ; SDRAM_READ_ENABLE       ; ram_do_reg[15]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 2.817      ;
; 2.851 ; SDRAM_READ_ENABLE       ; ram_do_reg[8]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 2.817      ;
; 2.851 ; SDRAM_READ_ENABLE       ; ram_do_reg[9]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 2.817      ;
; 2.853 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[0]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.135     ; 2.831      ;
; 2.866 ; SDRAM_READ_ENABLE       ; ram_do_reg[4]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 2.802      ;
; 2.866 ; SDRAM_READ_ENABLE       ; ram_do_reg[5]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 2.802      ;
; 2.866 ; SDRAM_READ_ENABLE       ; ram_do_reg[6]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 2.802      ;
; 2.866 ; SDRAM_READ_ENABLE       ; ram_do_reg[12]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 2.802      ;
; 2.866 ; SDRAM_READ_ENABLE       ; ram_do_reg[13]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 2.802      ;
; 2.866 ; SDRAM_READ_ENABLE       ; ram_do_reg[14]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.151     ; 2.802      ;
+-------+-------------------------+----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                                                           ;
+-------+-------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node               ; To Node                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 4.524 ; svideo_yout_dly2[5]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 4.025      ;
; 4.530 ; svideo_yout_dly2[6]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 4.019      ;
; 4.538 ; svideo_yout_dly2[5]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 4.011      ;
; 4.544 ; svideo_yout_dly2[6]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 4.005      ;
; 4.588 ; svideo_yout_dly2[5]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.961      ;
; 4.594 ; svideo_yout_dly2[6]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.955      ;
; 4.705 ; svideo_yout_dly2[5]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.843      ;
; 4.711 ; svideo_yout_dly2[6]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.837      ;
; 4.769 ; svideo_yout_dly2[5]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.070     ; 3.778      ;
; 4.775 ; svideo_yout_dly2[6]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.070     ; 3.772      ;
; 4.796 ; svideo_yout_dly2[4]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.753      ;
; 4.810 ; svideo_yout_dly2[4]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.739      ;
; 4.831 ; svideo_yout_dly2[7]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.718      ;
; 4.846 ; svideo_yout_dly2[7]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.703      ;
; 4.856 ; svideo_yout_dly2[5]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.693      ;
; 4.860 ; svideo_yout_dly2[4]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.689      ;
; 4.862 ; svideo_yout_dly2[6]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.687      ;
; 4.889 ; svideo_yout_dly2[7]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.660      ;
; 4.891 ; svideo_yout_dly2[5]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.657      ;
; 4.897 ; svideo_yout_dly2[6]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.651      ;
; 4.977 ; svideo_yout_dly2[4]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.571      ;
; 5.013 ; svideo_yout_dly2[3]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.536      ;
; 5.019 ; svideo_yout_dly2[5]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.070     ; 3.528      ;
; 5.025 ; svideo_yout_dly2[6]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.070     ; 3.522      ;
; 5.027 ; svideo_yout_dly2[3]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.522      ;
; 5.040 ; svideo_yout_dly2[7]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.508      ;
; 5.041 ; svideo_yout_dly2[4]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.070     ; 3.506      ;
; 5.052 ; svideo_yout_dly2[2]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.497      ;
; 5.067 ; svideo_yout_dly2[2]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.482      ;
; 5.077 ; svideo_yout_dly2[3]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.472      ;
; 5.101 ; svideo_yout_dly2[1]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.448      ;
; 5.109 ; svideo_yout_dly2[7]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.070     ; 3.438      ;
; 5.110 ; svideo_yout_dly2[2]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.439      ;
; 5.115 ; svideo_yout_dly2[1]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.434      ;
; 5.128 ; svideo_yout_dly2[4]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.421      ;
; 5.163 ; svideo_yout_dly2[4]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.385      ;
; 5.165 ; svideo_yout_dly2[1]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.384      ;
; 5.194 ; svideo_yout_dly2[3]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.354      ;
; 5.196 ; svideo_yout_dly2[7]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.353      ;
; 5.231 ; svideo_yout_dly2[7]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.317      ;
; 5.258 ; svideo_yout_dly2[3]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.070     ; 3.289      ;
; 5.260 ; svideo_yout_dly2[2]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.288      ;
; 5.282 ; svideo_yout_dly2[1]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.266      ;
; 5.291 ; svideo_yout_dly2[4]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.070     ; 3.256      ;
; 5.324 ; svideo_yout_dly2[2]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.070     ; 3.223      ;
; 5.345 ; svideo_yout_dly2[3]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.204      ;
; 5.346 ; svideo_yout_dly2[1]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.070     ; 3.201      ;
; 5.359 ; svideo_yout_dly2[7]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.070     ; 3.188      ;
; 5.373 ; svideo_yout_dly2[0]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.176      ;
; 5.380 ; svideo_yout_dly2[3]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.168      ;
; 5.388 ; svideo_yout_dly2[0]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.161      ;
; 5.411 ; svideo_yout_dly2[2]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.138      ;
; 5.431 ; svideo_yout_dly2[0]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.118      ;
; 5.433 ; svideo_yout_dly2[1]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.116      ;
; 5.446 ; svideo_yout_dly2[2]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.102      ;
; 5.468 ; svideo_yout_dly2[1]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.080      ;
; 5.508 ; svideo_yout_dly2[3]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.070     ; 3.039      ;
; 5.574 ; svideo_yout_dly2[2]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.070     ; 2.973      ;
; 5.582 ; svideo_yout_dly2[0]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 2.966      ;
; 5.596 ; svideo_yout_dly2[1]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.070     ; 2.951      ;
; 5.659 ; svideo_yout_dly2[0]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.070     ; 2.888      ;
; 5.746 ; svideo_yout_dly2[0]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 2.803      ;
; 5.781 ; svideo_yout_dly2[0]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 2.767      ;
; 5.909 ; svideo_yout_dly2[0]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.070     ; 2.638      ;
; 5.974 ; svideo:svideo|luma[0]   ; luma_saturated[8]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.160     ; 2.595      ;
; 5.981 ; svideo:svideo|luma[0]   ; luma_saturated[1]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.160     ; 2.588      ;
; 6.003 ; svideo:svideo|luma[0]   ; luma_saturated[9]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.160     ; 2.566      ;
; 6.013 ; svideo:svideo|luma[5]   ; luma_saturated[8]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.169     ; 2.547      ;
; 6.042 ; svideo:svideo|luma[5]   ; luma_saturated[9]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.169     ; 2.518      ;
; 6.090 ; svideo:svideo|luma[0]   ; luma_saturated[6]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.160     ; 2.479      ;
; 6.119 ; svideo:svideo|luma[0]   ; luma_saturated[7]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.160     ; 2.450      ;
; 6.129 ; svideo:svideo|luma[5]   ; luma_saturated[6]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.169     ; 2.431      ;
; 6.158 ; svideo:svideo|luma[5]   ; luma_saturated[7]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.169     ; 2.402      ;
; 6.206 ; svideo:svideo|luma[0]   ; luma_saturated[4]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.160     ; 2.363      ;
; 6.218 ; cvbs1_out[4]            ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 2.330      ;
; 6.222 ; svideo:svideo|chroma[0] ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.159     ; 2.348      ;
; 6.235 ; svideo:svideo|luma[0]   ; luma_saturated[5]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.160     ; 2.334      ;
; 6.244 ; svideo:svideo|luma[8]   ; luma_saturated[9]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.160     ; 2.325      ;
; 6.268 ; svideo:svideo|chroma[1] ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.159     ; 2.302      ;
; 6.297 ; svideo:svideo|chroma[1] ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.159     ; 2.273      ;
; 6.309 ; svideo:svideo|chroma[2] ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.159     ; 2.261      ;
; 6.312 ; svideo:svideo|luma[4]   ; luma_saturated[9]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.169     ; 2.248      ;
; 6.322 ; svideo:svideo|luma[0]   ; luma_saturated[2]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.160     ; 2.247      ;
; 6.327 ; svideo:svideo|luma_2[1] ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.061     ; 2.341      ;
; 6.338 ; svideo:svideo|chroma[0] ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.159     ; 2.232      ;
; 6.350 ; svideo:svideo|luma[2]   ; luma_saturated[9]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.160     ; 2.219      ;
; 6.351 ; svideo:svideo|luma[0]   ; luma_saturated[3]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.160     ; 2.218      ;
; 6.356 ; svideo:svideo|luma_2[1] ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.061     ; 2.312      ;
; 6.366 ; svideo:svideo|luma_2[2] ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.060     ; 2.303      ;
; 6.367 ; svideo:svideo|chroma[0] ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.159     ; 2.203      ;
; 6.384 ; svideo:svideo|chroma[1] ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.159     ; 2.186      ;
; 6.412 ; cvbs1_out[8]            ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.071     ; 2.134      ;
; 6.413 ; svideo:svideo|chroma[1] ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.159     ; 2.157      ;
; 6.425 ; svideo:svideo|chroma[2] ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.159     ; 2.145      ;
; 6.428 ; svideo:svideo|luma[4]   ; luma_saturated[7]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.169     ; 2.132      ;
; 6.429 ; cvbs1_out[9]            ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 2.119      ;
; 6.443 ; svideo:svideo|luma_2[1] ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.061     ; 2.225      ;
; 6.454 ; svideo:svideo|chroma[0] ; cvbs1_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.159     ; 2.116      ;
; 6.454 ; svideo:svideo|chroma[2] ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.159     ; 2.116      ;
; 6.457 ; svideo:svideo|luma[3]   ; luma_saturated[8]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.160     ; 2.112      ;
+-------+-------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: 'usb_pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                   ;
+--------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                                                                                                                                   ; To Node                                                                                                                                                                                                     ; Launch Clock                                                                   ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+--------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; -1.474 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|RxfifoBI:u_RxfifoBI|forceEmptyToggle                                                 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|RxfifoBI:u_RxfifoBI|forceEmptyToggleSyncToUsbClk[0]                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.107      ; 0.982      ;
; -1.472 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggle                                                 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggleSyncToUsbClk[0]                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.107      ; 0.984      ;
; -1.468 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|hostSlaveMuxBI:u_hostSlaveMuxBI|rstShift[0]                                                            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|hostSlaveMuxBI:u_hostSlaveMuxBI|rstSyncToUsbClkFirst                                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.107      ; 0.988      ;
; -1.465 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[4]                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[4]                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.106      ; 0.990      ;
; -1.462 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[5]                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[5]                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.106      ; 0.993      ;
; -1.454 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|hostSlaveMuxBI:u_hostSlaveMuxBI|rstShift[0]                                                            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|hostSlaveMuxBI:u_hostSlaveMuxBI|rstSyncToUsbClkFirst                                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.107      ; 1.002      ;
; -1.451 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[5]                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[5]                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.097      ; 0.995      ;
; -1.444 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[0]                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[0]                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.096      ; 1.001      ;
; -1.442 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[1]                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[1]                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.106      ; 1.013      ;
; -1.439 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[0]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.106      ; 1.016      ;
; -1.437 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[1]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[1]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.106      ; 1.018      ;
; -1.435 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|transReqSTB                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|transReq_reg1                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.107      ; 1.021      ;
; -1.432 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[4]                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[4]                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.097      ; 1.014      ;
; -1.431 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[1]                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[1]                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.096      ; 1.014      ;
; -1.431 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[4]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[4]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.106      ; 1.024      ;
; -1.419 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[3]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[3]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.106      ; 1.036      ;
; -1.416 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[5]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[5]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.106      ; 1.039      ;
; -1.408 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[0]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.107      ; 1.048      ;
; -1.408 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSyncSTB                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSync_reg1                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.094      ; 1.035      ;
; -1.405 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|preambleEnSTB                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|preambleEn_reg1                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.094      ; 1.038      ;
; -1.403 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|isoEnSTB                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|isoEn_reg1                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.094      ; 1.040      ;
; -1.396 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[1]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[1]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.107      ; 1.060      ;
; -1.394 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[2]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[2]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.107      ; 1.062      ;
; -1.390 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[3]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[3]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.107      ; 1.066      ;
; -1.389 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeRegSTB[0]               ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeReg_reg1[0]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.107      ; 1.067      ;
; -1.383 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|RxfifoBI:u_RxfifoBI|forceEmptyToggle                                                 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|RxfifoBI:u_RxfifoBI|forceEmptyToggleSyncToUsbClk[0]                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.096      ; 1.062      ;
; -1.360 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[1]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[1]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.107      ; 1.096      ;
; -1.351 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[2]                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|LineDirectControlEn_reg1           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.106      ; 1.104      ;
; -1.350 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[0]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.107      ; 1.106      ;
; -1.348 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[0]                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[0]                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.106      ; 1.107      ;
; -1.347 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[4]                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|fullSpeedRate_reg1                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.106      ; 1.108      ;
; -1.347 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|isoEnSTB                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|isoEn_reg1                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.106      ; 1.108      ;
; -1.347 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggle                                                 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggleSyncToUsbClk[0]                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.097      ; 1.099      ;
; -1.347 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[0]                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineState_reg1[0]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.106      ; 1.108      ;
; -1.347 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[4]                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|fullSpeedRate_reg1                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.096      ; 1.098      ;
; -1.345 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[1]                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineState_reg1[1]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.106      ; 1.110      ;
; -1.343 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[3]                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|fullSpeedPol_reg1                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.106      ; 1.112      ;
; -1.342 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[3]                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|fullSpeedPol_reg1                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.096      ; 1.103      ;
; -1.339 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxSOFEnableRegSTB                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxSOFEnableReg_reg1                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.106      ; 1.116      ;
; -1.332 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[1]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[1]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.097      ; 1.114      ;
; -1.330 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeRegSTB[0]               ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeReg_reg1[0]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.094      ; 1.113      ;
; -1.330 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeRegSTB[1]               ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeReg_reg1[1]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.107      ; 1.126      ;
; -1.330 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[5]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[5]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.097      ; 1.116      ;
; -1.328 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|preambleEnSTB                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|preambleEn_reg1                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.106      ; 1.127      ;
; -1.327 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[6]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[6]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.097      ; 1.119      ;
; -1.325 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[1]                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineState_reg1[1]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.096      ; 1.120      ;
; -1.323 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeRegSTB[1]               ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeReg_reg1[1]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.094      ; 1.120      ;
; -1.322 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[2]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[2]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.093      ; 1.120      ;
; -1.321 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|transReqSTB                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|transReq_reg1                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.106      ; 1.134      ;
; -1.321 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[6]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[6]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.106      ; 1.134      ;
; -1.319 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[0]                                                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[0]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.107      ; 1.137      ;
; -1.311 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[6]                                                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[6]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.107      ; 1.145      ;
; -1.308 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[3]                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[3]                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.106      ; 1.147      ;
; -1.306 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[2]                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|LineDirectControlEn_reg1           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.096      ; 1.139      ;
; -1.306 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[4]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[4]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.097      ; 1.140      ;
; -1.304 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSyncSTB                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSync_reg1                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.106      ; 1.151      ;
; -1.304 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[3]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[3]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.093      ; 1.138      ;
; -1.299 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[3]                                                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[3]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.107      ; 1.157      ;
; -1.295 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxSOFEnableRegSTB                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxSOFEnableReg_reg1                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.107      ; 1.161      ;
; -1.290 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[6]                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[6]                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.106      ; 1.165      ;
; -1.286 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[3]                                                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[3]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.097      ; 1.160      ;
; -1.284 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[2]                                                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[2]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.107      ; 1.172      ;
; -1.281 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[5]                                                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[5]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.107      ; 1.175      ;
; -1.281 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[2]                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[2]                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.106      ; 1.174      ;
; -1.275 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[2]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[2]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.107      ; 1.181      ;
; -1.270 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[3]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[3]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.107      ; 1.186      ;
; -1.269 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[3]                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[3]                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.097      ; 1.177      ;
; -1.267 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[6]                                                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[6]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.097      ; 1.179      ;
; -1.255 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[2]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[2]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.106      ; 1.200      ;
; -1.254 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[2]                                                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[2]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.097      ; 1.192      ;
; -1.254 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[0]                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineState_reg1[0]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.106      ; 1.201      ;
; -1.247 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[4]                                                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[4]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.097      ; 1.199      ;
; -1.245 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[6]                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[6]                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.096      ; 1.200      ;
; -1.240 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[0]                                                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[0]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.097      ; 1.206      ;
; -1.238 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[5]                                                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[5]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.097      ; 1.208      ;
; -1.238 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[1]                                                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[1]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.107      ; 1.218      ;
; -1.231 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[4]                                                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[4]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.107      ; 1.225      ;
; -1.231 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[0]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.116      ; 1.234      ;
; -1.224 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[2]                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[2]                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.096      ; 1.221      ;
; -1.223 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[1]                                                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[1]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 2.097      ; 1.223      ;
; 0.362  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|readUSBWireData:u_readUSBWireData|SIERxWEn         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|readUSBWireData:u_readUSBWireData|SIERxWEn         ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|CurrState_sofCntl.100                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|CurrState_sofCntl.100                    ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|HCTxPortReq                              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|HCTxPortReq                              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|HCTxPortReq                                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|HCTxPortReq                                    ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|CurrState_sofCntl.010                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|CurrState_sofCntl.010                    ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|hostcontroller:u_hostController|CurrState_hstCntrl.001100              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|hostcontroller:u_hostController|CurrState_hstCntrl.001100              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|hostcontroller:u_hostController|CurrState_hstCntrl.001111              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|hostcontroller:u_hostController|CurrState_hstCntrl.001111              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|hostcontroller:u_hostController|CurrState_hstCntrl.001110              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|hostcontroller:u_hostController|CurrState_hstCntrl.001110              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|hostcontroller:u_hostController|CurrState_hstCntrl.011011              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|hostcontroller:u_hostController|CurrState_hstCntrl.011011              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|hostcontroller:u_hostController|CurrState_hstCntrl.011100              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|hostcontroller:u_hostController|CurrState_hstCntrl.011100              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|hostcontroller:u_hostController|CurrState_hstCntrl.010111              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|hostcontroller:u_hostController|CurrState_hstCntrl.010111              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|hostcontroller:u_hostController|CurrState_hstCntrl.010100              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|hostcontroller:u_hostController|CurrState_hstCntrl.010100              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|hostcontroller:u_hostController|sendPacketWEn                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|hostcontroller:u_hostController|sendPacketWEn                          ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|hostcontroller:u_hostController|sendPacketPID[0]                       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|hostcontroller:u_hostController|sendPacketPID[0]                       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|hostcontroller:u_hostController|sendPacketPID[2]                       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|hostcontroller:u_hostController|sendPacketPID[2]                       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|hostcontroller:u_hostController|sendPacketPID[3]                       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|hostcontroller:u_hostController|sendPacketPID[3]                       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|hostcontroller:u_hostController|sendPacketPID[1]                       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|hostcontroller:u_hostController|sendPacketPID[1]                       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|HCTxPortWEn                              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|HCTxPortWEn                              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|writeUSBWireData:u_writeUSBWireData|TxCtrlOut      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|writeUSBWireData:u_writeUSBWireData|TxCtrlOut      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|readUSBWireData:u_readUSBWireData|bufferInIndex[0] ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|readUSBWireData:u_readUSBWireData|bufferInIndex[0] ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.597      ;
+--------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                             ; To Node                                                                                                                                                                                                                                ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.348 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSentInt   ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSentInt                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.078      ; 0.597      ;
; 0.348 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connEventInt ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connEventInt                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.078      ; 0.597      ;
; 0.348 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|resumeInt    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|resumeInt                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.078      ; 0.597      ;
; 0.349 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizep1_raw_reg[1]                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 0.939      ;
; 0.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[5]                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.386      ; 0.941      ;
; 0.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[3]                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.386      ; 0.946      ;
; 0.361 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[0]                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.386      ; 0.948      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[0]                                                                                                                                  ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[0]                                                                                                                                                                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[2]                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[2]                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[0]                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[0]                                                                                                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vscrol_last_enabled_reg                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vscrol_last_enabled_reg                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[6]                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[6]                                                                                                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[1]                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[1]                                                                                                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wsync_reg                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wsync_reg                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[5]                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[5]                                                                                                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[3]                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[3]                                                                                                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[2]                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[2]                                                                                                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|simple_counter:antic_counter_refresh_count|value_reg[3]                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|simple_counter:antic_counter_refresh_count|value_reg[3]                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; sdram_reset_n_reg                                                                                                                                                                     ; sdram_reset_n_reg                                                                                                                                                                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_load_sp2                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_load_sp2                                                                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_load2                                                                                                                  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_load2                                                                                                                                                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                                                                                    ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                                                                                                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|insn.dec_insn_fetch                                                                                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|insn.dec_insn_fetch                                                                                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                                                                                    ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                                                                                                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[10]                                                                                                                                      ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[10]                                                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_store_sp2                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_store_sp2                                                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|idim_r                                                                                                                          ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|idim_r                                                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; enable_divider:enable_179_clock_div_zpu_pokey|count_reg[1]                                                                                                                            ; enable_divider:enable_179_clock_div_zpu_pokey|count_reg[1]                                                                                                                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; enable_divider:enable_179_clock_div_zpu_pokey|count_reg[2]                                                                                                                            ; enable_divider:enable_179_clock_div_zpu_pokey|count_reg[2]                                                                                                                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; enable_divider:enable_179_clock_div_zpu_pokey|count_reg[3]                                                                                                                            ; enable_divider:enable_179_clock_div_zpu_pokey|count_reg[3]                                                                                                                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|skctl_reg[0]                                                                                                   ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|skctl_reg[0]                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[1]                                                                                                                                       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[1]                                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[4]                                                                                                                                       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[4]                                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[1]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[1]                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[2]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[2]                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[3]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[3]                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[25]                                                                                                                                      ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[25]                                                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|spi_speed_reg[7]                                                                                                                              ; zpucore:zpu|zpu_config_regs:config_regs|spi_speed_reg[7]                                                                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[18]                                                                                                                                      ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[18]                                                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[24]                                                                                                                                      ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[24]                                                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|b_r[31]                                                                                                                         ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|b_r[31]                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[5]                                                                                                                          ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[5]                                                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[27]                                                                                                                                      ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[27]                                                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|assert_data                                                                                                            ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|assert_data                                                                                                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|ss_n[0]                                                                                                                ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|ss_n[0]                                                                                                                                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[7]                                                                                                                                       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[7]                                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[8]                                                                                                                                       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[8]                                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[9]                                                                                                                                       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[9]                                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[12]                                                                                                                                      ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[12]                                                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[16]                                                                                                                                      ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[16]                                                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[26]                                                                                                                                      ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[26]                                                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[28]                                                                                                                                      ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[28]                                                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[369]                                                                                                                                       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[369]                                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[126]                                                                                                                                       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[126]                                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|first_line_of_instruction_reg                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|first_line_of_instruction_reg                                                                                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serial_out_reg                                                                                                 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serial_out_reg                                                                                                                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0]                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0]                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[5]                                                                                                   ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[5]                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[0]                                                                                                   ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[0]                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[1]                                                                                                   ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[1]                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[2]                                                                                                   ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[2]                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[3]                                                                                                   ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[3]                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[4]                                                                                                   ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[4]                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[6]                                                                                                   ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[6]                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[7]                                                                                                   ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[7]                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[0]                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[0]                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|twotone_reg                                                                                                    ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|twotone_reg                                                                                                                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; paddle_mode_reg                                                                                                                                                                       ; paddle_mode_reg                                                                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[62]                                                                                                                                        ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[62]                                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[118]                                                                                                                                       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[118]                                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[58]                                                                                                                                        ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[58]                                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[26]                                                                                                                                        ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[26]                                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[273]                                                                                                                                       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[273]                                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[27]                                                                                                                                        ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[27]                                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[30]                                                                                                                                        ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[30]                                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[22]                                                                                                                                        ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[22]                                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[91]                                                                                                                                        ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[91]                                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[69]                                                                                                                                        ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[69]                                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[77]                                                                                                                                        ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[77]                                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[5]                                                                                                                                         ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[5]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[4]                                                                                                                                         ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[4]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[119]                                                                                                                                       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[119]                                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[13]                                                                                                                                      ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[13]                                                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[10]                                                                                                                                        ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[10]                                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|trig_reg[1]                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|trig_reg[1]                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|trig_reg[3]                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|trig_reg[3]                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|trig_reg[0]                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|trig_reg[0]                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[11]                                                                                                                                        ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[11]                                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[4]                                                                                                   ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[4]                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[0]                                                                                                   ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[0]                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[1]                                                                                                   ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[1]                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[2]                                                                                                   ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[2]                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[3]                                                                                                   ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[3]                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[6]                                                                                                   ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[6]                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[5]                                                                                                   ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[5]                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[7]                                                                                                   ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[7]                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[2]                                                                                                   ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[2]                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[1]                                                                                                   ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[1]                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[3]                                                                                                   ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[3]                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                              ;
+-------+-----------------------------------------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                 ; To Node                                                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.363 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sdram_ctrl:sdram_controller|sdram_rdy                     ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sdram_request_reg                                         ; sdram_request_reg                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sdram_ctrl:sdram_controller|r_refr_act                    ; sdram_ctrl:sdram_controller|r_refr_act                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sdram_ctrl:sdram_controller|r_rd_act                      ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sdram_ctrl:sdram_controller|r_wr_act                      ; sdram_ctrl:sdram_controller|r_wr_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sdram_ctrl:sdram_controller|r_sdram_addr[2]~_Duplicate_1  ; sdram_ctrl:sdram_controller|r_sdram_addr[2]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sdram_ctrl:sdram_controller|r_sdram_addr[3]~_Duplicate_1  ; sdram_ctrl:sdram_controller|r_sdram_addr[3]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sdram_ctrl:sdram_controller|r_sdram_addr[4]~_Duplicate_1  ; sdram_ctrl:sdram_controller|r_sdram_addr[4]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sdram_ctrl:sdram_controller|r_sdram_addr[6]~_Duplicate_1  ; sdram_ctrl:sdram_controller|r_sdram_addr[6]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sdram_ctrl:sdram_controller|r_sdram_addr[7]~_Duplicate_1  ; sdram_ctrl:sdram_controller|r_sdram_addr[7]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.364 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.374 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.608      ;
; 0.437 ; seq_reg[0]                                                ; seq_reg[1]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.671      ;
; 0.518 ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.752      ;
; 0.549 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.783      ;
; 0.554 ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.788      ;
; 0.554 ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.788      ;
; 0.577 ; seq_reg[5]                                                ; seq_reg[6]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.811      ;
; 0.577 ; seq_reg[8]                                                ; seq_reg[9]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.811      ;
; 0.582 ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ; sdram_ctrl:sdram_controller|r_wr_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.816      ;
; 0.583 ; seq_reg[4]                                                ; seq_reg[5]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.817      ;
; 0.588 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.822      ;
; 0.588 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.822      ;
; 0.589 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.823      ;
; 0.590 ; seq_reg[7]                                                ; seq_reg[8]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.824      ;
; 0.590 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.824      ;
; 0.592 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.826      ;
; 0.592 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.826      ;
; 0.593 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.827      ;
; 0.594 ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.828      ;
; 0.607 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.841      ;
; 0.610 ; seq_reg[3]                                                ; seq_reg[4]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.844      ;
; 0.612 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.846      ;
; 0.635 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.061      ; 0.867      ;
; 0.636 ; sdram_ctrl:sdram_controller|r_rd_act                      ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.870      ;
; 0.637 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.061      ; 0.869      ;
; 0.637 ; seq_reg[11]                                               ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.871      ;
; 0.638 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.872      ;
; 0.643 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.877      ;
; 0.651 ; sdram_request_complete_reg                                ; sdram_request_reg                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.885      ;
; 0.660 ; seq_reg[11]                                               ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.894      ;
; 0.666 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.900      ;
; 0.709 ; seq_reg[9]                                                ; seq_reg[10]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.943      ;
; 0.779 ; seq_reg[6]                                                ; seq_reg[7]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.013      ;
; 0.791 ; seq_reg[1]                                                ; seq_reg[2]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.054      ; 1.016      ;
; 0.793 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.027      ;
; 0.795 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.029      ;
; 0.813 ; sdram_ctrl:sdram_controller|r_wr_act                      ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.047      ;
; 0.825 ; seq_reg[11]                                               ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 1.060      ;
; 0.849 ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.083      ;
; 0.865 ; sdram_ctrl:sdram_controller|r_sdram_addr[1]~_Duplicate_1  ; sdram_ctrl:sdram_controller|r_sdram_addr[1]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 1.098      ;
; 0.874 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.108      ;
; 0.874 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.108      ;
; 0.877 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.111      ;
; 0.877 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.111      ;
; 0.879 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.113      ;
; 0.880 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.114      ;
; 0.880 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.114      ;
; 0.880 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.114      ;
; 0.881 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.115      ;
; 0.887 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 1.122      ;
; 0.888 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.122      ;
; 0.891 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.125      ;
; 0.891 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.125      ;
; 0.891 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.125      ;
; 0.892 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.126      ;
; 0.900 ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.134      ;
; 0.902 ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.136      ;
; 0.916 ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.150      ;
; 0.940 ; sdram_ctrl:sdram_controller|r_sdram_addr[11]~_Duplicate_1 ; sdram_ctrl:sdram_controller|r_sdram_addr[11]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.174      ;
; 0.973 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.207      ;
; 0.973 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.207      ;
; 0.976 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.210      ;
; 0.984 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.218      ;
; 0.984 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.218      ;
; 0.987 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.221      ;
; 0.988 ; sdram_ctrl:sdram_controller|r_sdram_addr[0]~_Duplicate_1  ; sdram_ctrl:sdram_controller|r_sdram_addr[0]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 1.221      ;
; 0.990 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.224      ;
; 0.990 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.224      ;
; 0.990 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.224      ;
; 0.991 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.225      ;
; 1.001 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.235      ;
; 1.001 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.235      ;
; 1.001 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.235      ;
; 1.002 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.236      ;
; 1.021 ; sdram_ctrl:sdram_controller|r_psel[0]                     ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 1.259      ;
; 1.027 ; seq_reg[11]                                               ; sdram_ctrl:sdram_controller|r_psel[0]                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.261      ;
; 1.028 ; sdram_ctrl:sdram_controller|r_rd_reg                      ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; -0.307     ; 0.892      ;
; 1.034 ; sdram_ctrl:sdram_controller|r_rd_act                      ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.058      ; 1.263      ;
; 1.049 ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ; sdram_request_complete_reg                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.283      ;
; 1.051 ; sdram_ctrl:sdram_controller|r_sdram_addr[8]~_Duplicate_1  ; sdram_ctrl:sdram_controller|r_sdram_addr[8]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.285      ;
; 1.058 ; sdram_ctrl:sdram_controller|r_sdram_addr[9]~_Duplicate_1  ; sdram_ctrl:sdram_controller|r_sdram_addr[9]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.292      ;
; 1.059 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.293      ;
; 1.059 ; seq_reg[1]                                                ; sdram_ctrl:sdram_controller|r_wr_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.054      ; 1.284      ;
; 1.062 ; seq_reg[2]                                                ; seq_reg[3]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 1.305      ;
+-------+-----------------------------------------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                                                              ;
+-------+---------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                 ; To Node                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.405 ; svideo:svideo|luma_1[7]   ; svideo:svideo|luma_2[7]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.638      ;
; 0.406 ; svideo:svideo|luma_1[4]   ; svideo:svideo|luma_2[4]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.639      ;
; 0.406 ; svideo:svideo|luma_1[8]   ; svideo:svideo|luma_2[8]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.639      ;
; 0.406 ; svideo_yout_dly1[4]       ; svideo_yout_dly2[4]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.639      ;
; 0.407 ; svideo:svideo|luma_1[9]   ; svideo:svideo|luma_2[9]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.640      ;
; 0.407 ; svideo_yout_dly1[5]       ; svideo_yout_dly2[5]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.640      ;
; 0.407 ; svideo_yout_dly1[1]       ; svideo_yout_dly2[1]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.640      ;
; 0.409 ; svideo_yout_dly1[3]       ; svideo_yout_dly2[3]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.642      ;
; 0.465 ; svideo:svideo|luma[6]     ; svideo:svideo|luma_1[6]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.141      ; 0.797      ;
; 0.503 ; svideo:svideo|luma[1]     ; svideo:svideo|luma_1[1]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.142      ; 0.836      ;
; 0.505 ; svideo:svideo|luma[6]     ; luma_saturated[6]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.141      ; 0.837      ;
; 0.541 ; luma_saturated[9]         ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.774      ;
; 0.557 ; svideo:svideo|luma_1[2]   ; svideo:svideo|luma_2[2]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.790      ;
; 0.557 ; svideo:svideo|luma_1[5]   ; svideo:svideo|luma_2[5]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.790      ;
; 0.558 ; svideo:svideo|luma_1[0]   ; svideo:svideo|luma_2[0]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.791      ;
; 0.558 ; svideo:svideo|luma_1[1]   ; svideo:svideo|luma_2[1]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.791      ;
; 0.558 ; svideo:svideo|luma_1[3]   ; svideo:svideo|luma_2[3]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.791      ;
; 0.558 ; svideo:svideo|luma_1[6]   ; svideo:svideo|luma_2[6]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.791      ;
; 0.559 ; svideo_yout_dly1[2]       ; svideo_yout_dly2[2]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.792      ;
; 0.559 ; svideo_yout_dly1[7]       ; svideo_yout_dly2[7]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.792      ;
; 0.560 ; svideo_yout_dly1[6]       ; svideo_yout_dly2[6]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.793      ;
; 0.561 ; svideo_yout_dly1[0]       ; svideo_yout_dly2[0]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.794      ;
; 0.592 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.825      ;
; 0.594 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.827      ;
; 0.595 ; svideo:svideo|luma_2[5]   ; svideo:svideo|luma_acc[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.828      ;
; 0.612 ; svideo:svideo|luma_2[0]   ; svideo:svideo|luma_acc[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.845      ;
; 0.661 ; svideo:svideo|luma[9]     ; luma_saturated[9]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.143      ; 0.995      ;
; 0.665 ; svideo:svideo|luma[9]     ; svideo:svideo|luma_1[9]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.144      ; 1.000      ;
; 0.731 ; svideo:svideo|luma_acc[2] ; svideo_yout_dly1[0]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.059      ; 0.961      ;
; 0.732 ; svideo:svideo|luma_acc[8] ; svideo_yout_dly1[6]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.059      ; 0.962      ;
; 0.748 ; luma_saturated[3]         ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.981      ;
; 0.750 ; svideo:svideo|luma_2[7]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.064      ; 0.985      ;
; 0.751 ; svideo:svideo|luma_acc[9] ; svideo_yout_dly1[7]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.059      ; 0.981      ;
; 0.753 ; luma_saturated[2]         ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.986      ;
; 0.773 ; svideo:svideo|luma_acc[6] ; svideo_yout_dly1[4]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.059      ; 1.003      ;
; 0.777 ; luma_saturated[8]         ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.010      ;
; 0.777 ; svideo:svideo|luma_acc[4] ; svideo_yout_dly1[2]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.059      ; 1.007      ;
; 0.777 ; svideo:svideo|luma_acc[3] ; svideo_yout_dly1[1]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.059      ; 1.007      ;
; 0.778 ; svideo:svideo|luma_acc[7] ; svideo_yout_dly1[5]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.059      ; 1.008      ;
; 0.781 ; luma_saturated[6]         ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.014      ;
; 0.781 ; luma_saturated[4]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.014      ;
; 0.786 ; svideo:svideo|luma_acc[5] ; svideo_yout_dly1[3]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.059      ; 1.016      ;
; 0.789 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.022      ;
; 0.790 ; svideo:svideo|luma[6]     ; luma_saturated[7]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.141      ; 1.122      ;
; 0.804 ; svideo:svideo|luma[1]     ; luma_saturated[2]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.141      ; 1.136      ;
; 0.815 ; svideo:svideo|luma[1]     ; luma_saturated[3]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.141      ; 1.147      ;
; 0.825 ; svideo:svideo|luma[2]     ; svideo:svideo|luma_1[2]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.143      ; 1.159      ;
; 0.825 ; svideo:svideo|luma_2[9]   ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.059      ;
; 0.834 ; svideo:svideo|luma[7]     ; svideo:svideo|luma_1[7]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.143      ; 1.168      ;
; 0.841 ; svideo:svideo|chroma[3]   ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.144      ; 1.176      ;
; 0.846 ; svideo:svideo|chroma[4]   ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.144      ; 1.181      ;
; 0.849 ; svideo:svideo|luma[2]     ; luma_saturated[2]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.143      ; 1.183      ;
; 0.853 ; svideo:svideo|chroma[5]   ; cvbs1_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.144      ; 1.188      ;
; 0.859 ; svideo:svideo|luma[7]     ; luma_saturated[7]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.143      ; 1.193      ;
; 0.862 ; svideo:svideo|chroma[6]   ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.144      ; 1.197      ;
; 0.862 ; svideo:svideo|chroma[7]   ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.144      ; 1.197      ;
; 0.878 ; svideo:svideo|luma[3]     ; luma_saturated[3]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.143      ; 1.212      ;
; 0.879 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.112      ;
; 0.880 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.113      ;
; 0.882 ; svideo:svideo|luma_2[5]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.115      ;
; 0.883 ; svideo:svideo|chroma[8]   ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.144      ; 1.218      ;
; 0.884 ; svideo:svideo|chroma[8]   ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.144      ; 1.219      ;
; 0.885 ; svideo:svideo|luma_2[0]   ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.118      ;
; 0.889 ; svideo:svideo|luma[6]     ; luma_saturated[8]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.141      ; 1.221      ;
; 0.889 ; svideo:svideo|luma[3]     ; svideo:svideo|luma_1[3]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.143      ; 1.223      ;
; 0.891 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.124      ;
; 0.892 ; luma_saturated[0]         ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.125      ;
; 0.896 ; svideo:svideo|luma_2[0]   ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.129      ;
; 0.900 ; svideo:svideo|luma[6]     ; luma_saturated[9]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.141      ; 1.232      ;
; 0.914 ; svideo:svideo|luma[1]     ; luma_saturated[4]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.141      ; 1.246      ;
; 0.921 ; svideo:svideo|chroma[2]   ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.144      ; 1.256      ;
; 0.925 ; svideo:svideo|luma[1]     ; luma_saturated[5]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.141      ; 1.257      ;
; 0.933 ; svideo:svideo|luma_2[3]   ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.064      ; 1.168      ;
; 0.946 ; svideo:svideo|luma[4]     ; svideo:svideo|luma_1[4]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.136      ; 1.273      ;
; 0.957 ; luma_saturated[7]         ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.190      ;
; 0.978 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.211      ;
; 0.981 ; svideo:svideo|luma_2[5]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.214      ;
; 0.988 ; luma_saturated[5]         ; cvbs1_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.221      ;
; 0.989 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.222      ;
; 0.990 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.223      ;
; 0.991 ; luma_saturated[0]         ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.224      ;
; 0.992 ; svideo:svideo|luma_2[5]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.225      ;
; 0.995 ; svideo:svideo|luma_2[0]   ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.228      ;
; 0.998 ; svideo:svideo|luma[4]     ; luma_saturated[4]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.134      ; 1.323      ;
; 1.001 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.234      ;
; 1.002 ; luma_saturated[0]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.235      ;
; 1.006 ; svideo:svideo|luma_2[0]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.239      ;
; 1.015 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.064      ; 1.250      ;
; 1.024 ; svideo:svideo|luma[1]     ; luma_saturated[6]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.141      ; 1.356      ;
; 1.027 ; svideo:svideo|luma_2[8]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.064      ; 1.262      ;
; 1.033 ; luma_saturated[3]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.266      ;
; 1.034 ; luma_saturated[2]         ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.267      ;
; 1.035 ; svideo:svideo|luma[1]     ; luma_saturated[7]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.141      ; 1.367      ;
; 1.037 ; svideo:svideo|luma_2[7]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.064      ; 1.272      ;
; 1.041 ; luma_saturated[8]         ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.274      ;
; 1.042 ; luma_saturated[1]         ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.275      ;
; 1.045 ; luma_saturated[6]         ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.278      ;
; 1.045 ; luma_saturated[4]         ; cvbs1_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.278      ;
; 1.050 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.064      ; 1.285      ;
; 1.053 ; luma_saturated[2]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.286      ;
+-------+---------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                          ;
+-------+---------------------------------------+-------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                             ; To Node                                                                                                                       ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------+-------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[5]                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 5.450      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.142     ; 5.455      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.149     ; 5.448      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[10]                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.149     ; 5.448      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[6]                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.154     ; 5.443      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[0]                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 5.449      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[1]                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 5.449      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[2]                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 5.449      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[3]                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 5.449      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[4]                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 5.449      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[5]                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 5.449      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[6]                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 5.449      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[7]                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 5.449      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[8]                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.146     ; 5.451      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[9]                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.146     ; 5.451      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[10]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.146     ; 5.451      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[11]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.146     ; 5.451      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[12]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.146     ; 5.451      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[13]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.146     ; 5.451      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[14]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.146     ; 5.451      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[15]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.146     ; 5.451      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[16]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 5.450      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[17]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 5.450      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[18]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 5.450      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[19]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 5.450      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[20]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 5.450      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[21]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 5.450      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[22]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 5.450      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[23]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 5.450      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[24]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 5.450      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[25]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 5.450      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[26]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 5.450      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[27]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 5.450      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[28]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 5.450      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[29]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 5.450      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[30]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 5.450      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[31]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 5.450      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_shift_reg[5]                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.142     ; 5.455      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|skctl_reg[0]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 5.450      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|skctl_reg[1]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 5.450      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[0]    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.146     ; 5.451      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[1]    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.146     ; 5.451      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[2]    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.146     ; 5.451      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[3]    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.146     ; 5.451      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[4]    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.146     ; 5.451      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[5]    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.146     ; 5.451      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[6]    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.146     ; 5.451      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|syncreset_enable_divider:enable_15_div|enabled_out_reg ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 5.450      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[2]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.150     ; 5.447      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|skctl_reg[2]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.142     ; 5.455      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pot_counter_reg[0]                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 5.441      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pot_counter_reg[1]                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 5.441      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pot_counter_reg[2]                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 5.441      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pot_counter_reg[3]                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 5.441      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pot_counter_reg[4]                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 5.441      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pot_counter_reg[5]                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 5.441      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pot_counter_reg[6]                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 5.441      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pot_counter_reg[7]                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 5.441      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pot_reset_reg                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 5.441      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[6]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.146     ; 5.451      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[1]                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.140     ; 5.457      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[2]                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.140     ; 5.457      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[3]                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.140     ; 5.457      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[8]                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.154     ; 5.443      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[26]                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.152     ; 5.445      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|state                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.145     ; 5.452      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_speed_reg[7]                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.145     ; 5.452      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[0]                                                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.151     ; 5.446      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[1]                                                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.151     ; 5.446      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[18]                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.149     ; 5.448      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addrend_reg[2]                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.144     ; 5.453      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[3]                                                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.144     ; 5.453      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[3]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.144     ; 5.453      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addrend_reg[3]                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.144     ; 5.453      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[5]                                                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.151     ; 5.446      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[7]                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.154     ; 5.443      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[0]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.155     ; 5.442      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[1]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.155     ; 5.442      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[2]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.155     ; 5.442      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[3]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.155     ; 5.442      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[4]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.155     ; 5.442      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[5]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.155     ; 5.442      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[6]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.155     ; 5.442      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[7]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.155     ; 5.442      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[8]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.155     ; 5.442      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[9]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.155     ; 5.442      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[10]                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.155     ; 5.442      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[0]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.143     ; 5.454      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[1]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.143     ; 5.454      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[2]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.143     ; 5.454      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[3]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.143     ; 5.454      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[4]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.143     ; 5.454      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[5]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.143     ; 5.454      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[6]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.143     ; 5.454      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[7]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.143     ; 5.454      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[8]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.143     ; 5.454      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[9]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.143     ; 5.454      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[10]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.143     ; 5.454      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[11]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.143     ; 5.454      ;
; 6.042 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[12]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.143     ; 5.454      ;
+-------+---------------------------------------+-------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                       ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node              ; To Node                                                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 8.363 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[7]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.241     ; 2.918      ;
; 8.427 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[6]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.169     ; 2.931      ;
; 8.427 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[9]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.168     ; 2.932      ;
; 8.427 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[11]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.168     ; 2.932      ;
; 8.428 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[4]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.167     ; 2.932      ;
; 8.428 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[5]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.167     ; 2.932      ;
; 8.428 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[7]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.169     ; 2.930      ;
; 8.428 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[8]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.169     ; 2.930      ;
; 8.437 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[8]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.296     ; 2.787      ;
; 8.437 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[9]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.303     ; 2.780      ;
; 8.441 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[12]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.299     ; 2.780      ;
; 8.441 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[10]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.299     ; 2.780      ;
; 8.441 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[13]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.297     ; 2.782      ;
; 8.441 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[11]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.299     ; 2.780      ;
; 8.441 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[14]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.297     ; 2.782      ;
; 8.441 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[15]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.297     ; 2.782      ;
; 8.448 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ba[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.159     ; 2.920      ;
; 8.448 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ba[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.159     ; 2.920      ;
; 8.448 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[0]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.159     ; 2.920      ;
; 8.448 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[1]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.159     ; 2.920      ;
; 8.448 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.159     ; 2.920      ;
; 8.450 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[7]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.156     ; 2.921      ;
; 8.450 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[2]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.155     ; 2.922      ;
; 8.450 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[3]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.155     ; 2.922      ;
; 8.453 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[5]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.280     ; 2.787      ;
; 8.453 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[8]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.189     ; 2.887      ;
; 8.453 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[9]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.196     ; 2.880      ;
; 8.454 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[4]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.297     ; 2.769      ;
; 8.454 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[6]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.278     ; 2.788      ;
; 8.457 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[10]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.192     ; 2.880      ;
; 8.457 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[11]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.192     ; 2.880      ;
; 8.457 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[12]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.192     ; 2.880      ;
; 8.457 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[13]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.190     ; 2.882      ;
; 8.457 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[14]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.190     ; 2.882      ;
; 8.457 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[15]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.190     ; 2.882      ;
; 8.458 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[0]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.285     ; 2.777      ;
; 8.458 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[1]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.285     ; 2.777      ;
; 8.458 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[2]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.285     ; 2.777      ;
; 8.461 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[3]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.288     ; 2.771      ;
; 8.469 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[5]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.173     ; 2.887      ;
; 8.470 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[4]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.190     ; 2.869      ;
; 8.470 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[6]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 2.888      ;
; 8.474 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[0]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.178     ; 2.877      ;
; 8.474 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[1]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.178     ; 2.877      ;
; 8.474 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[2]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.178     ; 2.877      ;
; 8.477 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[3]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.181     ; 2.871      ;
; 8.577 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[6]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.139     ; 2.923      ;
; 8.577 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[7]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.139     ; 2.923      ;
; 8.645 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.167     ; 2.715      ;
; 8.668 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ras_n                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.156     ; 2.703      ;
; 8.668 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cas_n                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.156     ; 2.703      ;
; 8.668 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_we_n                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.156     ; 2.703      ;
; 8.668 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.156     ; 2.703      ;
; 8.668 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.156     ; 2.703      ;
; 8.924 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_oe                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.148     ; 2.567      ;
; 8.925 ; sdram_reset_ctrl_n_reg ; ram_do_reg[29]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.142     ; 2.572      ;
; 8.925 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_req                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.137     ; 2.577      ;
; 8.925 ; sdram_reset_ctrl_n_reg ; ram_di_reg[0]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.137     ; 2.577      ;
; 8.925 ; sdram_reset_ctrl_n_reg ; ram_di_reg[1]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.137     ; 2.577      ;
; 8.925 ; sdram_reset_ctrl_n_reg ; ram_di_reg[2]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.137     ; 2.577      ;
; 8.925 ; sdram_reset_ctrl_n_reg ; ram_di_reg[5]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.137     ; 2.577      ;
; 8.925 ; sdram_reset_ctrl_n_reg ; ram_di_reg[6]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.137     ; 2.577      ;
; 8.925 ; sdram_reset_ctrl_n_reg ; ram_di_reg[8]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.137     ; 2.577      ;
; 8.925 ; sdram_reset_ctrl_n_reg ; ram_di_reg[9]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.137     ; 2.577      ;
; 8.925 ; sdram_reset_ctrl_n_reg ; ram_di_reg[10]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.137     ; 2.577      ;
; 8.925 ; sdram_reset_ctrl_n_reg ; ram_di_reg[13]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.137     ; 2.577      ;
; 8.925 ; sdram_reset_ctrl_n_reg ; ram_di_reg[14]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.137     ; 2.577      ;
; 8.925 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[1]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.142     ; 2.572      ;
; 8.925 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[0]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.142     ; 2.572      ;
; 8.926 ; sdram_reset_ctrl_n_reg ; seq_reg[0]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.135     ; 2.578      ;
; 8.926 ; sdram_reset_ctrl_n_reg ; seq_reg[1]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.135     ; 2.578      ;
; 8.926 ; sdram_reset_ctrl_n_reg ; seq_reg[3]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.135     ; 2.578      ;
; 8.926 ; sdram_reset_ctrl_n_reg ; seq_reg[4]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.135     ; 2.578      ;
; 8.926 ; sdram_reset_ctrl_n_reg ; seq_reg[5]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.135     ; 2.578      ;
; 8.926 ; sdram_reset_ctrl_n_reg ; seq_reg[6]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.135     ; 2.578      ;
; 8.926 ; sdram_reset_ctrl_n_reg ; seq_reg[7]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.135     ; 2.578      ;
; 8.926 ; sdram_reset_ctrl_n_reg ; seq_reg[8]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.135     ; 2.578      ;
; 8.926 ; sdram_reset_ctrl_n_reg ; seq_reg[9]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.135     ; 2.578      ;
; 8.926 ; sdram_reset_ctrl_n_reg ; seq_reg[10]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.135     ; 2.578      ;
; 8.926 ; sdram_reset_ctrl_n_reg ; ram_do_reg[3]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.168     ; 2.545      ;
; 8.926 ; sdram_reset_ctrl_n_reg ; ram_do_reg[2]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.168     ; 2.545      ;
; 8.926 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_act                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.138     ; 2.575      ;
; 8.926 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.139     ; 2.574      ;
; 8.926 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.139     ; 2.574      ;
; 8.926 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.139     ; 2.574      ;
; 8.926 ; sdram_reset_ctrl_n_reg ; ram_do_reg[21]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.169     ; 2.544      ;
; 8.926 ; sdram_reset_ctrl_n_reg ; ram_di_reg[3]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.140     ; 2.573      ;
; 8.926 ; sdram_reset_ctrl_n_reg ; ram_di_reg[4]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.140     ; 2.573      ;
; 8.926 ; sdram_reset_ctrl_n_reg ; ram_di_reg[7]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.140     ; 2.573      ;
; 8.926 ; sdram_reset_ctrl_n_reg ; ram_di_reg[11]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.140     ; 2.573      ;
; 8.926 ; sdram_reset_ctrl_n_reg ; ram_di_reg[12]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.140     ; 2.573      ;
; 8.926 ; sdram_reset_ctrl_n_reg ; ram_di_reg[15]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.140     ; 2.573      ;
; 8.926 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[2]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.139     ; 2.574      ;
; 8.926 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[3]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.139     ; 2.574      ;
; 8.926 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[4]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.139     ; 2.574      ;
; 8.926 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[5]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.138     ; 2.575      ;
; 8.926 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[8]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.138     ; 2.575      ;
; 8.926 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[9]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.138     ; 2.575      ;
; 8.926 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[11]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.138     ; 2.575      ;
; 8.928 ; sdram_reset_ctrl_n_reg ; seq_reg[11]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.148     ; 2.563      ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                           ; To Node                                                                                                                                                                                                                ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 1.300 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a5 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.351      ; 1.819      ;
; 1.300 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a4 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.351      ; 1.819      ;
; 1.300 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a3 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.351      ; 1.819      ;
; 1.300 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a2 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.351      ; 1.819      ;
; 1.300 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.351      ; 1.819      ;
; 1.300 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.351      ; 1.819      ;
; 1.343 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a55  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.855      ;
; 1.343 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a54  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.855      ;
; 1.343 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a53  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.855      ;
; 1.343 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a52  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.855      ;
; 1.343 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a51  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.855      ;
; 1.343 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a50  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.855      ;
; 1.343 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a49  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.855      ;
; 1.343 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a48  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.855      ;
; 1.343 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a39  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.855      ;
; 1.343 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a38  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.855      ;
; 1.343 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a37  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.855      ;
; 1.343 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a36  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.855      ;
; 1.343 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a35  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.855      ;
; 1.343 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a34  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.855      ;
; 1.343 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a33  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.855      ;
; 1.343 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a32  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.855      ;
; 1.343 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a19  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.855      ;
; 1.343 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a18  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.855      ;
; 1.343 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a17  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.855      ;
; 1.343 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a16  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.855      ;
; 1.343 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a7   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.855      ;
; 1.343 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a6   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.855      ;
; 1.343 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a5   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.855      ;
; 1.343 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a4   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.855      ;
; 1.343 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a3   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.855      ;
; 1.343 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a2   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.855      ;
; 1.343 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a1   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.855      ;
; 1.343 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.855      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a63  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a62  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a61  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a60  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a59  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a58  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a57  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a56  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a47  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a46  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a45  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a44  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a43  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a42  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a41  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a40  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a31  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a30  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a29  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a28  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a27  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a26  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a25  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a24  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a23  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a22  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a21  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a20  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a15  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a14  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a13  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a12  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a11  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a10  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a9   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 1.867      ;
; 1.550 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a6 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.355      ; 2.073      ;
; 1.550 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a5 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.355      ; 2.073      ;
; 1.550 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a4 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.355      ; 2.073      ;
; 1.550 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a3 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.355      ; 2.073      ;
; 1.550 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a2 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.355      ; 2.073      ;
; 1.550 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.355      ; 2.073      ;
; 1.550 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.355      ; 2.073      ;
; 1.789 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a15   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.365      ; 2.322      ;
; 1.789 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a14   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.365      ; 2.322      ;
; 1.789 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a13   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.365      ; 2.322      ;
; 1.789 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a12   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.365      ; 2.322      ;
; 1.789 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a11   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.365      ; 2.322      ;
; 1.789 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a10   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.365      ; 2.322      ;
; 1.789 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a9    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.365      ; 2.322      ;
; 1.789 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a8    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.365      ; 2.322      ;
; 1.789 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a7    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.365      ; 2.322      ;
; 1.789 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a6    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.365      ; 2.322      ;
; 1.789 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a5    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.365      ; 2.322      ;
; 1.789 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a4    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.365      ; 2.322      ;
; 1.789 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a3    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.365      ; 2.322      ;
; 1.789 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a2    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.365      ; 2.322      ;
; 1.789 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a1    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.365      ; 2.322      ;
; 1.789 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.365      ; 2.322      ;
; 4.261 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|pot_from_signed:pot0|enable_divider:pot_clock_div|count_reg[0]                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.073      ; 4.505      ;
; 4.261 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|pot_from_signed:pot0|enable_divider:pot_clock_div|count_reg[1]                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.073      ; 4.505      ;
; 4.261 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|pot_from_signed:pot0|enable_divider:pot_clock_div|count_reg[2]                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.073      ; 4.505      ;
; 4.261 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|pot_from_signed:pot0|enable_divider:pot_clock_div|count_reg[3]                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.073      ; 4.505      ;
; 4.261 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|pot_from_signed:pot0|enable_divider:pot_clock_div|count_reg[4]                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.073      ; 4.505      ;
; 4.261 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|pot_from_signed:pot0|enable_divider:pot_clock_div|count_reg[5]                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.073      ; 4.505      ;
; 4.261 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|pot_from_signed:pot0|enable_divider:pot_clock_div|count_reg[6]                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.073      ; 4.505      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                        ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node              ; To Node                                                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 1.683 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_reg                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.551      ; 2.425      ;
; 1.683 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_reg                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.551      ; 2.425      ;
; 2.065 ; sdram_reset_ctrl_n_reg ; ram_do_reg[28]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 2.397      ;
; 2.065 ; sdram_reset_ctrl_n_reg ; ram_do_reg[26]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 2.397      ;
; 2.065 ; sdram_reset_ctrl_n_reg ; ram_do_reg[30]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 2.397      ;
; 2.065 ; sdram_reset_ctrl_n_reg ; ram_do_reg[4]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 2.397      ;
; 2.065 ; sdram_reset_ctrl_n_reg ; ram_do_reg[5]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 2.397      ;
; 2.065 ; sdram_reset_ctrl_n_reg ; ram_do_reg[6]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 2.397      ;
; 2.065 ; sdram_reset_ctrl_n_reg ; ram_do_reg[12]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 2.397      ;
; 2.065 ; sdram_reset_ctrl_n_reg ; ram_do_reg[13]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 2.397      ;
; 2.065 ; sdram_reset_ctrl_n_reg ; ram_do_reg[14]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 2.397      ;
; 2.065 ; sdram_reset_ctrl_n_reg ; ram_do_reg[10]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 2.397      ;
; 2.065 ; sdram_reset_ctrl_n_reg ; ram_do_reg[20]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 2.397      ;
; 2.065 ; sdram_reset_ctrl_n_reg ; ram_do_reg[18]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 2.397      ;
; 2.065 ; sdram_reset_ctrl_n_reg ; ram_do_reg[22]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 2.397      ;
; 2.066 ; sdram_reset_ctrl_n_reg ; ram_do_reg[27]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 2.398      ;
; 2.066 ; sdram_reset_ctrl_n_reg ; ram_do_reg[24]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 2.398      ;
; 2.066 ; sdram_reset_ctrl_n_reg ; ram_do_reg[19]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 2.398      ;
; 2.066 ; sdram_reset_ctrl_n_reg ; ram_do_reg[1]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 2.398      ;
; 2.066 ; sdram_reset_ctrl_n_reg ; ram_do_reg[0]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 2.398      ;
; 2.066 ; sdram_reset_ctrl_n_reg ; ram_do_reg[7]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 2.398      ;
; 2.066 ; sdram_reset_ctrl_n_reg ; ram_do_reg[11]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 2.398      ;
; 2.066 ; sdram_reset_ctrl_n_reg ; ram_do_reg[16]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 2.398      ;
; 2.066 ; sdram_reset_ctrl_n_reg ; ram_do_reg[17]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 2.398      ;
; 2.066 ; sdram_reset_ctrl_n_reg ; ram_do_reg[15]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 2.398      ;
; 2.066 ; sdram_reset_ctrl_n_reg ; ram_do_reg[8]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 2.398      ;
; 2.066 ; sdram_reset_ctrl_n_reg ; ram_do_reg[9]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 2.398      ;
; 2.066 ; sdram_reset_ctrl_n_reg ; ram_do_reg[23]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 2.398      ;
; 2.066 ; sdram_reset_ctrl_n_reg ; ram_do_reg[31]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 2.398      ;
; 2.066 ; sdram_reset_ctrl_n_reg ; ram_do_reg[25]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 2.398      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; seq_reg[0]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 2.429      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; seq_reg[1]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 2.429      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; seq_reg[3]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 2.429      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; seq_reg[4]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 2.429      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; seq_reg[5]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 2.429      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; seq_reg[6]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 2.429      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; seq_reg[7]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 2.429      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; seq_reg[8]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 2.429      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; seq_reg[9]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 2.429      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; seq_reg[10]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 2.429      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_req                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 2.427      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_act                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.166      ; 2.426      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 2.425      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 2.425      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 2.425      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; ram_di_reg[0]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 2.427      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; ram_di_reg[1]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 2.427      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; ram_di_reg[2]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 2.427      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; ram_di_reg[3]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.164      ; 2.424      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; ram_di_reg[4]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.164      ; 2.424      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; ram_di_reg[5]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 2.427      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; ram_di_reg[6]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 2.427      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; ram_di_reg[7]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.164      ; 2.424      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; ram_di_reg[8]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 2.427      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; ram_di_reg[9]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 2.427      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; ram_di_reg[10]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 2.427      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; ram_di_reg[11]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.164      ; 2.424      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; ram_di_reg[12]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.164      ; 2.424      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; ram_di_reg[13]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 2.427      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; ram_di_reg[14]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 2.427      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; ram_di_reg[15]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.164      ; 2.424      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[2]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 2.425      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[3]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 2.425      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[4]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 2.425      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[5]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.166      ; 2.426      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[8]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.166      ; 2.426      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[9]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.166      ; 2.426      ;
; 2.069 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[11]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.166      ; 2.426      ;
; 2.070 ; sdram_reset_ctrl_n_reg ; seq_reg[2]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 2.421      ;
; 2.070 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 2.421      ;
; 2.070 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 2.421      ;
; 2.070 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 2.421      ;
; 2.070 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 2.421      ;
; 2.070 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 2.421      ;
; 2.070 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 2.421      ;
; 2.070 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 2.421      ;
; 2.070 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 2.421      ;
; 2.070 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 2.421      ;
; 2.070 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 2.421      ;
; 2.070 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 2.418      ;
; 2.070 ; sdram_reset_ctrl_n_reg ; ram_do_reg[29]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 2.423      ;
; 2.070 ; sdram_reset_ctrl_n_reg ; sdram_request_reg                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 2.421      ;
; 2.070 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 2.421      ;
; 2.070 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 2.421      ;
; 2.070 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 2.421      ;
; 2.070 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 2.421      ;
; 2.070 ; sdram_reset_ctrl_n_reg ; sdram_request_complete_reg                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 2.421      ;
; 2.070 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_oe                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.156      ; 2.417      ;
; 2.070 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[1]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 2.423      ;
; 2.070 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[0]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 2.423      ;
; 2.070 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[0]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 2.418      ;
; 2.070 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[1]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 2.418      ;
; 2.071 ; sdram_reset_ctrl_n_reg ; seq_reg[11]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.156      ; 2.418      ;
; 2.071 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.156      ; 2.418      ;
; 2.071 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.156      ; 2.418      ;
; 2.071 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.156      ; 2.418      ;
; 2.071 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.156      ; 2.418      ;
; 2.071 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_psel[0]                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.156      ; 2.418      ;
; 2.071 ; sdram_reset_ctrl_n_reg ; ram_do_reg[21]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.134      ; 2.396      ;
; 2.071 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.156      ; 2.418      ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                         ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+---------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                                                          ; Clock Edge ; Target                    ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+---------------------------+
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[2]              ;
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[3]              ;
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[4]              ;
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[5]              ;
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[6]              ;
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[7]              ;
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[8]              ;
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[9]              ;
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[0]         ;
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[1]         ;
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[2]         ;
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[3]         ;
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[4]         ;
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[5]         ;
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[6]         ;
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[7]         ;
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[8]         ;
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[9]         ;
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[1]   ;
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[2]   ;
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[3]   ;
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[6]   ;
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[7]   ;
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[8]   ;
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[9]   ;
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[1]   ;
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[2]   ;
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[3]   ;
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[6]   ;
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[7]   ;
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[8]   ;
; 4.089 ; 4.307        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[9]   ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[0]   ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[4]   ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[5]   ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[0]   ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[4]   ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[5]   ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[0] ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[1] ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[2] ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[3] ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[4] ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[5] ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[6] ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[7] ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[8] ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[9] ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[0]       ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[1]       ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[2]       ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[3]       ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[4]       ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[5]       ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[6]       ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[7]       ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[0]       ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[1]       ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[2]       ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[3]       ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[4]       ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[5]       ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[6]       ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[7]       ;
; 4.202 ; 4.353        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[0]              ;
; 4.202 ; 4.353        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[1]              ;
; 4.202 ; 4.353        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[2]              ;
; 4.202 ; 4.353        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[3]              ;
; 4.202 ; 4.353        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[7]              ;
; 4.203 ; 4.354        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[4]              ;
; 4.203 ; 4.354        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[5]              ;
; 4.203 ; 4.354        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[6]              ;
; 4.220 ; 4.376        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[3]              ;
; 4.220 ; 4.376        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[4]              ;
; 4.220 ; 4.376        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[5]              ;
; 4.220 ; 4.376        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[6]              ;
; 4.220 ; 4.376        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[7]              ;
; 4.221 ; 4.377        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[0]              ;
; 4.221 ; 4.377        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[1]              ;
; 4.221 ; 4.377        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[2]              ;
; 4.234 ; 4.420        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[2]         ;
; 4.234 ; 4.420        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[3]         ;
; 4.234 ; 4.420        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[4]         ;
; 4.234 ; 4.420        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[5]         ;
; 4.234 ; 4.420        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[6]         ;
; 4.234 ; 4.420        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[7]         ;
; 4.234 ; 4.420        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[8]         ;
; 4.234 ; 4.420        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[9]         ;
; 4.234 ; 4.420        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[0]   ;
; 4.234 ; 4.420        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[4]   ;
; 4.234 ; 4.420        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[5]   ;
; 4.234 ; 4.420        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[6]   ;
; 4.234 ; 4.420        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[7]   ;
; 4.234 ; 4.420        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[8]   ;
; 4.234 ; 4.420        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[0]   ;
; 4.234 ; 4.420        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[4]   ;
; 4.234 ; 4.420        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[5]   ;
; 4.234 ; 4.420        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[6]   ;
; 4.234 ; 4.420        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[7]   ;
; 4.234 ; 4.420        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[8]   ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+---------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                         ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-----------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                                                          ; Clock Edge ; Target                                                    ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-----------------------------------------------------------+
; 5.525 ; 5.743        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_reg                      ;
; 5.525 ; 5.743        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_reg                      ;
; 5.541 ; 5.759        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ;
; 5.541 ; 5.759        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ;
; 5.541 ; 5.759        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ;
; 5.541 ; 5.759        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ;
; 5.541 ; 5.759        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ;
; 5.541 ; 5.759        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ;
; 5.541 ; 5.759        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ;
; 5.541 ; 5.759        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ;
; 5.541 ; 5.759        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ;
; 5.541 ; 5.759        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ;
; 5.541 ; 5.759        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ;
; 5.541 ; 5.759        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ;
; 5.541 ; 5.759        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_act                      ;
; 5.541 ; 5.759        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ;
; 5.541 ; 5.759        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_request_complete_reg                                ;
; 5.541 ; 5.759        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_request_reg                                         ;
; 5.541 ; 5.759        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[2]                                                ;
; 5.542 ; 5.760        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ;
; 5.542 ; 5.760        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ;
; 5.542 ; 5.760        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ;
; 5.542 ; 5.760        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ;
; 5.542 ; 5.760        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_psel[0]                     ;
; 5.542 ; 5.760        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[0]~_Duplicate_1  ;
; 5.542 ; 5.760        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ;
; 5.542 ; 5.760        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[1]~_Duplicate_1  ;
; 5.542 ; 5.760        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1     ;
; 5.542 ; 5.760        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|sdram_rdy                     ;
; 5.542 ; 5.760        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[11]                                               ;
; 5.544 ; 5.762        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[11]                                            ;
; 5.544 ; 5.762        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[12]                                            ;
; 5.544 ; 5.762        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[15]                                            ;
; 5.544 ; 5.762        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[3]                                             ;
; 5.544 ; 5.762        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[4]                                             ;
; 5.544 ; 5.762        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[7]                                             ;
; 5.544 ; 5.762        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[10]                                            ;
; 5.544 ; 5.762        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[12]                                            ;
; 5.544 ; 5.762        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[13]                                            ;
; 5.544 ; 5.762        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[14]                                            ;
; 5.544 ; 5.762        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[18]                                            ;
; 5.544 ; 5.762        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[20]                                            ;
; 5.544 ; 5.762        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[21]                                            ;
; 5.544 ; 5.762        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[22]                                            ;
; 5.544 ; 5.762        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[26]                                            ;
; 5.544 ; 5.762        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[28]                                            ;
; 5.544 ; 5.762        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[30]                                            ;
; 5.544 ; 5.762        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[4]                                             ;
; 5.544 ; 5.762        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[5]                                             ;
; 5.544 ; 5.762        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[6]                                             ;
; 5.544 ; 5.762        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[6]~_Duplicate_1  ;
; 5.544 ; 5.762        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[7]~_Duplicate_1  ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_bena_reg[0]                                           ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_bena_reg[1]                                           ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[0]                                             ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[10]                                            ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[13]                                            ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[14]                                            ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[1]                                             ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[2]                                             ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[5]                                             ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[6]                                             ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[8]                                             ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[9]                                             ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[0]                                             ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[11]                                            ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[15]                                            ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[16]                                            ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[17]                                            ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[19]                                            ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[1]                                             ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[23]                                            ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[24]                                            ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[25]                                            ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[27]                                            ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[29]                                            ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[2]                                             ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[31]                                            ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[3]                                             ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[7]                                             ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[8]                                             ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[9]                                             ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_act                      ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_refr_act                    ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_refr_req                    ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[11]~_Duplicate_1 ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[2]~_Duplicate_1  ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[3]~_Duplicate_1  ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[4]~_Duplicate_1  ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[5]~_Duplicate_1  ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[8]~_Duplicate_1  ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[9]~_Duplicate_1  ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[0]                                                ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[10]                                               ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[1]                                                ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[3]                                                ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[4]                                                ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[5]                                                ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-----------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: 'usb_pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                               ; Clock Edge ; Target                                                                                                                                                                                                          ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 10.123 ; 10.341       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dataOut[0]                                                                ;
; 10.123 ; 10.341       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dataOut[1]                                                                ;
; 10.123 ; 10.341       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dataOut[2]                                                                ;
; 10.124 ; 10.342       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[0]                                  ;
; 10.124 ; 10.342       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[1]                                  ;
; 10.124 ; 10.342       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RXByte[2]                                            ;
; 10.127 ; 10.345       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[0]                                  ;
; 10.127 ; 10.345       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[1]                                  ;
; 10.141 ; 10.359       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CRC16En                ;
; 10.141 ; 10.359       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.010111 ;
; 10.141 ; 10.359       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|updateCRC16:TxUpdateCRC16|data[7]                      ;
; 10.141 ; 10.359       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|updateCRC16:TxUpdateCRC16|doUpdateCRC                  ;
; 10.141 ; 10.359       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|updateCRC16:TxUpdateCRC16|i[0]                         ;
; 10.141 ; 10.359       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|updateCRC16:TxUpdateCRC16|i[1]                         ;
; 10.141 ; 10.359       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|updateCRC16:TxUpdateCRC16|i[2]                         ;
; 10.141 ; 10.359       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|updateCRC16:TxUpdateCRC16|i[3]                         ;
; 10.141 ; 10.359       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|updateCRC16:TxUpdateCRC16|ready                        ;
; 10.141 ; 10.359       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|CurrState_getPkt.01010                               ;
; 10.141 ; 10.359       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|CurrState_getPkt.01011                               ;
; 10.141 ; 10.359       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|NAKRxed                                              ;
; 10.141 ; 10.359       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RXFifoWEn                                            ;
; 10.141 ; 10.359       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RXOverflow                                           ;
; 10.141 ; 10.359       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|stallRxed                                            ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|RxfifoBI:u_RxfifoBI|forceEmptyToggleSyncToUsbClk[0]                                      ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|RxfifoBI:u_RxfifoBI|forceEmptyToggleSyncToUsbClk[1]                                      ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|RxfifoBI:u_RxfifoBI|forceEmptyToggleSyncToUsbClk[2]                                      ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[0]                                                          ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[1]                                                          ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[2]                                                          ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[3]                                                          ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[4]                                                          ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[5]                                                          ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[6]                                                          ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[0]                                              ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[1]                                              ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[2]                                              ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[3]                                              ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[4]                                              ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[5]                                              ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[6]                                              ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|fifoFull                                                                  ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggleSyncToUsbClk[1]                                      ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggleSyncToUsbClk[2]                                      ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[0]                                               ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[1]                                               ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[2]                                               ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[3]                                               ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[4]                                               ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[5]                                               ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[6]                                               ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferOutIndex[0]                                                         ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferOutIndex[2]                                                         ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferOutIndex[3]                                                         ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferOutIndex[5]                                                         ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferOutIndex[6]                                                         ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|fifoEmpty                                                                 ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|HCTxPortArbiter:u_HCTxPortArbiter|CurrState_HCTxArb.000                    ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|HCTxPortArbiter:u_HCTxPortArbiter|directCntlGnt                            ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|CurrState_sofCntl.001                        ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|CurrState_sofCntl.010                        ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|CurrState_sofCntl.011                        ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|CurrState_sofCntl.100                        ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|CurrState_sofCntl.101                        ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|HCTxPortCntl[0]                              ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|HCTxPortReq                                  ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|HCTxPortWEn                                  ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.001                              ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.010                              ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.011                              ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.100                              ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.101                              ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.110                              ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|SOFSent                                          ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|SOFTimerClr                                      ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|sendPacketArbiterReq                             ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSync                                ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg[2]                           ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[2]                      ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[3]                      ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineState[0]                         ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|directControl:u_directControl|CurrState_drctCntl.001                       ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|directControl:u_directControl|CurrState_drctCntl.010                       ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|directControl:u_directControl|CurrState_drctCntl.011                       ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|directControl:u_directControl|CurrState_drctCntl.100                       ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|directControl:u_directControl|CurrState_drctCntl.101                       ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|directControl:u_directControl|CurrState_drctCntl.110                       ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|directControl:u_directControl|CurrState_drctCntl.111                       ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|directControl:u_directControl|HCTxPortCntl[0]                              ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|directControl:u_directControl|HCTxPortData[0]                              ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|directControl:u_directControl|HCTxPortData[1]                              ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|directControl:u_directControl|HCTxPortReq                                  ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|directControl:u_directControl|HCTxPortWEn                                  ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|CurrState_sndPkt.00001                             ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|CurrState_sndPkt.00010                             ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|CurrState_sndPkt.00011                             ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|CurrState_sndPkt.00101                             ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|CurrState_sndPkt.01000                             ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|CurrState_sndPkt.01100                             ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|CurrState_sndPkt.01101                             ;
; 10.142 ; 10.360       ; 0.218          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|CurrState_sndPkt.01111                             ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                   ;
+--------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                                          ; Clock Edge ; Target                                                                                                                                                                                             ;
+--------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 17.122 ; 17.452       ; 0.330          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[0]                                          ;
; 17.122 ; 17.452       ; 0.330          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[1]                                          ;
; 17.122 ; 17.452       ; 0.330          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[2]                                          ;
; 17.122 ; 17.452       ; 0.330          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[3]                                          ;
; 17.122 ; 17.452       ; 0.330          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[4]                                          ;
; 17.122 ; 17.452       ; 0.330          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[10]                                               ;
; 17.122 ; 17.452       ; 0.330          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[11]                                               ;
; 17.122 ; 17.452       ; 0.330          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[12]                                               ;
; 17.122 ; 17.452       ; 0.330          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[13]                                               ;
; 17.122 ; 17.452       ; 0.330          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[14]                                               ;
; 17.122 ; 17.452       ; 0.330          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[15]                                               ;
; 17.122 ; 17.452       ; 0.330          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[16]                                               ;
; 17.122 ; 17.452       ; 0.330          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[17]                                               ;
; 17.122 ; 17.452       ; 0.330          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[18]                                               ;
; 17.122 ; 17.452       ; 0.330          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[19]                                               ;
; 17.122 ; 17.452       ; 0.330          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[20]                                               ;
; 17.122 ; 17.452       ; 0.330          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[5]                                                ;
; 17.122 ; 17.452       ; 0.330          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[6]                                                ;
; 17.122 ; 17.452       ; 0.330          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[7]                                                ;
; 17.122 ; 17.452       ; 0.330          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[8]                                                ;
; 17.122 ; 17.452       ; 0.330          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[9]                                                ;
; 17.124 ; 17.454       ; 0.330          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[0]                                          ;
; 17.124 ; 17.454       ; 0.330          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[1]                                          ;
; 17.124 ; 17.454       ; 0.330          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[2]                                          ;
; 17.124 ; 17.454       ; 0.330          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[3]                                          ;
; 17.124 ; 17.454       ; 0.330          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[4]                                          ;
; 17.124 ; 17.454       ; 0.330          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[10]                                               ;
; 17.124 ; 17.454       ; 0.330          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[11]                                               ;
; 17.124 ; 17.454       ; 0.330          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[12]                                               ;
; 17.124 ; 17.454       ; 0.330          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[13]                                               ;
; 17.124 ; 17.454       ; 0.330          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[14]                                               ;
; 17.124 ; 17.454       ; 0.330          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[15]                                               ;
; 17.124 ; 17.454       ; 0.330          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[16]                                               ;
; 17.124 ; 17.454       ; 0.330          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[17]                                               ;
; 17.124 ; 17.454       ; 0.330          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[18]                                               ;
; 17.124 ; 17.454       ; 0.330          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[19]                                               ;
; 17.124 ; 17.454       ; 0.330          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[20]                                               ;
; 17.124 ; 17.454       ; 0.330          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[5]                                                ;
; 17.124 ; 17.454       ; 0.330          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[6]                                                ;
; 17.124 ; 17.454       ; 0.330          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[7]                                                ;
; 17.124 ; 17.454       ; 0.330          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[8]                                                ;
; 17.124 ; 17.454       ; 0.330          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[9]                                                ;
; 17.155 ; 17.373       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB[4]       ;
; 17.155 ; 17.373       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[2]  ;
; 17.155 ; 17.373       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[4]  ;
; 17.155 ; 17.373       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[5]  ;
; 17.161 ; 17.379       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[0]                                  ;
; 17.161 ; 17.379       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[1]                                  ;
; 17.161 ; 17.379       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[2]                                  ;
; 17.161 ; 17.379       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[3]                                  ;
; 17.161 ; 17.379       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[4]                                  ;
; 17.161 ; 17.379       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[5]                                  ;
; 17.161 ; 17.379       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[6]                                  ;
; 17.161 ; 17.379       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[0]  ;
; 17.161 ; 17.379       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[1]  ;
; 17.161 ; 17.379       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[3]  ;
; 17.161 ; 17.379       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[6]  ;
; 17.161 ; 17.379       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[7]  ;
; 17.162 ; 17.380       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB[11]           ;
; 17.162 ; 17.380       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB[12]           ;
; 17.162 ; 17.380       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB[8]            ;
; 17.162 ; 17.380       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB[9]            ;
; 17.162 ; 17.380       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[11]      ;
; 17.162 ; 17.380       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[12]      ;
; 17.162 ; 17.380       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[8]       ;
; 17.162 ; 17.380       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[9]       ;
; 17.162 ; 17.380       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connectStateInSTB[0]      ;
; 17.162 ; 17.380       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connectStateInSTB[1]      ;
; 17.162 ; 17.380       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connectStateInSTB_reg1[0] ;
; 17.162 ; 17.380       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connectStateInSTB_reg1[1] ;
; 17.163 ; 17.381       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSentInSTB[2]           ;
; 17.163 ; 17.381       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|clrTransReqSTB[2]         ;
; 17.163 ; 17.381       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connEventInSTB[2]         ;
; 17.163 ; 17.381       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connectStateInSTB[1]      ;
; 17.163 ; 17.381       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connectStateInSTB_reg1[1] ;
; 17.165 ; 17.383       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[0]                                  ;
; 17.165 ; 17.383       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[1]                                  ;
; 17.165 ; 17.383       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[2]                                  ;
; 17.165 ; 17.383       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[3]                                  ;
; 17.165 ; 17.383       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[4]                                  ;
; 17.165 ; 17.383       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[5]                                  ;
; 17.165 ; 17.383       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[6]                                  ;
; 17.166 ; 17.384       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[0]  ;
; 17.166 ; 17.384       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[1]  ;
; 17.166 ; 17.384       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[3]  ;
; 17.166 ; 17.384       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[7]  ;
; 17.167 ; 17.385       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPIDInSTB[0]             ;
; 17.167 ; 17.385       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB[0]       ;
; 17.167 ; 17.385       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB[10]           ;
; 17.167 ; 17.385       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB[11]           ;
; 17.167 ; 17.385       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB[8]            ;
; 17.167 ; 17.385       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[10]      ;
; 17.167 ; 17.385       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[11]      ;
; 17.167 ; 17.385       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[8]       ;
; 17.167 ; 17.385       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connectStateInSTB[0]      ;
; 17.167 ; 17.385       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connectStateInSTB_reg1[0] ;
; 17.167 ; 17.385       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPIDInSTB[2]             ;
; 17.167 ; 17.385       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPIDInSTB_reg1[1]        ;
; 17.167 ; 17.385       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPIDInSTB_reg1[2]        ;
; 17.167 ; 17.385       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPIDInSTB_reg1[3]        ;
+--------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                    ;
+--------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                                         ; Clock Edge ; Target                                                                                              ;
+--------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------+
; 17.428 ; 17.428       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]                      ;
; 17.428 ; 17.428       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]                      ;
; 17.428 ; 17.428       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]                      ;
; 17.428 ; 17.428       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]                      ;
; 17.428 ; 17.428       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|observablevcoout            ;
; 17.435 ; 17.435       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|inclk[0] ;
; 17.435 ; 17.435       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|outclk   ;
; 17.444 ; 17.444       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]                    ;
; 17.476 ; 17.476       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]                    ;
; 17.484 ; 17.484       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|inclk[0] ;
; 17.484 ; 17.484       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|outclk   ;
; 17.491 ; 17.491       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]                      ;
; 17.491 ; 17.491       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]                      ;
; 17.491 ; 17.491       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]                      ;
; 17.491 ; 17.491       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]                      ;
; 17.491 ; 17.491       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|observablevcoout            ;
+--------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: 'FPGA_CLK'                                                                                                                         ;
+---------+--------------+----------------+------------------+----------+------------+-----------------------------------------------------------------------------------------+
; Slack   ; Actual Width ; Required Width ; Type             ; Clock    ; Clock Edge ; Target                                                                                  ;
+---------+--------------+----------------+------------------+----------+------------+-----------------------------------------------------------------------------------------+
; 99.778  ; 99.778       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                                     ;
; 99.778  ; 99.778       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|observablevcoout                           ;
; 99.779  ; 99.779       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 99.779  ; 99.779       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 99.828  ; 99.828       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; FPGA_CLK~input|o                                                                        ;
; 99.856  ; 99.856       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|inclk[0]                                   ;
; 99.857  ; 99.857       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 100.000 ; 100.000      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; FPGA_CLK~input|i                                                                        ;
; 100.000 ; 100.000      ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; FPGA_CLK~input|i                                                                        ;
; 100.142 ; 100.142      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 100.143 ; 100.143      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|inclk[0]                                   ;
; 100.172 ; 100.172      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; FPGA_CLK~input|o                                                                        ;
; 100.218 ; 100.218      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 100.218 ; 100.218      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 100.219 ; 100.219      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                                     ;
; 100.219 ; 100.219      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|observablevcoout                           ;
; 196.000 ; 200.000      ; 4.000          ; Port Rate        ; FPGA_CLK ; Rise       ; FPGA_CLK                                                                                ;
+---------+--------------+----------------+------------------+----------+------------+-----------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                                                              ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 2.399 ; 2.570 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 2.381 ; 2.552 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 2.381 ; 2.552 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 2.381 ; 2.552 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 2.384 ; 2.555 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 2.393 ; 2.564 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 2.376 ; 2.547 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 2.374 ; 2.545 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 2.334 ; 2.504 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 2.392 ; 2.563 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 2.399 ; 2.570 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 2.395 ; 2.566 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 2.395 ; 2.566 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 2.395 ; 2.566 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 2.393 ; 2.564 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 2.393 ; 2.564 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 2.393 ; 2.564 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0       ; FPGA_CLK   ; 3.477 ; 3.626 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 0.683 ; 0.854 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dminus2       ; FPGA_CLK   ; 0.688 ; 0.859 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus1        ; FPGA_CLK   ; 0.691 ; 0.862 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus2        ; FPGA_CLK   ; 0.686 ; 0.857 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                                                 ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; -1.561 ; -1.731 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; -1.603 ; -1.774 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; -1.603 ; -1.774 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; -1.603 ; -1.774 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; -1.606 ; -1.777 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; -1.615 ; -1.786 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; -1.598 ; -1.769 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; -1.596 ; -1.767 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; -1.561 ; -1.731 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; -1.615 ; -1.786 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; -1.622 ; -1.793 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; -1.617 ; -1.788 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; -1.617 ; -1.788 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; -1.617 ; -1.788 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; -1.616 ; -1.787 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; -1.616 ; -1.787 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; -1.616 ; -1.787 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0       ; FPGA_CLK   ; -2.607 ; -2.749 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; -0.132 ; -0.303 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dminus2       ; FPGA_CLK   ; -0.138 ; -0.309 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus1        ; FPGA_CLK   ; -0.141 ; -0.312 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus2        ; FPGA_CLK   ; -0.136 ; -0.307 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                                                      ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_A[*]    ; FPGA_CLK   ; 4.957  ; 5.132  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]   ; FPGA_CLK   ; 2.750  ; 2.600  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]   ; FPGA_CLK   ; 2.750  ; 2.600  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]   ; FPGA_CLK   ; 2.754  ; 2.604  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]   ; FPGA_CLK   ; 2.754  ; 2.604  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]   ; FPGA_CLK   ; 2.742  ; 2.592  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]   ; FPGA_CLK   ; 2.742  ; 2.592  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]   ; FPGA_CLK   ; 2.740  ; 2.590  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]   ; FPGA_CLK   ; 2.049  ; 1.992  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]   ; FPGA_CLK   ; 4.957  ; 5.132  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]   ; FPGA_CLK   ; 2.741  ; 2.591  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]  ; FPGA_CLK   ; 2.750  ; 2.600  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]  ; FPGA_CLK   ; 2.741  ; 2.591  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]   ; FPGA_CLK   ; 4.968  ; 5.143  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]  ; FPGA_CLK   ; 4.968  ; 5.143  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]  ; FPGA_CLK   ; 2.060  ; 2.003  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N   ; FPGA_CLK   ; 2.063  ; 2.006  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N    ; FPGA_CLK   ; 2.753  ; 2.603  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]   ; FPGA_CLK   ; 4.398  ; 4.731  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 3.061  ; 2.998  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 3.061  ; 2.998  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 3.061  ; 2.998  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 4.398  ; 4.731  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 4.389  ; 4.722  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 2.216  ; 2.179  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 2.940  ; 2.819  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 2.753  ; 2.603  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 3.049  ; 2.986  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 4.382  ; 4.715  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 3.047  ; 2.984  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 3.047  ; 2.984  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 3.047  ; 2.984  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 4.388  ; 4.721  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 3.048  ; 2.985  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 3.048  ; 2.985  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n  ; FPGA_CLK   ; 2.742  ; 2.592  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n  ; FPGA_CLK   ; 2.753  ; 2.603  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N   ; FPGA_CLK   ; 2.753  ; 2.603  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N    ; FPGA_CLK   ; 4.971  ; 5.146  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L       ; FPGA_CLK   ; 7.282  ; 7.396  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R       ; FPGA_CLK   ; 5.623  ; 5.336  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK        ; FPGA_CLK   ; 3.162  ; 3.056  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD        ; FPGA_CLK   ; 3.212  ; 3.130  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3       ; FPGA_CLK   ; 3.322  ; 3.443  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK     ; FPGA_CLK   ; 11.654 ;        ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK     ; FPGA_CLK   ;        ; 11.852 ; Fall       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]      ; FPGA_CLK   ; 4.267  ; 4.535  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]     ; FPGA_CLK   ; 2.050  ; 1.993  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]     ; FPGA_CLK   ; 4.267  ; 4.535  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]     ; FPGA_CLK   ; 2.049  ; 1.992  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]     ; FPGA_CLK   ; 2.052  ; 1.995  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]      ; FPGA_CLK   ; 4.269  ; 4.537  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]     ; FPGA_CLK   ; 2.051  ; 1.994  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]     ; FPGA_CLK   ; 2.051  ; 1.994  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]     ; FPGA_CLK   ; 2.051  ; 1.994  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]     ; FPGA_CLK   ; 4.269  ; 4.537  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; dminus1       ; FPGA_CLK   ; 3.810  ; 3.831  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dminus2       ; FPGA_CLK   ; 3.676  ; 3.639  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus1        ; FPGA_CLK   ; 5.863  ; 6.196  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus2        ; FPGA_CLK   ; 3.678  ; 3.641  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                                                              ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_A[*]    ; FPGA_CLK   ; 1.411  ; 1.354  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]   ; FPGA_CLK   ; 2.084  ; 1.937  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]   ; FPGA_CLK   ; 2.084  ; 1.937  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]   ; FPGA_CLK   ; 2.088  ; 1.941  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]   ; FPGA_CLK   ; 2.088  ; 1.941  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]   ; FPGA_CLK   ; 2.076  ; 1.929  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]   ; FPGA_CLK   ; 2.076  ; 1.929  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]   ; FPGA_CLK   ; 2.074  ; 1.927  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]   ; FPGA_CLK   ; 1.411  ; 1.354  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]   ; FPGA_CLK   ; 4.292  ; 4.470  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]   ; FPGA_CLK   ; 2.075  ; 1.928  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]  ; FPGA_CLK   ; 2.084  ; 1.937  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]  ; FPGA_CLK   ; 2.075  ; 1.928  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]   ; FPGA_CLK   ; 1.421  ; 1.364  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]  ; FPGA_CLK   ; 4.302  ; 4.480  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]  ; FPGA_CLK   ; 1.421  ; 1.364  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N   ; FPGA_CLK   ; 1.424  ; 1.367  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N    ; FPGA_CLK   ; 2.087  ; 1.940  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]   ; FPGA_CLK   ; 1.577  ; 1.539  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 2.394  ; 2.333  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 2.394  ; 2.333  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 2.394  ; 2.333  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 3.759  ; 4.091  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 3.750  ; 4.082  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 1.577  ; 1.539  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 2.273  ; 2.154  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 2.087  ; 1.940  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 2.383  ; 2.322  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 3.744  ; 4.076  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 2.380  ; 2.319  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 2.380  ; 2.319  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 2.380  ; 2.319  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 3.750  ; 4.082  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 2.382  ; 2.321  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 2.382  ; 2.321  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n  ; FPGA_CLK   ; 2.076  ; 1.929  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n  ; FPGA_CLK   ; 2.087  ; 1.940  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N   ; FPGA_CLK   ; 2.087  ; 1.940  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N    ; FPGA_CLK   ; 4.305  ; 4.483  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L       ; FPGA_CLK   ; 6.432  ; 6.551  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R       ; FPGA_CLK   ; 4.751  ; 4.473  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK        ; FPGA_CLK   ; 2.387  ; 2.283  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD        ; FPGA_CLK   ; 2.436  ; 2.354  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3       ; FPGA_CLK   ; 2.539  ; 2.657  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK     ; FPGA_CLK   ; 10.943 ;        ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK     ; FPGA_CLK   ;        ; 11.143 ; Fall       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]      ; FPGA_CLK   ; 1.411  ; 1.354  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]     ; FPGA_CLK   ; 1.412  ; 1.355  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]     ; FPGA_CLK   ; 3.629  ; 3.897  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]     ; FPGA_CLK   ; 1.411  ; 1.354  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]     ; FPGA_CLK   ; 1.413  ; 1.356  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]      ; FPGA_CLK   ; 1.413  ; 1.356  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]     ; FPGA_CLK   ; 1.413  ; 1.356  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]     ; FPGA_CLK   ; 1.413  ; 1.356  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]     ; FPGA_CLK   ; 1.413  ; 1.356  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]     ; FPGA_CLK   ; 3.630  ; 3.898  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; dminus1       ; FPGA_CLK   ; 3.398  ; 3.418  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dminus2       ; FPGA_CLK   ; 3.265  ; 3.227  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus1        ; FPGA_CLK   ; 5.452  ; 5.784  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus2        ; FPGA_CLK   ; 3.267  ; 3.229  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                                                      ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 2.939 ; 2.829 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 4.099 ; 4.050 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 4.099 ; 4.050 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 4.099 ; 4.050 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 5.803 ; 6.066 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 5.477 ; 5.740 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 2.939 ; 2.829 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 3.199 ; 3.089 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 3.143 ; 3.015 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 5.094 ; 5.045 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 6.821 ; 7.084 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 4.433 ; 4.384 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 4.433 ; 4.384 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 4.433 ; 4.384 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 6.469 ; 6.732 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 4.408 ; 4.359 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 4.408 ; 4.359 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 3.630 ; 3.502 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 5.078 ; 5.029 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dminus2       ; FPGA_CLK   ; 6.531 ; 6.421 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus1        ; FPGA_CLK   ; 7.494 ; 7.757 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus2        ; FPGA_CLK   ; 6.528 ; 6.418 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                                                              ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 2.198 ; 2.088 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 3.316 ; 3.267 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 3.316 ; 3.267 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 3.316 ; 3.267 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 5.034 ; 5.297 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 4.721 ; 4.984 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 2.198 ; 2.088 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 2.447 ; 2.337 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 2.352 ; 2.224 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 4.272 ; 4.223 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 6.011 ; 6.274 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 3.636 ; 3.587 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 3.636 ; 3.587 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 3.636 ; 3.587 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 5.674 ; 5.937 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 3.613 ; 3.564 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 3.613 ; 3.564 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 2.821 ; 2.693 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 4.543 ; 4.494 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dminus2       ; FPGA_CLK   ; 5.932 ; 5.822 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus1        ; FPGA_CLK   ; 6.944 ; 7.207 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus2        ; FPGA_CLK   ; 5.929 ; 5.819 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                                                             ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 2.817     ; 2.927     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 4.005     ; 4.054     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 4.005     ; 4.054     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 4.005     ; 4.054     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 6.029     ; 5.766     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 5.714     ; 5.451     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 2.817     ; 2.927     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 3.045     ; 3.155     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 2.960     ; 3.088     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 4.963     ; 5.012     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 7.022     ; 6.759     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 4.333     ; 4.382     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 4.333     ; 4.382     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 4.333     ; 4.382     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 6.682     ; 6.419     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 4.309     ; 4.358     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 4.309     ; 4.358     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 3.399     ; 3.527     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 5.009     ; 5.058     ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dminus2       ; FPGA_CLK   ; 6.400     ; 6.510     ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus1        ; FPGA_CLK   ; 7.722     ; 7.459     ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus2        ; FPGA_CLK   ; 6.399     ; 6.509     ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                                                     ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 2.076     ; 2.186     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 3.224     ; 3.273     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 3.224     ; 3.273     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 3.224     ; 3.273     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 5.262     ; 4.999     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 4.959     ; 4.696     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 2.076     ; 2.186     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 2.295     ; 2.405     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 2.172     ; 2.300     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 4.144     ; 4.193     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 6.215     ; 5.952     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 3.539     ; 3.588     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 3.539     ; 3.588     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 3.539     ; 3.588     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 5.888     ; 5.625     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 3.516     ; 3.565     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 3.516     ; 3.565     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 2.593     ; 2.721     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 4.474     ; 4.523     ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dminus2       ; FPGA_CLK   ; 5.801     ; 5.911     ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus1        ; FPGA_CLK   ; 7.174     ; 6.911     ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus2        ; FPGA_CLK   ; 5.801     ; 5.911     ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+


---------------------------------------------
; Slow 1200mV 0C Model Metastability Report ;
---------------------------------------------
No synchronizer chains to report.


+---------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup Summary                                                                      ;
+--------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                          ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; -1.668 ; -128.358      ;
; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; -0.123 ; -1.939        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 3.101  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 6.500  ; 0.000         ;
+--------------------------------------------------------------------------------+--------+---------------+


+---------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold Summary                                                                       ;
+--------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                          ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------------------+--------+---------------+
; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; -1.027 ; -76.896       ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.141  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.187  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.194  ; 0.000         ;
+--------------------------------------------------------------------------------+--------+---------------+


+--------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery Summary                                                                  ;
+--------------------------------------------------------------------------------+-------+---------------+
; Clock                                                                          ; Slack ; End Point TNS ;
+--------------------------------------------------------------------------------+-------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.429 ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 9.788 ; 0.000         ;
+--------------------------------------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal Summary                                                                   ;
+--------------------------------------------------------------------------------+-------+---------------+
; Clock                                                                          ; Slack ; End Point TNS ;
+--------------------------------------------------------------------------------+-------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.692 ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.960 ; 0.000         ;
+--------------------------------------------------------------------------------+-------+---------------+


+---------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width Summary                                                        ;
+--------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                          ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 4.147  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.602  ; 0.000         ;
; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; 10.161 ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.208 ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0]  ; 17.440 ; 0.000         ;
; FPGA_CLK                                                                       ; 99.418 ; 0.000         ;
+--------------------------------------------------------------------------------+--------+---------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                ;
+--------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                                                                                                                          ; To Node                                                                                                                                                                                            ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+--------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; -1.668 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RxPID[0]                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPIDInSTB_reg1[0]        ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.246     ; 0.452      ;
; -1.596 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[15]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[15]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.058     ; 0.568      ;
; -1.590 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|resumeIntInExtend[0]      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|resumeIntInSTB[2]         ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.247     ; 0.373      ;
; -1.586 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[8]                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[8]       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.073     ; 0.543      ;
; -1.580 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[10]                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[10]    ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.057     ; 0.553      ;
; -1.579 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[10]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[10]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.058     ; 0.551      ;
; -1.572 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[5]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[5]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.057     ; 0.545      ;
; -1.563 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[0]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[0]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.057     ; 0.536      ;
; -1.561 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[8]                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[8]       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.047     ; 0.544      ;
; -1.529 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[12]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[12]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.073     ; 0.486      ;
; -1.516 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[13]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[13]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.058     ; 0.488      ;
; -1.514 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[9]                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[9]       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.073     ; 0.471      ;
; -1.513 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[11]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[11]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.073     ; 0.470      ;
; -1.509 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[0]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[0]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.070     ; 0.469      ;
; -1.506 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[9]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[9]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.057     ; 0.479      ;
; -1.503 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[14]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[14]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.058     ; 0.475      ;
; -1.502 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[10]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[10]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.047     ; 0.485      ;
; -1.500 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[4]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[4]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.057     ; 0.473      ;
; -1.500 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[6]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[6]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.070     ; 0.460      ;
; -1.499 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RxPID[3]                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPIDInSTB_reg1[3]        ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.058     ; 0.471      ;
; -1.499 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[4]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[4]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.070     ; 0.459      ;
; -1.497 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[3]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[3]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.067     ; 0.460      ;
; -1.497 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIEReceiver:u_SIEReceiver|connectState[0] ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connectStateInSTB_reg1[0] ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.047     ; 0.480      ;
; -1.495 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RxPID[2]                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPIDInSTB_reg1[2]        ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.058     ; 0.467      ;
; -1.495 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RxPID[1]                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPIDInSTB_reg1[1]        ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.058     ; 0.467      ;
; -1.494 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[0]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[0]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.067     ; 0.457      ;
; -1.493 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[2]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[2]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.051     ; 0.472      ;
; -1.492 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[8]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[8]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.057     ; 0.465      ;
; -1.489 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RxPID[3]                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPIDInSTB_reg1[3]        ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.051     ; 0.468      ;
; -1.488 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[1]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[1]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.057     ; 0.461      ;
; -1.485 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[11]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[11]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.047     ; 0.468      ;
; -1.481 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|resumeIntInExtend[0]      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|resumeIntInSTB[2]         ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.051     ; 0.460      ;
; -1.480 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RxPID[2]                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPIDInSTB_reg1[2]        ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.051     ; 0.459      ;
; -1.478 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RxPID[0]                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPIDInSTB_reg1[0]        ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.051     ; 0.457      ;
; -1.472 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[8]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[8]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.041     ; 0.461      ;
; -1.470 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSentInExtend[0]        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSentInSTB[2]           ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.051     ; 0.449      ;
; -1.434 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[4]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[4]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.067     ; 0.397      ;
; -1.434 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|bitStuffError                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[1]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.077     ; 0.387      ;
; -1.433 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[5]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[5]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.070     ; 0.393      ;
; -1.431 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RXTimeOut                               ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[3]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.077     ; 0.384      ;
; -1.431 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIEReceiver:u_SIEReceiver|connectState[1] ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connectStateInSTB_reg1[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.074     ; 0.387      ;
; -1.431 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|CRCError                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[0]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.077     ; 0.384      ;
; -1.429 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIEReceiver:u_SIEReceiver|connectState[1] ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connectStateInSTB_reg1[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.073     ; 0.386      ;
; -1.428 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[6]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[6]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.067     ; 0.391      ;
; -1.428 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIEReceiver:u_SIEReceiver|connectState[0] ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connectStateInSTB_reg1[0] ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.073     ; 0.385      ;
; -1.426 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[2]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[2]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.070     ; 0.386      ;
; -1.426 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[3]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[3]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.070     ; 0.386      ;
; -1.426 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[9]                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[9]       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.057     ; 0.399      ;
; -1.425 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[1]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[1]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.070     ; 0.385      ;
; -1.425 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RXOverflow                              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[2]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.067     ; 0.388      ;
; -1.424 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|bitStuffError                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[1]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.067     ; 0.387      ;
; -1.422 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|dataSequence                            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[7]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.077     ; 0.375      ;
; -1.421 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[1]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[1]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.067     ; 0.384      ;
; -1.421 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[2]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[2]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.067     ; 0.384      ;
; -1.421 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RXTimeOut                               ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[3]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.067     ; 0.384      ;
; -1.421 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|NAKRxed                                 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[4]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.067     ; 0.384      ;
; -1.421 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|stallRxed                               ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[5]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.067     ; 0.384      ;
; -1.421 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[5]                                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[5]                                  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.067     ; 0.384      ;
; -1.421 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|CRCError                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[0]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.067     ; 0.384      ;
; -1.419 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RXOverflow                              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[2]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.064     ; 0.385      ;
; -1.418 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|NAKRxed                                 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[4]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.064     ; 0.384      ;
; -1.418 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|stallRxed                               ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[5]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.064     ; 0.384      ;
; -1.417 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connEventInExtend[0]      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connEventInSTB[2]         ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.074     ; 0.373      ;
; -1.416 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|clrTransReqExtend[0]      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|clrTransReqSTB[2]         ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.074     ; 0.372      ;
; -1.416 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSentInExtend[0]        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSentInSTB[2]           ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.074     ; 0.372      ;
; -1.415 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[14]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[14]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.057     ; 0.388      ;
; -1.414 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[15]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[15]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.057     ; 0.387      ;
; -1.413 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[3]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[3]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.057     ; 0.386      ;
; -1.413 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[7]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[7]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.057     ; 0.386      ;
; -1.413 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[6]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[6]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.057     ; 0.386      ;
; -1.412 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[12]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[12]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.057     ; 0.385      ;
; -1.412 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[13]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[13]      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.057     ; 0.385      ;
; -1.412 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|ACKRxed                                 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[6]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.067     ; 0.375      ;
; -1.411 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[2]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[2]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.057     ; 0.384      ;
; -1.409 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|dataSequence                            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[7]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.067     ; 0.372      ;
; -1.409 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|ACKRxed                                 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPktStatusInSTB_reg1[6]  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.064     ; 0.375      ;
; -1.408 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RxPID[1]                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|RxPIDInSTB_reg1[1]        ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.065     ; 0.373      ;
; -1.407 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[6]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[6]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.051     ; 0.386      ;
; -1.407 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[10]                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[10]    ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.051     ; 0.386      ;
; -1.406 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[4]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[4]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.051     ; 0.385      ;
; -1.406 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[5]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[5]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.051     ; 0.385      ;
; -1.406 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[0]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[0]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.051     ; 0.385      ;
; -1.402 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|clrTransReqExtend[0]      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|clrTransReqSTB[2]         ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.058     ; 0.374      ;
; -1.400 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connEventInExtend[0]      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connEventInSTB[2]         ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.058     ; 0.372      ;
; -1.399 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[9]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[9]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.041     ; 0.388      ;
; -1.398 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[7]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[7]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.041     ; 0.387      ;
; -1.396 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[3]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[3]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.041     ; 0.385      ;
; -1.395 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|sendPacket:u_sendPacket|frameNum[1]                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[1]     ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.193        ; -1.041     ; 0.384      ;
; 7.209  ; sdram_request_complete_reg                                                                                                                                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|pokey_noise_filter:pokey_noise_filter1|out_reg                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.097     ; 4.321      ;
; 7.342  ; sdram_request_complete_reg                                                                                                                                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[1]                                                                                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.087     ; 4.198      ;
; 7.391  ; sdram_request_complete_reg                                                                                                                                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|pot0_reg[3]                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.096     ; 4.140      ;
; 7.391  ; sdram_request_complete_reg                                                                                                                                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|pot0_reg[2]                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.096     ; 4.140      ;
; 7.396  ; sdram_request_complete_reg                                                                                                                                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[2]                                                                                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.087     ; 4.144      ;
; 7.408  ; sdram_request_complete_reg                                                                                                                                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|pot0_reg[4]                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.096     ; 4.123      ;
; 7.408  ; sdram_request_complete_reg                                                                                                                                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|pot0_reg[5]                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.096     ; 4.123      ;
; 7.410  ; sdram_request_complete_reg                                                                                                                                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_noise_filter:pokey_noise_filter1|out_reg                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.096     ; 4.121      ;
; 7.414  ; sdram_request_complete_reg                                                                                                                                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[4]                                                                                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.087     ; 4.126      ;
; 7.414  ; sdram_request_complete_reg                                                                                                                                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_noise_filter:pokey_noise_filter0|out_reg                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.096     ; 4.117      ;
; 7.418  ; sdram_request_complete_reg                                                                                                                                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[6]                                                                                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.087     ; 4.122      ;
; 7.441  ; sdram_request_complete_reg                                                                                                                                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|highpass1_reg                                                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.097     ; 4.089      ;
+--------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: 'usb_pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                          ;
+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                                                                                                                                       ; To Node                                                                                                                                                                                                         ; Launch Clock                                                                   ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; -0.123 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[4]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[4]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.763      ;
; -0.119 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[1]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[1]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.759      ;
; -0.114 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[5]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[5]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.605      ; 0.747      ;
; -0.111 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[4]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[4]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.605      ; 0.744      ;
; -0.109 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[2]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[2]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.605      ; 0.742      ;
; -0.100 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[6]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[6]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.605      ; 0.733      ;
; -0.098 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[2]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[2]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.611      ; 0.737      ;
; -0.098 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[0]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineState_reg1[0]                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.738      ;
; -0.081 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[0]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[0]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.617      ; 0.726      ;
; -0.071 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[1]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[1]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.605      ; 0.704      ;
; -0.060 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[0]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[0]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.605      ; 0.693      ;
; -0.042 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[3]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[3]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.611      ; 0.681      ;
; -0.040 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[2]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[2]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.611      ; 0.679      ;
; -0.039 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[5]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[5]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.679      ;
; -0.038 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[2]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[2]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.604      ; 0.670      ;
; -0.038 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[2]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[2]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.678      ;
; -0.036 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|RxfifoBI:u_RxfifoBI|forceEmptyToggle                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|RxfifoBI:u_RxfifoBI|forceEmptyToggleSyncToUsbClk[0]                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.604      ; 0.668      ;
; -0.035 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[3]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[3]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.605      ; 0.668      ;
; -0.033 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|preambleEnSTB                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|preambleEn_reg1                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.605      ; 0.666      ;
; -0.033 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|isoEnSTB                               ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|isoEn_reg1                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.605      ; 0.666      ;
; -0.031 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSyncSTB                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSync_reg1                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.605      ; 0.664      ;
; -0.028 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[3]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[3]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.668      ;
; -0.027 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[3]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[3]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.611      ; 0.666      ;
; -0.027 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxSOFEnableRegSTB                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxSOFEnableReg_reg1                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.611      ; 0.666      ;
; -0.026 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[5]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[5]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.611      ; 0.665      ;
; -0.024 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[4]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[4]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.604      ; 0.656      ;
; -0.023 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[3]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[3]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.663      ;
; -0.023 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeRegSTB[0]                   ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeReg_reg1[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.663      ;
; -0.022 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[6]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[6]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.604      ; 0.654      ;
; -0.020 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSyncSTB                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSync_reg1                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.611      ; 0.659      ;
; -0.019 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[2]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[2]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.659      ;
; -0.019 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[3]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[3]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.605      ; 0.652      ;
; -0.018 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[4]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[4]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.611      ; 0.657      ;
; -0.018 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[2]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|LineDirectControlEn_reg1               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.605      ; 0.651      ;
; -0.017 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[1]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[1]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.657      ;
; -0.016 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[6]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[6]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.656      ;
; -0.016 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[0]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[0]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.656      ;
; -0.015 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[1]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[1]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.611      ; 0.654      ;
; -0.015 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[0]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[0]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.611      ; 0.654      ;
; -0.011 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[3]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[3]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.604      ; 0.643      ;
; -0.011 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[6]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[6]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.604      ; 0.643      ;
; -0.010 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[0]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[0]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.650      ;
; -0.010 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeRegSTB[1]                   ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeReg_reg1[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.650      ;
; -0.009 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|transReqSTB                            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|transReq_reg1                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.649      ;
; -0.009 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[4]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[4]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.604      ; 0.641      ;
; -0.009 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[2]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[2]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.605      ; 0.642      ;
; -0.008 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[6]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[6]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.611      ; 0.647      ;
; -0.007 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[5]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[5]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.604      ; 0.639      ;
; -0.006 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeRegSTB[1]                   ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeReg_reg1[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.605      ; 0.639      ;
; -0.006 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[0]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[0]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.604      ; 0.638      ;
; -0.006 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[1]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[1]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.604      ; 0.638      ;
; -0.005 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|preambleEnSTB                          ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|preambleEn_reg1                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.611      ; 0.644      ;
; -0.005 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[1]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineState_reg1[1]                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.605      ; 0.638      ;
; -0.003 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeRegSTB[0]                   ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeReg_reg1[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.605      ; 0.636      ;
; -0.001 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[3]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|fullSpeedPol_reg1                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.605      ; 0.634      ;
; -0.001 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[2]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[2]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.641      ;
; 0.000  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[5]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[5]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.604      ; 0.632      ;
; 0.000  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|hostSlaveMuxBI:u_hostSlaveMuxBI|rstShift[0]                                                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|hostSlaveMuxBI:u_hostSlaveMuxBI|rstSyncToUsbClkFirst                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.640      ;
; 0.001  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxSOFEnableRegSTB                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxSOFEnableReg_reg1                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.639      ;
; 0.001  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[3]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|fullSpeedPol_reg1                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.639      ;
; 0.002  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[1]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineState_reg1[1]                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.638      ;
; 0.003  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[4]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|fullSpeedRate_reg1                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.605      ; 0.630      ;
; 0.003  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[6]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[6]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.637      ;
; 0.004  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|isoEnSTB                               ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|isoEn_reg1                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.611      ; 0.635      ;
; 0.004  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggle                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggleSyncToUsbClk[0]                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.606      ; 0.630      ;
; 0.006  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[4]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|fullSpeedRate_reg1                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.634      ;
; 0.006  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[0]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineState_reg1[0]                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.634      ;
; 0.006  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[0]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[0]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.634      ;
; 0.007  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[0]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[0]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.633      ;
; 0.010  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[2]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|LineDirectControlEn_reg1               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.630      ;
; 0.010  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[5]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[5]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.630      ;
; 0.011  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[1]                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[1]                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.629      ;
; 0.011  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[4]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[4]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.629      ;
; 0.015  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|hostSlaveMuxBI:u_hostSlaveMuxBI|rstShift[0]                                                                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|hostSlaveMuxBI:u_hostSlaveMuxBI|rstSyncToUsbClkFirst                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.625      ;
; 0.018  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[3]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[3]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.622      ;
; 0.019  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|transReqSTB                            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|transReq_reg1                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.621      ;
; 0.020  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggle                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggleSyncToUsbClk[0]                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.620      ;
; 0.022  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|RxfifoBI:u_RxfifoBI|forceEmptyToggle                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|RxfifoBI:u_RxfifoBI|forceEmptyToggleSyncToUsbClk[0]                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.618      ;
; 0.038  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[1]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[1]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.604      ; 0.594      ;
; 0.046  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[1]                                                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[1]                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.201        ; 0.612      ; 0.594      ;
; 16.369 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[1]                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.101                              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.223     ; 4.228      ;
; 16.379 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[0]                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.101                              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.223     ; 4.218      ;
; 16.510 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|HCTxPortWEn                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.101101 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.036     ; 4.274      ;
; 16.510 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|HCTxPortWEn                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.011011 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.036     ; 4.274      ;
; 16.510 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|HCTxPortWEn                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.011100 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.036     ; 4.274      ;
; 16.510 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|HCTxPortWEn                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.101000 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.036     ; 4.274      ;
; 16.522 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[1]                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.011                              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.223     ; 4.075      ;
; 16.526 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.100101 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.101101 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.039     ; 4.255      ;
; 16.526 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.100101 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.011011 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.039     ; 4.255      ;
; 16.526 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.100101 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.011100 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.039     ; 4.255      ;
; 16.526 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.100101 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.101000 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.039     ; 4.255      ;
; 16.532 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[0]                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.011                              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.223     ; 4.065      ;
; 16.540 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[1]                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.001                              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.223     ; 4.057      ;
; 16.544 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[1]                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.110                              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.223     ; 4.053      ;
; 16.550 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[0]                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.001                              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.223     ; 4.047      ;
; 16.554 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[0]                                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFTransmit:u_SOFTransmit|CurrState_SOFTx.110                              ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.223     ; 4.043      ;
; 16.598 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|HCTxPortArbiter:u_HCTxPortArbiter|muxCntl.10                               ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.101101 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.038     ; 4.184      ;
; 16.598 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|HCTxPortArbiter:u_HCTxPortArbiter|muxCntl.10                               ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.011011 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.038     ; 4.184      ;
; 16.598 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|HCTxPortArbiter:u_HCTxPortArbiter|muxCntl.10                               ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.011100 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.038     ; 4.184      ;
; 16.598 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|HCTxPortArbiter:u_HCTxPortArbiter|muxCntl.10                               ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|SIETransmitter:u_SIETransmitter|CurrState_SIETx.101000 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 20.833       ; -0.038     ; 4.184      ;
+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                          ;
+-------+-------------------------+----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node               ; To Node                                                  ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------+----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 3.101 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.134     ; 2.524      ;
; 3.136 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.136     ; 2.487      ;
; 3.160 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.134     ; 2.465      ;
; 3.161 ; SDRAM_ADDR[15]          ; sdram_ctrl:sdram_controller|r_sdram_addr[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.130     ; 2.468      ;
; 3.198 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.136     ; 2.425      ;
; 3.273 ; SDRAM_ADDR[17]          ; sdram_ctrl:sdram_controller|r_sdram_addr[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.126     ; 2.360      ;
; 3.321 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.134     ; 2.304      ;
; 3.361 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.127     ; 2.271      ;
; 3.372 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.137     ; 2.250      ;
; 3.383 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.134     ; 2.242      ;
; 3.420 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.127     ; 2.212      ;
; 3.424 ; SDRAM_ADDR[5]           ; sdram_ctrl:sdram_controller|r_sdram_addr[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.130     ; 2.205      ;
; 3.434 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.137     ; 2.188      ;
; 3.511 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.127     ; 2.121      ;
; 3.538 ; SDRAM_ADDR[6]           ; sdram_ctrl:sdram_controller|r_sdram_addr[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.130     ; 2.091      ;
; 3.550 ; SDRAM_ADDR[18]          ; sdram_ctrl:sdram_controller|r_sdram_addr[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.129     ; 2.080      ;
; 3.568 ; SDRAM_ADDR[3]           ; sdram_ctrl:sdram_controller|r_sdram_addr[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.120     ; 2.071      ;
; 3.570 ; SDRAM_ADDR[14]          ; sdram_ctrl:sdram_controller|r_sdram_addr[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.118     ; 2.071      ;
; 3.570 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.127     ; 2.062      ;
; 3.578 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.135     ; 2.046      ;
; 3.586 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[11]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.135     ; 2.038      ;
; 3.637 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_ras_n                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.128     ; 1.994      ;
; 3.640 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.135     ; 1.984      ;
; 3.648 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[11]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.135     ; 1.976      ;
; 3.674 ; SDRAM_ADDR[16]          ; sdram_ctrl:sdram_controller|r_sdram_addr[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.124     ; 1.961      ;
; 3.693 ; SDRAM_ADDR[20]          ; sdram_ctrl:sdram_controller|r_sdram_addr[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.127     ; 1.939      ;
; 3.699 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_ras_n                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.128     ; 1.932      ;
; 3.722 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.137     ; 1.900      ;
; 3.747 ; SDRAM_ADDR[22]          ; sdram_ctrl:sdram_controller|r_sdram_addr[11]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.126     ; 1.886      ;
; 3.778 ; SDRAM_ADDR[13]          ; sdram_ctrl:sdram_controller|r_sdram_addr[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.123     ; 1.858      ;
; 3.784 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.137     ; 1.838      ;
; 3.805 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[10]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.130     ; 1.824      ;
; 3.811 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.130     ; 1.818      ;
; 3.814 ; SDRAM_READ_ENABLE       ; ram_do_reg[27]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.131     ; 1.862      ;
; 3.814 ; SDRAM_READ_ENABLE       ; ram_do_reg[24]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.131     ; 1.862      ;
; 3.814 ; SDRAM_READ_ENABLE       ; ram_do_reg[19]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.131     ; 1.862      ;
; 3.814 ; SDRAM_READ_ENABLE       ; ram_do_reg[16]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.131     ; 1.862      ;
; 3.814 ; SDRAM_READ_ENABLE       ; ram_do_reg[17]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.131     ; 1.862      ;
; 3.814 ; SDRAM_READ_ENABLE       ; ram_do_reg[23]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.131     ; 1.862      ;
; 3.814 ; SDRAM_READ_ENABLE       ; ram_do_reg[31]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.131     ; 1.862      ;
; 3.814 ; SDRAM_READ_ENABLE       ; ram_do_reg[25]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.131     ; 1.862      ;
; 3.820 ; SDRAM_ADDR[8]           ; sdram_ctrl:sdram_controller|r_sdram_addr[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.131     ; 1.808      ;
; 3.828 ; SDRAM_ADDR[7]           ; sdram_ctrl:sdram_controller|r_sdram_addr[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.132     ; 1.799      ;
; 3.837 ; SDRAM_ADDR[19]          ; sdram_ctrl:sdram_controller|r_sdram_addr[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.129     ; 1.793      ;
; 3.867 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[10]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.130     ; 1.762      ;
; 3.873 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.130     ; 1.756      ;
; 3.885 ; SDRAM_ADDR[4]           ; sdram_ctrl:sdram_controller|r_sdram_addr[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.116     ; 1.758      ;
; 3.887 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[14]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.114     ; 1.806      ;
; 3.888 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[5]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.114     ; 1.805      ;
; 3.888 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[8]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.114     ; 1.805      ;
; 3.941 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.130     ; 1.688      ;
; 3.969 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[10]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.114     ; 1.724      ;
; 3.969 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[13]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.114     ; 1.724      ;
; 3.970 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[0]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.114     ; 1.723      ;
; 3.970 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[1]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.114     ; 1.723      ;
; 3.970 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[6]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.114     ; 1.723      ;
; 3.970 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[9]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.114     ; 1.723      ;
; 3.971 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[2]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.114     ; 1.722      ;
; 3.977 ; SDRAM_READ_ENABLE       ; ram_do_reg[28]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.132     ; 1.698      ;
; 3.977 ; SDRAM_READ_ENABLE       ; ram_do_reg[26]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.132     ; 1.698      ;
; 3.977 ; SDRAM_READ_ENABLE       ; ram_do_reg[30]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.132     ; 1.698      ;
; 3.977 ; SDRAM_READ_ENABLE       ; ram_do_reg[20]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.132     ; 1.698      ;
; 3.977 ; SDRAM_READ_ENABLE       ; ram_do_reg[18]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.132     ; 1.698      ;
; 3.977 ; SDRAM_READ_ENABLE       ; ram_do_reg[22]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.132     ; 1.698      ;
; 4.003 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_addr[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.130     ; 1.626      ;
; 4.041 ; SDRAM_ADDR[2]           ; sdram_ctrl:sdram_controller|r_sdram_addr[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.121     ; 1.597      ;
; 4.062 ; SDRAM_READ_ENABLE       ; ram_do_reg[3]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.136     ; 1.609      ;
; 4.062 ; SDRAM_READ_ENABLE       ; ram_do_reg[2]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.136     ; 1.609      ;
; 4.063 ; SDRAM_READ_ENABLE       ; ram_do_reg[29]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.118     ; 1.626      ;
; 4.072 ; SDRAM_READ_ENABLE       ; ram_do_reg[21]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.138     ; 1.597      ;
; 4.072 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_ba[0]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.130     ; 1.557      ;
; 4.072 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_ba[1]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.130     ; 1.557      ;
; 4.074 ; SDRAM_READ_ENABLE       ; ram_do_reg[1]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.131     ; 1.602      ;
; 4.074 ; SDRAM_READ_ENABLE       ; ram_do_reg[0]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.131     ; 1.602      ;
; 4.074 ; SDRAM_READ_ENABLE       ; ram_do_reg[7]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.131     ; 1.602      ;
; 4.074 ; SDRAM_READ_ENABLE       ; ram_do_reg[11]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.131     ; 1.602      ;
; 4.074 ; SDRAM_READ_ENABLE       ; ram_do_reg[15]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.131     ; 1.602      ;
; 4.074 ; SDRAM_READ_ENABLE       ; ram_do_reg[8]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.131     ; 1.602      ;
; 4.074 ; SDRAM_READ_ENABLE       ; ram_do_reg[9]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.131     ; 1.602      ;
; 4.078 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[7]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.117     ; 1.612      ;
; 4.084 ; SDRAM_READ_ENABLE       ; ram_do_reg[4]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.132     ; 1.591      ;
; 4.084 ; SDRAM_READ_ENABLE       ; ram_do_reg[5]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.132     ; 1.591      ;
; 4.084 ; SDRAM_READ_ENABLE       ; ram_do_reg[6]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.132     ; 1.591      ;
; 4.084 ; SDRAM_READ_ENABLE       ; ram_do_reg[12]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.132     ; 1.591      ;
; 4.084 ; SDRAM_READ_ENABLE       ; ram_do_reg[13]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.132     ; 1.591      ;
; 4.084 ; SDRAM_READ_ENABLE       ; ram_do_reg[14]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.132     ; 1.591      ;
; 4.084 ; SDRAM_READ_ENABLE       ; ram_do_reg[10]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.132     ; 1.591      ;
; 4.089 ; SDRAM_ADDR[11]          ; sdram_ctrl:sdram_controller|r_sdram_addr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.122     ; 1.548      ;
; 4.091 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[3]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.117     ; 1.599      ;
; 4.091 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[11]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.117     ; 1.599      ;
; 4.092 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[4]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.117     ; 1.598      ;
; 4.092 ; SDRAM_ADDR[21]          ; sdram_ctrl:sdram_controller|r_sdram_addr[10]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.122     ; 1.545      ;
; 4.112 ; SDRAM_WIDTH_8BIT_ACCESS ; ram_di_reg[7]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.109     ; 1.586      ;
; 4.114 ; SDRAM_WIDTH_8BIT_ACCESS ; ram_di_reg[3]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.109     ; 1.584      ;
; 4.114 ; SDRAM_WIDTH_8BIT_ACCESS ; ram_di_reg[11]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.109     ; 1.584      ;
; 4.115 ; SDRAM_WIDTH_8BIT_ACCESS ; ram_di_reg[4]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.109     ; 1.583      ;
; 4.117 ; SDRAM_READ_ENABLE       ; sdram_ctrl:sdram_controller|r_sdram_addr[0]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.120     ; 1.570      ;
; 4.130 ; SDRAM_WRITE_ENABLE      ; ram_di_reg[12]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.117     ; 1.560      ;
; 4.131 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_ba[0]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.130     ; 1.498      ;
; 4.131 ; SDRAM_WRITE_ENABLE      ; sdram_ctrl:sdram_controller|r_sdram_ba[1]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.820        ; -0.130     ; 1.498      ;
+-------+-------------------------+----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                                                           ;
+-------+-------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node               ; To Node                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 6.500 ; svideo_yout_dly2[5]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 2.129      ;
; 6.501 ; svideo_yout_dly2[6]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 2.128      ;
; 6.502 ; svideo_yout_dly2[5]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 2.127      ;
; 6.503 ; svideo_yout_dly2[6]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 2.126      ;
; 6.534 ; svideo_yout_dly2[5]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 2.095      ;
; 6.535 ; svideo_yout_dly2[6]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 2.094      ;
; 6.597 ; svideo_yout_dly2[5]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 2.032      ;
; 6.598 ; svideo_yout_dly2[6]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 2.031      ;
; 6.626 ; svideo_yout_dly2[7]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 2.003      ;
; 6.628 ; svideo_yout_dly2[7]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 2.001      ;
; 6.642 ; svideo_yout_dly2[5]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.042     ; 1.985      ;
; 6.643 ; svideo_yout_dly2[6]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.042     ; 1.984      ;
; 6.645 ; svideo_yout_dly2[4]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.984      ;
; 6.647 ; svideo_yout_dly2[4]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.982      ;
; 6.660 ; svideo_yout_dly2[7]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.969      ;
; 6.669 ; svideo_yout_dly2[5]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.039     ; 1.961      ;
; 6.675 ; svideo_yout_dly2[6]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.039     ; 1.955      ;
; 6.679 ; svideo_yout_dly2[4]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.950      ;
; 6.700 ; svideo_yout_dly2[5]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.929      ;
; 6.701 ; svideo_yout_dly2[6]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.928      ;
; 6.723 ; svideo_yout_dly2[7]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.906      ;
; 6.742 ; svideo_yout_dly2[4]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.887      ;
; 6.746 ; svideo_yout_dly2[2]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.883      ;
; 6.748 ; svideo_yout_dly2[2]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.881      ;
; 6.767 ; svideo_yout_dly2[3]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.862      ;
; 6.768 ; svideo_yout_dly2[7]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.042     ; 1.859      ;
; 6.769 ; svideo_yout_dly2[3]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.860      ;
; 6.780 ; svideo_yout_dly2[2]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.849      ;
; 6.781 ; svideo_yout_dly2[5]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.042     ; 1.846      ;
; 6.782 ; svideo_yout_dly2[6]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.042     ; 1.845      ;
; 6.787 ; svideo_yout_dly2[4]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.042     ; 1.840      ;
; 6.788 ; svideo_yout_dly2[1]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.841      ;
; 6.792 ; svideo_yout_dly2[1]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.837      ;
; 6.801 ; svideo_yout_dly2[3]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.828      ;
; 6.815 ; svideo_yout_dly2[7]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.039     ; 1.815      ;
; 6.823 ; svideo_yout_dly2[1]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.806      ;
; 6.824 ; svideo_yout_dly2[4]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.039     ; 1.806      ;
; 6.826 ; svideo_yout_dly2[7]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.803      ;
; 6.843 ; svideo_yout_dly2[2]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.786      ;
; 6.845 ; svideo_yout_dly2[4]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.784      ;
; 6.864 ; svideo_yout_dly2[3]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.765      ;
; 6.888 ; svideo_yout_dly2[2]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.042     ; 1.739      ;
; 6.893 ; svideo_yout_dly2[1]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.736      ;
; 6.907 ; svideo_yout_dly2[7]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.042     ; 1.720      ;
; 6.909 ; svideo_yout_dly2[3]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.042     ; 1.718      ;
; 6.920 ; svideo_yout_dly2[0]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.709      ;
; 6.922 ; svideo_yout_dly2[0]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.707      ;
; 6.926 ; svideo_yout_dly2[4]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.042     ; 1.701      ;
; 6.931 ; svideo_yout_dly2[1]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.042     ; 1.696      ;
; 6.935 ; svideo_yout_dly2[2]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.039     ; 1.695      ;
; 6.938 ; svideo_yout_dly2[3]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.039     ; 1.692      ;
; 6.946 ; svideo_yout_dly2[2]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.683      ;
; 6.954 ; svideo_yout_dly2[0]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.675      ;
; 6.955 ; svideo_yout_dly2[1]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.039     ; 1.675      ;
; 6.967 ; svideo_yout_dly2[3]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.662      ;
; 7.005 ; svideo_yout_dly2[1]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.624      ;
; 7.017 ; svideo_yout_dly2[0]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.612      ;
; 7.027 ; svideo_yout_dly2[2]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.042     ; 1.600      ;
; 7.048 ; svideo_yout_dly2[3]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.042     ; 1.579      ;
; 7.062 ; svideo_yout_dly2[0]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.042     ; 1.565      ;
; 7.076 ; svideo_yout_dly2[1]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.042     ; 1.551      ;
; 7.109 ; svideo_yout_dly2[0]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.039     ; 1.521      ;
; 7.120 ; svideo_yout_dly2[0]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.509      ;
; 7.183 ; svideo:svideo|luma[0]   ; luma_saturated[9]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.094     ; 1.440      ;
; 7.186 ; svideo:svideo|luma[0]   ; luma_saturated[1]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.095     ; 1.436      ;
; 7.201 ; svideo_yout_dly2[0]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.042     ; 1.426      ;
; 7.228 ; svideo:svideo|luma[5]   ; luma_saturated[9]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.098     ; 1.391      ;
; 7.247 ; svideo:svideo|luma[0]   ; luma_saturated[8]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.094     ; 1.376      ;
; 7.251 ; svideo:svideo|luma[0]   ; luma_saturated[7]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.094     ; 1.372      ;
; 7.292 ; svideo:svideo|luma[5]   ; luma_saturated[8]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.098     ; 1.327      ;
; 7.296 ; svideo:svideo|luma[5]   ; luma_saturated[7]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.098     ; 1.323      ;
; 7.311 ; svideo:svideo|luma[8]   ; luma_saturated[9]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.094     ; 1.312      ;
; 7.315 ; svideo:svideo|luma[0]   ; luma_saturated[6]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.094     ; 1.308      ;
; 7.319 ; svideo:svideo|luma[0]   ; luma_saturated[5]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.094     ; 1.304      ;
; 7.339 ; svideo:svideo|chroma[1] ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.095     ; 1.283      ;
; 7.343 ; svideo:svideo|chroma[1] ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.095     ; 1.279      ;
; 7.354 ; cvbs1_out[4]            ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.041     ; 1.274      ;
; 7.360 ; svideo:svideo|luma[5]   ; luma_saturated[6]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.098     ; 1.259      ;
; 7.366 ; svideo:svideo|luma[4]   ; luma_saturated[9]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.098     ; 1.253      ;
; 7.379 ; svideo:svideo|luma_2[1] ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.034     ; 1.304      ;
; 7.383 ; svideo:svideo|luma[0]   ; luma_saturated[4]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.094     ; 1.240      ;
; 7.383 ; svideo:svideo|luma_2[1] ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.034     ; 1.300      ;
; 7.387 ; svideo:svideo|luma[0]   ; luma_saturated[3]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.094     ; 1.236      ;
; 7.398 ; svideo:svideo|luma[2]   ; luma_saturated[9]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.094     ; 1.225      ;
; 7.407 ; svideo:svideo|chroma[1] ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.095     ; 1.215      ;
; 7.411 ; svideo:svideo|chroma[1] ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.095     ; 1.211      ;
; 7.415 ; svideo:svideo|chroma[0] ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.095     ; 1.207      ;
; 7.430 ; svideo:svideo|luma[4]   ; luma_saturated[8]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.098     ; 1.189      ;
; 7.433 ; svideo:svideo|chroma[0] ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.095     ; 1.189      ;
; 7.434 ; svideo:svideo|luma[4]   ; luma_saturated[7]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.098     ; 1.185      ;
; 7.447 ; svideo:svideo|luma_2[1] ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.034     ; 1.236      ;
; 7.451 ; svideo:svideo|luma[0]   ; luma_saturated[2]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.094     ; 1.172      ;
; 7.451 ; svideo:svideo|chroma[2] ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.095     ; 1.171      ;
; 7.451 ; svideo:svideo|luma_2[1] ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.034     ; 1.232      ;
; 7.459 ; svideo:svideo|chroma[2] ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.095     ; 1.163      ;
; 7.460 ; cvbs1_out[9]            ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.169      ;
; 7.462 ; svideo:svideo|luma[2]   ; luma_saturated[8]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.094     ; 1.161      ;
; 7.464 ; cvbs1_out[8]            ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.043     ; 1.162      ;
; 7.466 ; svideo:svideo|luma[2]   ; luma_saturated[7]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.094     ; 1.157      ;
; 7.472 ; svideo:svideo|chroma[3] ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.095     ; 1.150      ;
+-------+-------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: 'usb_pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                        ;
+--------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                                                                                                                                   ; To Node                                                                                                                                                                                                                                          ; Launch Clock                                                                   ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+--------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; -1.027 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|RxfifoBI:u_RxfifoBI|forceEmptyToggle                                                 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|RxfifoBI:u_RxfifoBI|forceEmptyToggleSyncToUsbClk[0]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.481      ;
; -1.025 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggle                                                 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggleSyncToUsbClk[0]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.483      ;
; -1.022 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|hostSlaveMuxBI:u_hostSlaveMuxBI|rstShift[0]                                                            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|hostSlaveMuxBI:u_hostSlaveMuxBI|rstSyncToUsbClkFirst                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.486      ;
; -1.021 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[4]                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[4]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.487      ;
; -1.018 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[5]                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[5]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.490      ;
; -1.012 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[5]                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[5]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.240      ; 0.490      ;
; -1.012 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|hostSlaveMuxBI:u_hostSlaveMuxBI|rstShift[0]                                                            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|hostSlaveMuxBI:u_hostSlaveMuxBI|rstSyncToUsbClkFirst                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.496      ;
; -1.007 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[1]                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[1]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.501      ;
; -1.006 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[0]                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[0]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.240      ; 0.496      ;
; -1.003 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|transReqSTB                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|transReq_reg1                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.505      ;
; -1.002 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[1]                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[1]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.240      ; 0.500      ;
; -1.002 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[0]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[0]                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.506      ;
; -1.001 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[1]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[1]                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.507      ;
; -1.000 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[4]                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[4]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.240      ; 0.502      ;
; -0.997 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[4]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[4]                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.511      ;
; -0.989 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[3]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[3]                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.519      ;
; -0.988 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[5]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[5]                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.520      ;
; -0.986 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[0]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[0]                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.522      ;
; -0.985 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSyncSTB                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSync_reg1                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.240      ; 0.517      ;
; -0.983 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|preambleEnSTB                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|preambleEn_reg1                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.240      ; 0.519      ;
; -0.982 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|isoEnSTB                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|isoEn_reg1                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.240      ; 0.520      ;
; -0.978 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[1]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[1]                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.530      ;
; -0.976 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|RxfifoBI:u_RxfifoBI|forceEmptyToggle                                                 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|RxfifoBI:u_RxfifoBI|forceEmptyToggleSyncToUsbClk[0]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.239      ; 0.525      ;
; -0.975 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[2]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[2]                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.533      ;
; -0.974 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[1]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[1]                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.534      ;
; -0.973 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[3]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[3]                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.535      ;
; -0.973 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeRegSTB[0]               ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeReg_reg1[0]                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.535      ;
; -0.969 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[2]                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|LineDirectControlEn_reg1                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.539      ;
; -0.968 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|isoEnSTB                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|isoEn_reg1                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.540      ;
; -0.968 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[0]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[0]                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.540      ;
; -0.968 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[0]                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[0]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.540      ;
; -0.966 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[1]                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineState_reg1[1]                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.542      ;
; -0.966 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[0]                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineState_reg1[0]                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.542      ;
; -0.966 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[4]                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|fullSpeedRate_reg1                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.239      ; 0.535      ;
; -0.965 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[4]                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|fullSpeedRate_reg1                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.543      ;
; -0.964 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[3]                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|fullSpeedPol_reg1                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.544      ;
; -0.964 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggle                                                 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggleSyncToUsbClk[0]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.240      ; 0.538      ;
; -0.964 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[3]                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|fullSpeedPol_reg1                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.239      ; 0.537      ;
; -0.961 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxSOFEnableRegSTB                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxSOFEnableReg_reg1                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.547      ;
; -0.960 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeRegSTB[1]               ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeReg_reg1[1]                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.548      ;
; -0.959 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[1]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[1]                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.240      ; 0.543      ;
; -0.959 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[5]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[5]                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.240      ; 0.543      ;
; -0.957 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeRegSTB[0]               ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeReg_reg1[0]                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.239      ; 0.544      ;
; -0.957 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|preambleEnSTB                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|preambleEn_reg1                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.551      ;
; -0.957 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[3]                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[3]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.551      ;
; -0.956 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[2]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[2]                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.240      ; 0.546      ;
; -0.956 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[6]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[6]                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.240      ; 0.546      ;
; -0.955 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[0]                                                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[0]                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.553      ;
; -0.953 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[6]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[6]                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.555      ;
; -0.952 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[1]                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineState_reg1[1]                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.239      ; 0.549      ;
; -0.951 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeRegSTB[1]               ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxTransTypeReg_reg1[1]                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.239      ; 0.550      ;
; -0.951 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[6]                                                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[6]                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.557      ;
; -0.950 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|transReqSTB                        ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|transReq_reg1                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.558      ;
; -0.950 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[6]                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[6]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.558      ;
; -0.945 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSyncSTB                         ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSync_reg1                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.563      ;
; -0.945 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[4]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[4]                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.240      ; 0.557      ;
; -0.944 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[3]                                                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[3]                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.564      ;
; -0.944 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPRegSTB[3]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg_reg1[3]                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.240      ; 0.558      ;
; -0.942 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxSOFEnableRegSTB                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxSOFEnableReg_reg1                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.247      ; 0.567      ;
; -0.942 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[2]                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[2]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.566      ;
; -0.941 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[2]                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|LineDirectControlEn_reg1                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.239      ; 0.560      ;
; -0.940 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[3]                                                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[3]                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.241      ; 0.563      ;
; -0.939 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[2]                                                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[2]                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.569      ;
; -0.937 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[3]                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[3]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.240      ; 0.565      ;
; -0.934 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[5]                                                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[5]                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.574      ;
; -0.934 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[2]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[2]                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.247      ; 0.575      ;
; -0.931 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[3]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[3]                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.247      ; 0.578      ;
; -0.927 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[6]                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[6]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.240      ; 0.575      ;
; -0.922 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndex[2]                                                     ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[2]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.240      ; 0.580      ;
; -0.920 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[6]                                                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[6]                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.241      ; 0.583      ;
; -0.916 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[0]                                                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[0]                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.241      ; 0.587      ;
; -0.916 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[2]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[2]                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.592      ;
; -0.915 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineControlReg[0]                ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineState_reg1[0]                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.593      ;
; -0.910 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[1]                                                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[1]                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.241      ; 0.593      ;
; -0.908 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[4]                                                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[4]                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.241      ; 0.595      ;
; -0.907 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[2]                                                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[2]                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.241      ; 0.596      ;
; -0.906 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[5]                                                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[5]                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.241      ; 0.597      ;
; -0.901 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[4]                                                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[4]                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.607      ;
; -0.901 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndex[1]                                                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferInIndexSyncToRdClk[1]                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.246      ; 0.607      ;
; -0.900 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrRegSTB[0]                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[0]                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.008        ; 1.252      ; 0.614      ;
; 0.167  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RXFifoData[1]                                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|altsyncram:buffer_rtl_0|altsyncram_6tc1:auto_generated|ram_block1a0~porta_datain_reg0  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.217      ; 0.488      ;
; 0.169  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RXFifoData[2]                                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|altsyncram:buffer_rtl_0|altsyncram_6tc1:auto_generated|ram_block1a0~porta_datain_reg0  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.217      ; 0.490      ;
; 0.170  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RXFifoData[3]                                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|altsyncram:buffer_rtl_0|altsyncram_6tc1:auto_generated|ram_block1a0~porta_datain_reg0  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.217      ; 0.491      ;
; 0.171  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RXFifoData[4]                                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|altsyncram:buffer_rtl_0|altsyncram_6tc1:auto_generated|ram_block1a0~porta_datain_reg0  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.217      ; 0.492      ;
; 0.172  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RXFifoData[0]                                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|altsyncram:buffer_rtl_0|altsyncram_6tc1:auto_generated|ram_block1a0~porta_datain_reg0  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.217      ; 0.493      ;
; 0.176  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RXFifoData[5]                                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|altsyncram:buffer_rtl_0|altsyncram_6tc1:auto_generated|ram_block1a0~porta_datain_reg0  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.217      ; 0.497      ;
; 0.181  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RXFifoData[6]                                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|altsyncram:buffer_rtl_0|altsyncram_6tc1:auto_generated|ram_block1a0~porta_datain_reg0  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.217      ; 0.502      ;
; 0.183  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RXFifoData[7]                                    ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|altsyncram:buffer_rtl_0|altsyncram_6tc1:auto_generated|ram_block1a0~porta_datain_reg0  ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.217      ; 0.504      ;
; 0.184  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[2]                                                      ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|altsyncram:buffer_rtl_0|altsyncram_6tc1:auto_generated|ram_block1a0~porta_address_reg0 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.221      ; 0.509      ;
; 0.187  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxBit:u_processRxBit|CurrState_prRxBit.0000 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxBit:u_processRxBit|CurrState_prRxBit.0000                                      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxBit:u_processRxBit|CurrState_prRxBit.1100 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxBit:u_processRxBit|CurrState_prRxBit.1100                                      ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxBit:u_processRxBit|RXByte[7]              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxBit:u_processRxBit|RXByte[7]                                                   ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxBit:u_processRxBit|RXByte[6]              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxBit:u_processRxBit|RXByte[6]                                                   ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxBit:u_processRxBit|RXByte[5]              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxBit:u_processRxBit|RXByte[5]                                                   ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxBit:u_processRxBit|RXByte[4]              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxBit:u_processRxBit|RXByte[4]                                                   ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxBit:u_processRxBit|RXByte[3]              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxBit:u_processRxBit|RXByte[3]                                                   ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxBit:u_processRxBit|RXByte[2]              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxBit:u_processRxBit|RXByte[2]                                                   ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxBit:u_processRxBit|RXByte[1]              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxBit:u_processRxBit|RXByte[1]                                                   ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxBit:u_processRxBit|RxCtrlOut[1]           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxBit:u_processRxBit|RxCtrlOut[1]                                                ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxByte:u_processRxByte|RxCtrl[1]            ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbSerialInterfaceEngine:u_usbSerialInterfaceEngine|processRxByte:u_processRxByte|RxCtrl[1]                                                 ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
+--------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                                                       ; To Node                                                                                                                                                                                                                                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.141 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizep1_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.469      ;
; 0.145 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.474      ;
; 0.145 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[5]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.470      ;
; 0.149 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.474      ;
; 0.151 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizep2_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.479      ;
; 0.151 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.476      ;
; 0.152 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.481      ;
; 0.154 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.479      ;
; 0.154 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.479      ;
; 0.155 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.484      ;
; 0.155 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.480      ;
; 0.156 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.485      ;
; 0.156 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.485      ;
; 0.157 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.486      ;
; 0.157 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.486      ;
; 0.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|cntr_pqf:cntr1|counter_reg_bit[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~portb_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.485      ;
; 0.159 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|cntr_pqf:cntr1|counter_reg_bit[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.484      ;
; 0.162 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~portb_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.489      ;
; 0.163 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.488      ;
; 0.163 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.488      ;
; 0.164 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~portb_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.491      ;
; 0.165 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.490      ;
; 0.165 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizep2_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.493      ;
; 0.173 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~portb_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.500      ;
; 0.174 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.499      ;
; 0.177 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|cntr_4pf:cntr1|counter_reg_bit[0]    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~portb_address_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.501      ;
; 0.178 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|cntr_4pf:cntr1|counter_reg_bit[0]    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_address_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.218      ; 0.500      ;
; 0.179 ; ram_do_reg[14]                                                                                                                                                                                                  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[14]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.097      ; 0.380      ;
; 0.180 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSentInt                             ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFSentInt                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.043      ; 0.307      ;
; 0.180 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connEventInt                           ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|connEventInt                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.043      ; 0.307      ;
; 0.180 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|resumeInt                              ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|resumeInt                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.043      ; 0.307      ;
; 0.182 ; svideo:svideo|ampl_V[7]                                                                                                                                                                                         ; svideo:svideo|sin_cos:tab_inst|sin_rom:sin_inst|altsyncram:altsyncram_component|altsyncram_r842:auto_generated|ram_block1a0~portb_address_reg0                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.217      ; 0.503      ;
; 0.184 ; ram_do_reg[8]                                                                                                                                                                                                   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[8]                                                                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.096      ; 0.384      ;
; 0.184 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|cntr_pqf:cntr1|counter_reg_bit[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~portb_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.511      ;
; 0.184 ; svideo:svideo|ampl_V[6]                                                                                                                                                                                         ; svideo:svideo|sin_cos:tab_inst|sin_rom:sin_inst|altsyncram:altsyncram_component|altsyncram_r842:auto_generated|ram_block1a0~portb_address_reg0                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.218      ; 0.506      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|cntr_pqf:cntr1|counter_reg_bit[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.510      ;
; 0.185 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[0]                  ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB[0]                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.044      ; 0.313      ;
; 0.186 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB_reg1[10]                 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|frameNumInSTB[10]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.043      ; 0.313      ;
; 0.186 ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB_reg1[10]                   ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|SOFTimerSTB[10]                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.044      ; 0.314      ;
; 0.187 ; ram_do_reg[13]                                                                                                                                                                                                  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[13]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.097      ; 0.388      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_load2                                                                                                                                            ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_load2                                                                                                                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|insn.dec_insn_fetch                                                                                                                                       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|insn.dec_insn_fetch                                                                                                                                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[10]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[10]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[11]                                                                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[11]                                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_store_sp2                                                                                                                                        ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_store_sp2                                                                                                                                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|idim_r                                                                                                                                                    ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|idim_r                                                                                                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; enable_divider:enable_179_clock_div_zpu_pokey|count_reg[1]                                                                                                                                                      ; enable_divider:enable_179_clock_div_zpu_pokey|count_reg[1]                                                                                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; enable_divider:enable_179_clock_div_zpu_pokey|count_reg[2]                                                                                                                                                      ; enable_divider:enable_179_clock_div_zpu_pokey|count_reg[2]                                                                                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; enable_divider:enable_179_clock_div_zpu_pokey|count_reg[3]                                                                                                                                                      ; enable_divider:enable_179_clock_div_zpu_pokey|count_reg[3]                                                                                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|skctl_reg[0]                                                                                                                             ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|skctl_reg[0]                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[1]                                                                                                                    ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[1]                                                                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[2]                                                                                                                    ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[2]                                                                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[3]                                                                                                                    ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[3]                                                                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|spi_speed_reg[7]                                                                                                                                                        ; zpucore:zpu|zpu_config_regs:config_regs|spi_speed_reg[7]                                                                                                                                                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[18]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[18]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[27]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[27]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[7]                                                                                                                                                                 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[7]                                                                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[9]                                                                                                                                                                 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[9]                                                                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[26]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[26]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[28]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[28]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[369]                                                                                                                                                                 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[369]                                                                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[126]                                                                                                                                                                 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[126]                                                                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|first_line_of_instruction_reg                                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|first_line_of_instruction_reg                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serial_out_reg                                                                                                                           ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serial_out_reg                                                                                                                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0]                                                                    ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0]                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[0]                                                                    ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[0]                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|twotone_reg                                                                                                                              ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|twotone_reg                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; paddle_mode_reg                                                                                                                                                                                                 ; paddle_mode_reg                                                                                                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[62]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[62]                                                                                                                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[118]                                                                                                                                                                 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[118]                                                                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[273]                                                                                                                                                                 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[273]                                                                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[69]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[69]                                                                                                                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[77]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[77]                                                                                                                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[119]                                                                                                                                                                 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[119]                                                                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|trig_reg[1]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|trig_reg[1]                                                                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|trig_reg[3]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|trig_reg[3]                                                                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|trig_reg[0]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|trig_reg[0]                                                                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[11]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[11]                                                                                                                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[2]                                                                                                                             ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[2]                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[6]                                                                                                                             ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[6]                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[5]                                                                                                                             ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[5]                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                                                                    ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[2]                                                                                                                             ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[2]                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[3]                                                                                                                             ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[3]                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[4]                                                                                                                             ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[4]                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[7]                                                                                                                             ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[7]                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[5]                                                                                                                             ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[5]                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[6]                                                                                                                             ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[6]                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0]                                                                    ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0]                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[11]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[11]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[7]                                                                                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[7]                                                                                                                                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[372]                                                                                                                                                                 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[372]                                                                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[0]                                                                                                                    ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[0]                                                                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[120]                                                                                                                                                                 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[120]                                                                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[370]                                                                                                                                                                 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[370]                                                                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_add_sp2                                                                                                                                          ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_add_sp2                                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|irqst_reg[0]                                                                                                                             ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|irqst_reg[0]                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_popped                                                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_popped                                                                                                                                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[19]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[19]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                              ;
+-------+-----------------------------------------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                 ; To Node                                                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.187 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_ctrl:sdram_controller|r_refr_act                    ; sdram_ctrl:sdram_controller|r_refr_act                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_ctrl:sdram_controller|r_rd_act                      ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_ctrl:sdram_controller|r_sdram_addr[2]~_Duplicate_1  ; sdram_ctrl:sdram_controller|r_sdram_addr[2]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_ctrl:sdram_controller|r_sdram_addr[3]~_Duplicate_1  ; sdram_ctrl:sdram_controller|r_sdram_addr[3]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_ctrl:sdram_controller|r_sdram_addr[4]~_Duplicate_1  ; sdram_ctrl:sdram_controller|r_sdram_addr[4]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.188 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sdram_ctrl:sdram_controller|sdram_rdy                     ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sdram_request_reg                                         ; sdram_request_reg                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sdram_ctrl:sdram_controller|r_wr_act                      ; sdram_ctrl:sdram_controller|r_wr_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sdram_ctrl:sdram_controller|r_sdram_addr[6]~_Duplicate_1  ; sdram_ctrl:sdram_controller|r_sdram_addr[6]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sdram_ctrl:sdram_controller|r_sdram_addr[7]~_Duplicate_1  ; sdram_ctrl:sdram_controller|r_sdram_addr[7]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.194 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.213 ; seq_reg[0]                                                ; seq_reg[1]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.333      ;
; 0.256 ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.375      ;
; 0.259 ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.379      ;
; 0.262 ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.382      ;
; 0.276 ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ; sdram_ctrl:sdram_controller|r_wr_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.395      ;
; 0.279 ; seq_reg[5]                                                ; seq_reg[6]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.399      ;
; 0.281 ; seq_reg[8]                                                ; seq_reg[9]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.401      ;
; 0.283 ; seq_reg[4]                                                ; seq_reg[5]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.403      ;
; 0.283 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.402      ;
; 0.287 ; seq_reg[7]                                                ; seq_reg[8]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.407      ;
; 0.293 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.413      ;
; 0.293 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.413      ;
; 0.293 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.413      ;
; 0.294 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.414      ;
; 0.294 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.414      ;
; 0.295 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.415      ;
; 0.295 ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.415      ;
; 0.296 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.416      ;
; 0.299 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.419      ;
; 0.300 ; seq_reg[3]                                                ; seq_reg[4]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.420      ;
; 0.304 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.424      ;
; 0.309 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.428      ;
; 0.311 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.430      ;
; 0.318 ; sdram_ctrl:sdram_controller|r_rd_act                      ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.438      ;
; 0.326 ; seq_reg[11]                                               ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.445      ;
; 0.326 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.445      ;
; 0.327 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.446      ;
; 0.333 ; sdram_request_complete_reg                                ; sdram_request_reg                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.452      ;
; 0.334 ; seq_reg[11]                                               ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.453      ;
; 0.341 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.460      ;
; 0.344 ; seq_reg[9]                                                ; seq_reg[10]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.464      ;
; 0.374 ; seq_reg[1]                                                ; seq_reg[2]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.032      ; 0.490      ;
; 0.381 ; seq_reg[6]                                                ; seq_reg[7]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.501      ;
; 0.390 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.509      ;
; 0.392 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.511      ;
; 0.401 ; seq_reg[11]                                               ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.521      ;
; 0.411 ; sdram_ctrl:sdram_controller|r_wr_act                      ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.530      ;
; 0.422 ; sdram_ctrl:sdram_controller|r_sdram_addr[1]~_Duplicate_1  ; sdram_ctrl:sdram_controller|r_sdram_addr[1]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.542      ;
; 0.441 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.561      ;
; 0.442 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.562      ;
; 0.442 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.562      ;
; 0.442 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.562      ;
; 0.443 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.563      ;
; 0.445 ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.564      ;
; 0.447 ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.566      ;
; 0.447 ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.566      ;
; 0.452 ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.571      ;
; 0.452 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.572      ;
; 0.452 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.572      ;
; 0.453 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.573      ;
; 0.454 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.574      ;
; 0.455 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.575      ;
; 0.455 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.575      ;
; 0.456 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.576      ;
; 0.456 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.576      ;
; 0.457 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.577      ;
; 0.459 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.579      ;
; 0.464 ; sdram_ctrl:sdram_controller|r_sdram_addr[11]~_Duplicate_1 ; sdram_ctrl:sdram_controller|r_sdram_addr[11]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.584      ;
; 0.491 ; sdram_ctrl:sdram_controller|r_sdram_addr[0]~_Duplicate_1  ; sdram_ctrl:sdram_controller|r_sdram_addr[0]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.611      ;
; 0.505 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.625      ;
; 0.505 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.625      ;
; 0.505 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.625      ;
; 0.508 ; sdram_ctrl:sdram_controller|r_psel[0]                     ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.630      ;
; 0.508 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.628      ;
; 0.508 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.628      ;
; 0.508 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.628      ;
; 0.518 ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ; sdram_request_complete_reg                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.637      ;
; 0.518 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.638      ;
; 0.519 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.639      ;
; 0.520 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.640      ;
; 0.521 ; seq_reg[2]                                                ; seq_reg[3]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.040      ; 0.645      ;
; 0.521 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.641      ;
; 0.522 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.641      ;
; 0.522 ; seq_reg[1]                                                ; sdram_ctrl:sdram_controller|r_wr_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.031      ; 0.637      ;
; 0.522 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.642      ;
; 0.522 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.642      ;
; 0.523 ; sdram_ctrl:sdram_controller|r_rd_reg                      ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; -0.151     ; 0.456      ;
; 0.523 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.643      ;
; 0.524 ; sdram_ctrl:sdram_controller|r_sdram_addr[8]~_Duplicate_1  ; sdram_ctrl:sdram_controller|r_sdram_addr[8]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.644      ;
; 0.525 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.645      ;
; 0.526 ; seq_reg[11]                                               ; sdram_ctrl:sdram_controller|r_psel[0]                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.645      ;
; 0.528 ; sdram_ctrl:sdram_controller|r_rd_act                      ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.034      ; 0.646      ;
; 0.530 ; sdram_ctrl:sdram_controller|r_sdram_addr[9]~_Duplicate_1  ; sdram_ctrl:sdram_controller|r_sdram_addr[9]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.650      ;
+-------+-----------------------------------------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                                                              ;
+-------+---------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                 ; To Node                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.194 ; svideo:svideo|luma_1[7]   ; svideo:svideo|luma_2[7]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.313      ;
; 0.195 ; svideo:svideo|luma_1[4]   ; svideo:svideo|luma_2[4]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.314      ;
; 0.195 ; svideo:svideo|luma_1[8]   ; svideo:svideo|luma_2[8]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.314      ;
; 0.195 ; svideo_yout_dly1[4]       ; svideo_yout_dly2[4]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.314      ;
; 0.195 ; svideo_yout_dly1[1]       ; svideo_yout_dly2[1]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.314      ;
; 0.196 ; svideo:svideo|luma_1[9]   ; svideo:svideo|luma_2[9]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.315      ;
; 0.196 ; svideo_yout_dly1[5]       ; svideo_yout_dly2[5]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.315      ;
; 0.198 ; svideo_yout_dly1[3]       ; svideo_yout_dly2[3]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.317      ;
; 0.204 ; svideo:svideo|luma[6]     ; svideo:svideo|luma_1[6]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.084      ; 0.392      ;
; 0.218 ; svideo:svideo|luma[1]     ; svideo:svideo|luma_1[1]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.084      ; 0.406      ;
; 0.235 ; svideo:svideo|luma[6]     ; luma_saturated[6]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.084      ; 0.423      ;
; 0.258 ; luma_saturated[9]         ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.034      ; 0.376      ;
; 0.267 ; svideo:svideo|luma_1[2]   ; svideo:svideo|luma_2[2]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.386      ;
; 0.267 ; svideo:svideo|luma_1[5]   ; svideo:svideo|luma_2[5]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.386      ;
; 0.268 ; svideo:svideo|luma_1[0]   ; svideo:svideo|luma_2[0]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.387      ;
; 0.268 ; svideo:svideo|luma_1[1]   ; svideo:svideo|luma_2[1]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.387      ;
; 0.268 ; svideo:svideo|luma_1[3]   ; svideo:svideo|luma_2[3]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.387      ;
; 0.268 ; svideo:svideo|luma_1[6]   ; svideo:svideo|luma_2[6]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.387      ;
; 0.269 ; svideo_yout_dly1[7]       ; svideo_yout_dly2[7]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.388      ;
; 0.270 ; svideo_yout_dly1[2]       ; svideo_yout_dly2[2]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.389      ;
; 0.270 ; svideo_yout_dly1[6]       ; svideo_yout_dly2[6]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.389      ;
; 0.271 ; svideo_yout_dly1[0]       ; svideo_yout_dly2[0]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.390      ;
; 0.296 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.415      ;
; 0.298 ; svideo:svideo|luma_2[5]   ; svideo:svideo|luma_acc[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.417      ;
; 0.298 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.417      ;
; 0.303 ; svideo:svideo|luma[9]     ; luma_saturated[9]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.086      ; 0.493      ;
; 0.304 ; svideo:svideo|luma_2[0]   ; svideo:svideo|luma_acc[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.423      ;
; 0.306 ; svideo:svideo|luma[9]     ; svideo:svideo|luma_1[9]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.086      ; 0.496      ;
; 0.363 ; luma_saturated[3]         ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.034      ; 0.481      ;
; 0.364 ; luma_saturated[2]         ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.034      ; 0.482      ;
; 0.364 ; svideo:svideo|luma_2[7]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.484      ;
; 0.364 ; svideo:svideo|luma_acc[2] ; svideo_yout_dly1[0]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.032      ; 0.480      ;
; 0.364 ; svideo:svideo|luma_acc[8] ; svideo_yout_dly1[6]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.032      ; 0.480      ;
; 0.370 ; svideo:svideo|luma[2]     ; svideo:svideo|luma_1[2]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.085      ; 0.559      ;
; 0.372 ; svideo:svideo|luma_acc[9] ; svideo_yout_dly1[7]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.032      ; 0.488      ;
; 0.373 ; svideo:svideo|luma[7]     ; svideo:svideo|luma_1[7]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.086      ; 0.563      ;
; 0.376 ; luma_saturated[8]         ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.034      ; 0.494      ;
; 0.378 ; luma_saturated[6]         ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.034      ; 0.496      ;
; 0.378 ; luma_saturated[4]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.034      ; 0.496      ;
; 0.382 ; svideo:svideo|luma_acc[6] ; svideo_yout_dly1[4]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.032      ; 0.498      ;
; 0.383 ; svideo:svideo|luma[6]     ; luma_saturated[7]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.084      ; 0.571      ;
; 0.384 ; svideo:svideo|luma_acc[3] ; svideo_yout_dly1[1]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.032      ; 0.500      ;
; 0.385 ; svideo:svideo|luma_acc[4] ; svideo_yout_dly1[2]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.032      ; 0.501      ;
; 0.385 ; svideo:svideo|luma_acc[7] ; svideo_yout_dly1[5]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.032      ; 0.501      ;
; 0.385 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.504      ;
; 0.388 ; svideo:svideo|luma_acc[5] ; svideo_yout_dly1[3]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.032      ; 0.504      ;
; 0.391 ; svideo:svideo|chroma[3]   ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.086      ; 0.581      ;
; 0.397 ; svideo:svideo|chroma[4]   ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.086      ; 0.587      ;
; 0.398 ; svideo:svideo|luma[2]     ; luma_saturated[2]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.086      ; 0.588      ;
; 0.398 ; svideo:svideo|chroma[5]   ; cvbs1_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.086      ; 0.588      ;
; 0.398 ; svideo:svideo|luma[1]     ; luma_saturated[2]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.084      ; 0.586      ;
; 0.399 ; svideo:svideo|luma[3]     ; svideo:svideo|luma_1[3]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.085      ; 0.588      ;
; 0.401 ; svideo:svideo|luma[1]     ; luma_saturated[3]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.084      ; 0.589      ;
; 0.403 ; svideo:svideo|chroma[7]   ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.086      ; 0.593      ;
; 0.406 ; svideo:svideo|chroma[6]   ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.086      ; 0.596      ;
; 0.406 ; svideo:svideo|luma[7]     ; luma_saturated[7]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.086      ; 0.596      ;
; 0.408 ; svideo:svideo|luma_2[9]   ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.528      ;
; 0.413 ; svideo:svideo|chroma[8]   ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.086      ; 0.603      ;
; 0.413 ; svideo:svideo|luma[3]     ; luma_saturated[3]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.086      ; 0.603      ;
; 0.414 ; svideo:svideo|chroma[8]   ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.086      ; 0.604      ;
; 0.436 ; svideo:svideo|luma[4]     ; svideo:svideo|luma_1[4]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.083      ; 0.623      ;
; 0.437 ; svideo:svideo|chroma[2]   ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.086      ; 0.627      ;
; 0.444 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.563      ;
; 0.446 ; svideo:svideo|luma[6]     ; luma_saturated[8]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.084      ; 0.634      ;
; 0.447 ; svideo:svideo|luma_2[5]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.566      ;
; 0.449 ; svideo:svideo|luma[6]     ; luma_saturated[9]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.084      ; 0.637      ;
; 0.455 ; svideo:svideo|luma_2[3]   ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.037      ; 0.576      ;
; 0.456 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.575      ;
; 0.457 ; svideo:svideo|luma_2[0]   ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.576      ;
; 0.459 ; luma_saturated[0]         ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.578      ;
; 0.459 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.578      ;
; 0.460 ; svideo:svideo|luma_2[0]   ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.579      ;
; 0.464 ; svideo:svideo|luma[1]     ; luma_saturated[4]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.084      ; 0.652      ;
; 0.467 ; svideo:svideo|luma[1]     ; luma_saturated[5]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.084      ; 0.655      ;
; 0.472 ; svideo:svideo|luma[4]     ; luma_saturated[4]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.082      ; 0.658      ;
; 0.472 ; luma_saturated[7]         ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.034      ; 0.590      ;
; 0.488 ; luma_saturated[5]         ; cvbs1_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.034      ; 0.606      ;
; 0.503 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.623      ;
; 0.506 ; svideo:svideo|luma_2[8]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.626      ;
; 0.507 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.626      ;
; 0.510 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.629      ;
; 0.510 ; svideo:svideo|luma_2[5]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.629      ;
; 0.511 ; luma_saturated[3]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.034      ; 0.629      ;
; 0.513 ; luma_saturated[1]         ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.632      ;
; 0.513 ; svideo:svideo|luma_2[7]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.633      ;
; 0.513 ; svideo:svideo|luma_2[5]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.632      ;
; 0.518 ; svideo:svideo|luma[5]     ; svideo:svideo|luma_1[5]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.083      ; 0.705      ;
; 0.522 ; luma_saturated[0]         ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.641      ;
; 0.522 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.641      ;
; 0.523 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.037      ; 0.644      ;
; 0.523 ; svideo:svideo|luma_2[0]   ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.642      ;
; 0.523 ; luma_saturated[2]         ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.034      ; 0.641      ;
; 0.525 ; luma_saturated[0]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.644      ;
; 0.525 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.644      ;
; 0.526 ; svideo:svideo|luma_2[0]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.645      ;
; 0.526 ; luma_saturated[2]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.034      ; 0.644      ;
; 0.529 ; svideo:svideo|luma[8]     ; svideo:svideo|luma_1[8]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.087      ; 0.720      ;
; 0.529 ; svideo:svideo|luma_2[1]   ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.649      ;
; 0.530 ; svideo:svideo|luma[1]     ; luma_saturated[6]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.084      ; 0.718      ;
; 0.533 ; svideo:svideo|luma[1]     ; luma_saturated[7]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.084      ; 0.721      ;
+-------+---------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                          ;
+-------+---------------------------------------+-------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                             ; To Node                                                                                                                       ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------+-------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[5]                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.087     ; 3.111      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.089     ; 3.109      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[10]                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.089     ; 3.109      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[0]                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 3.110      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[1]                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 3.110      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[2]                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 3.110      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[3]                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 3.110      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[4]                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 3.110      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[5]                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 3.110      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[6]                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 3.110      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[7]                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 3.110      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[8]                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.086     ; 3.112      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[9]                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.086     ; 3.112      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[10]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.086     ; 3.112      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[11]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.086     ; 3.112      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[12]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.086     ; 3.112      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[13]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.086     ; 3.112      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[14]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.086     ; 3.112      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[15]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.086     ; 3.112      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_shift_reg[5]                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.084     ; 3.114      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|skctl_reg[0]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.086     ; 3.112      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|skctl_reg[1]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.086     ; 3.112      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|syncreset_enable_divider:enable_15_div|enabled_out_reg ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.086     ; 3.112      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[2]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.089     ; 3.109      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pot_counter_reg[0]                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.094     ; 3.104      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pot_counter_reg[1]                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.094     ; 3.104      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pot_counter_reg[2]                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.094     ; 3.104      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pot_counter_reg[3]                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.094     ; 3.104      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pot_counter_reg[4]                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.094     ; 3.104      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pot_counter_reg[5]                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.094     ; 3.104      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pot_counter_reg[6]                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.094     ; 3.104      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pot_counter_reg[7]                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.094     ; 3.104      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pot_reset_reg                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.094     ; 3.104      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[6]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.086     ; 3.112      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[1]                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.082     ; 3.116      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[2]                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.082     ; 3.116      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[3]                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.082     ; 3.116      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[28]                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.089     ; 3.109      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[26]                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.091     ; 3.107      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|state                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.087     ; 3.111      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_speed_reg[7]                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.087     ; 3.111      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[18]                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.089     ; 3.109      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addrend_reg[2]                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.086     ; 3.112      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[3]                                                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.086     ; 3.112      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[3]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.086     ; 3.112      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addrend_reg[3]                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.086     ; 3.112      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[0]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 3.105      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[1]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 3.105      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[2]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 3.105      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[3]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 3.105      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[4]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 3.105      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[5]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 3.105      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[6]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 3.105      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[7]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 3.105      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[8]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 3.105      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[9]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 3.105      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[10]                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 3.105      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[27]                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.089     ; 3.109      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[27]                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.089     ; 3.109      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[24]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.092     ; 3.106      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[24]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.092     ; 3.106      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[24]                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.090     ; 3.108      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[30]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.092     ; 3.106      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[30]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.092     ; 3.106      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[30]                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 3.105      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[5]                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.085     ; 3.113      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[7]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.086     ; 3.112      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[9]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.089     ; 3.109      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[10]                                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 3.110      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[11]                                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 3.110      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_reg                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.087     ; 3.111      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[26]                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.089     ; 3.109      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[1]                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.085     ; 3.113      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[0]                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.086     ; 3.112      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[26]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.092     ; 3.106      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out5_reg[19]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.086     ; 3.112      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[19]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.091     ; 3.107      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[19]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.091     ; 3.107      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[19]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 3.110      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[25]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.091     ; 3.107      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[0]                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.085     ; 3.113      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[3]                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.091     ; 3.107      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[12]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.091     ; 3.107      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[21]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 3.110      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[17]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 3.110      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serout_shift_reg[8]                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.083     ; 3.115      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serout_shift_reg[7]                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.083     ; 3.115      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serout_shift_reg[6]                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.083     ; 3.115      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serout_shift_reg[5]                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.083     ; 3.115      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serout_shift_reg[4]                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.083     ; 3.115      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serout_shift_reg[3]                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.083     ; 3.115      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serout_shift_reg[2]                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.083     ; 3.115      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serout_shift_reg[1]                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.083     ; 3.115      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serial_out_reg                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.084     ; 3.114      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|delay_line:stimer_delay|shift_reg[2]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.095     ; 3.103      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|delay_line:stimer_delay|shift_reg[1]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.085     ; 3.113      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|delay_line:stimer_delay|shift_reg[0]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.084     ; 3.114      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[0]    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.086     ; 3.112      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[1]    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.086     ; 3.112      ;
; 8.429 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[2]    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.086     ; 3.112      ;
+-------+---------------------------------------+-------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                        ;
+--------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node              ; To Node                                                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+--------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 9.788  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[7]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.142     ; 1.647      ;
; 9.818  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[7]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.105     ; 1.656      ;
; 9.818  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[8]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.105     ; 1.656      ;
; 9.819  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[4]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.102     ; 1.658      ;
; 9.819  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[6]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.104     ; 1.656      ;
; 9.820  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[5]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.102     ; 1.657      ;
; 9.820  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[9]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.103     ; 1.656      ;
; 9.820  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[11]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.103     ; 1.656      ;
; 9.822  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[8]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.119     ; 1.639      ;
; 9.823  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[9]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.125     ; 1.632      ;
; 9.824  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[8]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.173     ; 1.581      ;
; 9.825  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[9]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.179     ; 1.574      ;
; 9.826  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[13]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.120     ; 1.634      ;
; 9.826  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[14]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.120     ; 1.634      ;
; 9.826  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[15]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.120     ; 1.634      ;
; 9.828  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[13]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.174     ; 1.576      ;
; 9.828  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[14]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.174     ; 1.576      ;
; 9.828  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[15]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.174     ; 1.576      ;
; 9.828  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[10]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.120     ; 1.632      ;
; 9.828  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[11]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.120     ; 1.632      ;
; 9.828  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[12]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.120     ; 1.632      ;
; 9.830  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[12]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.174     ; 1.574      ;
; 9.830  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[10]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.174     ; 1.574      ;
; 9.830  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[11]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.174     ; 1.574      ;
; 9.832  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[4]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.123     ; 1.625      ;
; 9.832  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[5]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.109     ; 1.639      ;
; 9.832  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[6]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.108     ; 1.640      ;
; 9.832  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ba[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.098     ; 1.649      ;
; 9.832  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ba[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.098     ; 1.649      ;
; 9.832  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[0]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.098     ; 1.649      ;
; 9.832  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[1]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.098     ; 1.649      ;
; 9.832  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.098     ; 1.649      ;
; 9.833  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[7]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.096     ; 1.650      ;
; 9.833  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[2]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.095     ; 1.651      ;
; 9.833  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[3]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.095     ; 1.651      ;
; 9.834  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[4]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.177     ; 1.567      ;
; 9.834  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[5]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.163     ; 1.581      ;
; 9.834  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[6]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.162     ; 1.582      ;
; 9.837  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[0]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.111     ; 1.632      ;
; 9.837  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[1]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.111     ; 1.632      ;
; 9.837  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[2]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.111     ; 1.632      ;
; 9.837  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[3]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.113     ; 1.630      ;
; 9.839  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[0]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.165     ; 1.574      ;
; 9.839  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[3]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.167     ; 1.572      ;
; 9.839  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[1]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.165     ; 1.574      ;
; 9.839  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[2]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.165     ; 1.574      ;
; 9.855  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[6]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.084     ; 1.688      ;
; 9.855  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[7]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.084     ; 1.688      ;
; 9.929  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.102     ; 1.548      ;
; 9.943  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ras_n                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.096     ; 1.540      ;
; 9.943  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cas_n                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.096     ; 1.540      ;
; 9.943  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_we_n                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.096     ; 1.540      ;
; 9.943  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.096     ; 1.540      ;
; 9.943  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.096     ; 1.540      ;
; 10.055 ; sdram_reset_ctrl_n_reg ; seq_reg[0]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.081     ; 1.491      ;
; 10.055 ; sdram_reset_ctrl_n_reg ; seq_reg[1]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.081     ; 1.491      ;
; 10.055 ; sdram_reset_ctrl_n_reg ; seq_reg[3]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.081     ; 1.491      ;
; 10.055 ; sdram_reset_ctrl_n_reg ; seq_reg[4]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.081     ; 1.491      ;
; 10.055 ; sdram_reset_ctrl_n_reg ; seq_reg[5]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.081     ; 1.491      ;
; 10.055 ; sdram_reset_ctrl_n_reg ; seq_reg[6]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.081     ; 1.491      ;
; 10.055 ; sdram_reset_ctrl_n_reg ; seq_reg[7]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.081     ; 1.491      ;
; 10.055 ; sdram_reset_ctrl_n_reg ; seq_reg[8]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.081     ; 1.491      ;
; 10.055 ; sdram_reset_ctrl_n_reg ; seq_reg[9]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.081     ; 1.491      ;
; 10.055 ; sdram_reset_ctrl_n_reg ; seq_reg[10]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.081     ; 1.491      ;
; 10.055 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_req                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.082     ; 1.490      ;
; 10.055 ; sdram_reset_ctrl_n_reg ; ram_di_reg[0]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.082     ; 1.490      ;
; 10.055 ; sdram_reset_ctrl_n_reg ; ram_di_reg[1]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.082     ; 1.490      ;
; 10.055 ; sdram_reset_ctrl_n_reg ; ram_di_reg[2]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.082     ; 1.490      ;
; 10.055 ; sdram_reset_ctrl_n_reg ; ram_di_reg[5]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.082     ; 1.490      ;
; 10.055 ; sdram_reset_ctrl_n_reg ; ram_di_reg[6]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.082     ; 1.490      ;
; 10.055 ; sdram_reset_ctrl_n_reg ; ram_di_reg[8]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.082     ; 1.490      ;
; 10.055 ; sdram_reset_ctrl_n_reg ; ram_di_reg[9]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.082     ; 1.490      ;
; 10.055 ; sdram_reset_ctrl_n_reg ; ram_di_reg[10]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.082     ; 1.490      ;
; 10.055 ; sdram_reset_ctrl_n_reg ; ram_di_reg[13]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.082     ; 1.490      ;
; 10.055 ; sdram_reset_ctrl_n_reg ; ram_di_reg[14]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.082     ; 1.490      ;
; 10.056 ; sdram_reset_ctrl_n_reg ; ram_do_reg[29]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.086     ; 1.485      ;
; 10.056 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_act                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.083     ; 1.488      ;
; 10.056 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.084     ; 1.487      ;
; 10.056 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.084     ; 1.487      ;
; 10.056 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.084     ; 1.487      ;
; 10.056 ; sdram_reset_ctrl_n_reg ; ram_do_reg[21]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.106     ; 1.465      ;
; 10.056 ; sdram_reset_ctrl_n_reg ; ram_di_reg[3]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.085     ; 1.486      ;
; 10.056 ; sdram_reset_ctrl_n_reg ; ram_di_reg[4]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.085     ; 1.486      ;
; 10.056 ; sdram_reset_ctrl_n_reg ; ram_di_reg[7]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.085     ; 1.486      ;
; 10.056 ; sdram_reset_ctrl_n_reg ; ram_di_reg[11]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.085     ; 1.486      ;
; 10.056 ; sdram_reset_ctrl_n_reg ; ram_di_reg[12]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.085     ; 1.486      ;
; 10.056 ; sdram_reset_ctrl_n_reg ; ram_di_reg[15]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.085     ; 1.486      ;
; 10.056 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_oe                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.088     ; 1.483      ;
; 10.056 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[1]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.086     ; 1.485      ;
; 10.056 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[0]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.086     ; 1.485      ;
; 10.056 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[2]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.084     ; 1.487      ;
; 10.056 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[3]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.084     ; 1.487      ;
; 10.056 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[4]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.084     ; 1.487      ;
; 10.056 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[5]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.083     ; 1.488      ;
; 10.056 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[8]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.083     ; 1.488      ;
; 10.056 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[9]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.083     ; 1.488      ;
; 10.056 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[11]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.083     ; 1.488      ;
; 10.057 ; sdram_reset_ctrl_n_reg ; ram_do_reg[3]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.104     ; 1.466      ;
; 10.057 ; sdram_reset_ctrl_n_reg ; ram_do_reg[2]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.104     ; 1.466      ;
; 10.059 ; sdram_reset_ctrl_n_reg ; seq_reg[2]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.085     ; 1.483      ;
+--------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                           ; To Node                                                                                                                                                                                                                ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.692 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a5 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 0.986      ;
; 0.692 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a4 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 0.986      ;
; 0.692 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a3 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 0.986      ;
; 0.692 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a2 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 0.986      ;
; 0.692 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 0.986      ;
; 0.692 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 0.986      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a63  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a62  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a61  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a60  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a59  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a58  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a57  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a56  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a47  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a46  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a45  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a44  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a43  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a42  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a41  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a40  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a31  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a30  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a29  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a28  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a27  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a26  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a25  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a24  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a23  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a22  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a21  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a20  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a15  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a14  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a13  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a12  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a11  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a10  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a9   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.000      ;
; 0.710 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a55  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.000      ;
; 0.710 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a54  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.000      ;
; 0.710 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a53  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.000      ;
; 0.710 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a52  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.000      ;
; 0.710 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a51  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.000      ;
; 0.710 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a50  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.000      ;
; 0.710 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a49  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.000      ;
; 0.710 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a48  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.000      ;
; 0.710 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a39  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.000      ;
; 0.710 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a38  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.000      ;
; 0.710 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a37  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.000      ;
; 0.710 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a36  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.000      ;
; 0.710 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a35  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.000      ;
; 0.710 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a34  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.000      ;
; 0.710 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a33  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.000      ;
; 0.710 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a32  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.000      ;
; 0.710 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a19  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.000      ;
; 0.710 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a18  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.000      ;
; 0.710 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a17  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.000      ;
; 0.710 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a16  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.000      ;
; 0.710 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a7   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.000      ;
; 0.710 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a6   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.000      ;
; 0.710 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a5   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.000      ;
; 0.710 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a4   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.000      ;
; 0.710 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a3   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.000      ;
; 0.710 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a2   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.000      ;
; 0.710 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a1   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.000      ;
; 0.710 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.000      ;
; 0.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a6 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.210      ; 1.128      ;
; 0.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a5 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.210      ; 1.128      ;
; 0.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a4 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.210      ; 1.128      ;
; 0.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a3 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.210      ; 1.128      ;
; 0.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a2 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.210      ; 1.128      ;
; 0.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.210      ; 1.128      ;
; 0.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.210      ; 1.128      ;
; 0.964 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a15   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.214      ; 1.268      ;
; 0.964 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a14   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.214      ; 1.268      ;
; 0.964 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a13   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.214      ; 1.268      ;
; 0.964 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a12   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.214      ; 1.268      ;
; 0.964 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a11   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.214      ; 1.268      ;
; 0.964 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a10   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.214      ; 1.268      ;
; 0.964 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a9    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.214      ; 1.268      ;
; 0.964 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a8    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.214      ; 1.268      ;
; 0.964 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a7    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.214      ; 1.268      ;
; 0.964 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a6    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.214      ; 1.268      ;
; 0.964 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a5    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.214      ; 1.268      ;
; 0.964 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a4    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.214      ; 1.268      ;
; 0.964 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a3    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.214      ; 1.268      ;
; 0.964 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a2    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.214      ; 1.268      ;
; 0.964 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a1    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.214      ; 1.268      ;
; 0.964 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.214      ; 1.268      ;
; 2.415 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|antic_counter:antic_counter_memory_scan|value_reg[6]                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.040      ; 2.539      ;
; 2.415 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|antic_counter:antic_counter_memory_scan|value_reg[4]                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.040      ; 2.539      ;
; 2.415 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|pot_from_signed:pot3|count_reg[0]                                                                                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.041      ; 2.540      ;
; 2.415 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|pot_from_signed:pot3|count_reg[1]                                                                                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.041      ; 2.540      ;
; 2.415 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|pot_from_signed:pot3|count_reg[2]                                                                                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.041      ; 2.540      ;
; 2.415 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|pot_from_signed:pot3|count_reg[3]                                                                                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.041      ; 2.540      ;
; 2.415 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|pot_from_signed:pot3|count_reg[4]                                                                                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.041      ; 2.540      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                        ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node              ; To Node                                                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.960 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_reg                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.292      ; 1.356      ;
; 0.960 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_reg                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.292      ; 1.356      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; seq_reg[2]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.097      ; 1.353      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.097      ; 1.353      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.097      ; 1.353      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.097      ; 1.353      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.097      ; 1.353      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.097      ; 1.353      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.097      ; 1.353      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.097      ; 1.353      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.097      ; 1.353      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.097      ; 1.353      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.097      ; 1.353      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.094      ; 1.350      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; ram_do_reg[28]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 1.337      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; ram_do_reg[26]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 1.337      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; ram_do_reg[27]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.338      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; ram_do_reg[24]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.338      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; ram_do_reg[30]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 1.337      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; ram_do_reg[19]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.338      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; ram_do_reg[1]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.338      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; ram_do_reg[0]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.338      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; ram_do_reg[4]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 1.337      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; ram_do_reg[5]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 1.337      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; ram_do_reg[7]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.338      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; ram_do_reg[6]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 1.337      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; ram_do_reg[11]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.338      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; ram_do_reg[12]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 1.337      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; ram_do_reg[16]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.338      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; ram_do_reg[17]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.338      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; ram_do_reg[15]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.338      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; ram_do_reg[13]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 1.337      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; ram_do_reg[14]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 1.337      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; ram_do_reg[10]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 1.337      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; ram_do_reg[20]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 1.337      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; ram_do_reg[8]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.338      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; ram_do_reg[9]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.338      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; ram_do_reg[23]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.338      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; ram_do_reg[18]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 1.337      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; ram_do_reg[22]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 1.337      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; ram_do_reg[31]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.338      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; ram_do_reg[25]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.338      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[0]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.094      ; 1.350      ;
; 1.152 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[1]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.094      ; 1.350      ;
; 1.153 ; sdram_reset_ctrl_n_reg ; seq_reg[11]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.093      ; 1.350      ;
; 1.153 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.093      ; 1.350      ;
; 1.153 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.093      ; 1.350      ;
; 1.153 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.093      ; 1.350      ;
; 1.153 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.093      ; 1.350      ;
; 1.153 ; sdram_reset_ctrl_n_reg ; sdram_request_reg                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.096      ; 1.353      ;
; 1.153 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_act                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.099      ; 1.356      ;
; 1.153 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.096      ; 1.353      ;
; 1.153 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.096      ; 1.353      ;
; 1.153 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_psel[0]                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.093      ; 1.350      ;
; 1.153 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.096      ; 1.353      ;
; 1.153 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.096      ; 1.353      ;
; 1.153 ; sdram_reset_ctrl_n_reg ; sdram_request_complete_reg                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.096      ; 1.353      ;
; 1.153 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.093      ; 1.350      ;
; 1.153 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[5]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.099      ; 1.356      ;
; 1.153 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[8]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.099      ; 1.356      ;
; 1.153 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[9]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.099      ; 1.356      ;
; 1.153 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.093      ; 1.350      ;
; 1.153 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[11]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.099      ; 1.356      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; seq_reg[0]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.101      ; 1.359      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; seq_reg[1]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.101      ; 1.359      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; seq_reg[3]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.101      ; 1.359      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; seq_reg[4]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.101      ; 1.359      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; seq_reg[5]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.101      ; 1.359      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; seq_reg[6]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.101      ; 1.359      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; seq_reg[7]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.101      ; 1.359      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; seq_reg[8]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.101      ; 1.359      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; seq_reg[9]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.101      ; 1.359      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; seq_reg[10]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.101      ; 1.359      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; ram_do_reg[29]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.095      ; 1.353      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_req                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.100      ; 1.358      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.098      ; 1.356      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.098      ; 1.356      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.098      ; 1.356      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; ram_di_reg[0]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.100      ; 1.358      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; ram_di_reg[1]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.100      ; 1.358      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; ram_di_reg[2]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.100      ; 1.358      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; ram_di_reg[3]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.097      ; 1.355      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; ram_di_reg[4]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.097      ; 1.355      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; ram_di_reg[5]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.100      ; 1.358      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; ram_di_reg[6]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.100      ; 1.358      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; ram_di_reg[7]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.097      ; 1.355      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; ram_di_reg[8]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.100      ; 1.358      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; ram_di_reg[9]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.100      ; 1.358      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; ram_di_reg[10]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.100      ; 1.358      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; ram_di_reg[11]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.097      ; 1.355      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; ram_di_reg[12]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.097      ; 1.355      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; ram_di_reg[13]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.100      ; 1.358      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; ram_di_reg[14]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.100      ; 1.358      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; ram_di_reg[15]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.097      ; 1.355      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[1]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.095      ; 1.353      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[0]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.095      ; 1.353      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[2]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.098      ; 1.356      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[3]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.098      ; 1.356      ;
; 1.154 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[4]~_Duplicate_1  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.098      ; 1.356      ;
; 1.155 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_oe                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.093      ; 1.352      ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                         ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+---------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                                                          ; Clock Edge ; Target                    ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+---------------------------+
; 4.147 ; 4.363        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[2]         ;
; 4.147 ; 4.363        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[3]         ;
; 4.147 ; 4.363        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[4]         ;
; 4.147 ; 4.363        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[5]         ;
; 4.147 ; 4.363        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[6]         ;
; 4.147 ; 4.363        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[7]         ;
; 4.147 ; 4.363        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[8]         ;
; 4.147 ; 4.363        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[9]         ;
; 4.147 ; 4.363        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[0]   ;
; 4.147 ; 4.363        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[4]   ;
; 4.147 ; 4.363        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[5]   ;
; 4.147 ; 4.363        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[6]   ;
; 4.147 ; 4.363        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[7]   ;
; 4.147 ; 4.363        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[8]   ;
; 4.147 ; 4.363        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[0]   ;
; 4.147 ; 4.363        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[4]   ;
; 4.147 ; 4.363        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[5]   ;
; 4.147 ; 4.363        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[6]   ;
; 4.147 ; 4.363        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[7]   ;
; 4.147 ; 4.363        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[8]   ;
; 4.147 ; 4.363        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[0] ;
; 4.147 ; 4.363        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[1] ;
; 4.147 ; 4.363        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[2] ;
; 4.147 ; 4.363        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[3] ;
; 4.147 ; 4.363        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[4] ;
; 4.147 ; 4.363        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[5] ;
; 4.147 ; 4.363        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[6] ;
; 4.147 ; 4.363        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[7] ;
; 4.147 ; 4.363        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[8] ;
; 4.147 ; 4.363        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[9] ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[2]              ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[3]              ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[4]              ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[5]              ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[6]              ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[7]              ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[8]              ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[9]              ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[0]         ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[1]         ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[1]   ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[2]   ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[3]   ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[9]   ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[1]   ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[2]   ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[3]   ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[9]   ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[0]       ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[1]       ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[2]       ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[3]       ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[4]       ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[5]       ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[6]       ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[7]       ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[0]       ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[1]       ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[2]       ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[3]       ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[4]       ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[5]       ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[6]       ;
; 4.148 ; 4.364        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[7]       ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[2]              ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[3]              ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[4]              ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[5]              ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[6]              ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[7]              ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[8]              ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[9]              ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[0]         ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[1]         ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[2]         ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[3]         ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[4]         ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[5]         ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[6]         ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[7]         ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[8]         ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[9]         ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[1]   ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[2]   ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[3]   ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[6]   ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[7]   ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[8]   ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[9]   ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[1]   ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[2]   ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[3]   ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[6]   ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[7]   ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[8]   ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[9]   ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[0]       ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[1]       ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[2]       ;
; 4.180 ; 4.364        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[3]       ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+---------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                         ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-----------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                                                          ; Clock Edge ; Target                                                    ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-----------------------------------------------------------+
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[0]                                             ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[10]                                            ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[11]                                            ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[12]                                            ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[13]                                            ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[14]                                            ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[15]                                            ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[16]                                            ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[17]                                            ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[18]                                            ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[19]                                            ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[1]                                             ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[20]                                            ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[21]                                            ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[22]                                            ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[23]                                            ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[24]                                            ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[25]                                            ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[26]                                            ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[27]                                            ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[28]                                            ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[2]                                             ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[30]                                            ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[31]                                            ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[3]                                             ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[4]                                             ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[5]                                             ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[6]                                             ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[7]                                             ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[8]                                             ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[9]                                             ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_psel[0]                     ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1     ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_act                      ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|sdram_rdy                     ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_request_complete_reg                                ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_request_reg                                         ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[11]                                               ;
; 5.602 ; 5.818        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[2]                                                ;
; 5.603 ; 5.819        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ;
; 5.603 ; 5.819        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[0]~_Duplicate_1  ;
; 5.603 ; 5.819        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[1]~_Duplicate_1  ;
; 5.604 ; 5.820        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_bena_reg[0]                                           ;
; 5.604 ; 5.820        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_bena_reg[1]                                           ;
; 5.604 ; 5.820        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[0]                                             ;
; 5.604 ; 5.820        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[10]                                            ;
; 5.604 ; 5.820        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[13]                                            ;
; 5.604 ; 5.820        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[14]                                            ;
; 5.604 ; 5.820        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[1]                                             ;
; 5.604 ; 5.820        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[2]                                             ;
; 5.604 ; 5.820        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[5]                                             ;
; 5.604 ; 5.820        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[6]                                             ;
; 5.604 ; 5.820        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[8]                                             ;
; 5.604 ; 5.820        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[9]                                             ;
; 5.604 ; 5.820        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[29]                                            ;
; 5.604 ; 5.820        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_refr_req                    ;
; 5.604 ; 5.820        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_dq_oe                 ;
; 5.605 ; 5.821        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[11]                                            ;
; 5.605 ; 5.821        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[12]                                            ;
; 5.605 ; 5.821        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[15]                                            ;
; 5.605 ; 5.821        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[3]                                             ;
; 5.605 ; 5.821        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[4]                                             ;
; 5.605 ; 5.821        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[7]                                             ;
; 5.605 ; 5.821        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_refr_act                    ;
; 5.605 ; 5.821        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[11]~_Duplicate_1 ;
; 5.605 ; 5.821        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[5]~_Duplicate_1  ;
; 5.605 ; 5.821        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[6]~_Duplicate_1  ;
; 5.605 ; 5.821        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[7]~_Duplicate_1  ;
; 5.605 ; 5.821        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[8]~_Duplicate_1  ;
; 5.605 ; 5.821        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[9]~_Duplicate_1  ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_act                      ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[2]~_Duplicate_1  ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[3]~_Duplicate_1  ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[4]~_Duplicate_1  ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[0]                                                ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[10]                                               ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[1]                                                ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[3]                                                ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[4]                                                ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[5]                                                ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[6]                                                ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-----------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: 'usb_pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                 ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                               ; Clock Edge ; Target                                                                                                                                                                                                                                           ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 10.161 ; 10.391       ; 0.230          ; Low Pulse Width  ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|altsyncram:buffer_rtl_0|altsyncram_6tc1:auto_generated|ram_block1a0~porta_address_reg0 ;
; 10.161 ; 10.391       ; 0.230          ; Low Pulse Width  ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|altsyncram:buffer_rtl_0|altsyncram_6tc1:auto_generated|ram_block1a0~porta_we_reg       ;
; 10.163 ; 10.393       ; 0.230          ; Low Pulse Width  ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|altsyncram:buffer_rtl_0|altsyncram_6tc1:auto_generated|ram_block1a0~porta_datain_reg0  ;
; 10.164 ; 10.394       ; 0.230          ; Low Pulse Width  ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|altsyncram:buffer_rtl_0|altsyncram_6tc1:auto_generated|ram_block1a0~porta_address_reg0 ;
; 10.164 ; 10.394       ; 0.230          ; Low Pulse Width  ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|altsyncram:buffer_rtl_0|altsyncram_6tc1:auto_generated|ram_block1a0~porta_we_reg       ;
; 10.165 ; 10.395       ; 0.230          ; Low Pulse Width  ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|altsyncram:buffer_rtl_0|altsyncram_6tc1:auto_generated|ram_block1a0~portb_address_reg0 ;
; 10.165 ; 10.395       ; 0.230          ; Low Pulse Width  ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|dataOut[0]                                                                             ;
; 10.165 ; 10.395       ; 0.230          ; Low Pulse Width  ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|dataOut[1]                                                                             ;
; 10.165 ; 10.395       ; 0.230          ; Low Pulse Width  ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|dataOut[2]                                                                             ;
; 10.165 ; 10.395       ; 0.230          ; Low Pulse Width  ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|dataOut[3]                                                                             ;
; 10.165 ; 10.395       ; 0.230          ; Low Pulse Width  ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|dataOut[4]                                                                             ;
; 10.165 ; 10.395       ; 0.230          ; Low Pulse Width  ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|dataOut[5]                                                                             ;
; 10.165 ; 10.395       ; 0.230          ; Low Pulse Width  ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|dataOut[6]                                                                             ;
; 10.165 ; 10.395       ; 0.230          ; Low Pulse Width  ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|dataOut[7]                                                                             ;
; 10.166 ; 10.396       ; 0.230          ; Low Pulse Width  ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|altsyncram:buffer_rtl_0|altsyncram_6tc1:auto_generated|ram_block1a0~porta_datain_reg0  ;
; 10.167 ; 10.397       ; 0.230          ; Low Pulse Width  ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|altsyncram:buffer_rtl_0|altsyncram_6tc1:auto_generated|ram_block1a0~portb_address_reg0 ;
; 10.167 ; 10.397       ; 0.230          ; Low Pulse Width  ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|dataOut[0]                                                                             ;
; 10.167 ; 10.397       ; 0.230          ; Low Pulse Width  ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|dataOut[1]                                                                             ;
; 10.167 ; 10.397       ; 0.230          ; Low Pulse Width  ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|dataOut[2]                                                                             ;
; 10.167 ; 10.397       ; 0.230          ; Low Pulse Width  ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|dataOut[3]                                                                             ;
; 10.167 ; 10.397       ; 0.230          ; Low Pulse Width  ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|dataOut[4]                                                                             ;
; 10.167 ; 10.397       ; 0.230          ; Low Pulse Width  ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|dataOut[5]                                                                             ;
; 10.167 ; 10.397       ; 0.230          ; Low Pulse Width  ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|dataOut[6]                                                                             ;
; 10.167 ; 10.397       ; 0.230          ; Low Pulse Width  ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|dataOut[7]                                                                             ;
; 10.200 ; 10.384       ; 0.184          ; Low Pulse Width  ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[0]                                                                   ;
; 10.200 ; 10.384       ; 0.184          ; Low Pulse Width  ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[1]                                                                   ;
; 10.200 ; 10.430       ; 0.230          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|dataOut[0]                                                                             ;
; 10.200 ; 10.430       ; 0.230          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|dataOut[1]                                                                             ;
; 10.200 ; 10.430       ; 0.230          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|dataOut[2]                                                                             ;
; 10.200 ; 10.430       ; 0.230          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|dataOut[3]                                                                             ;
; 10.200 ; 10.430       ; 0.230          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|dataOut[4]                                                                             ;
; 10.200 ; 10.430       ; 0.230          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|dataOut[5]                                                                             ;
; 10.200 ; 10.430       ; 0.230          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|dataOut[6]                                                                             ;
; 10.200 ; 10.430       ; 0.230          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|dataOut[7]                                                                             ;
; 10.200 ; 10.384       ; 0.184          ; Low Pulse Width  ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[0]                                                                   ;
; 10.200 ; 10.384       ; 0.184          ; Low Pulse Width  ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|SOFController:u_SOFController|SOFTimer[1]                                                                   ;
; 10.201 ; 10.431       ; 0.230          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|altsyncram:buffer_rtl_0|altsyncram_6tc1:auto_generated|ram_block1a0~portb_address_reg0 ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|LineDirectControlEn_reg1                                                ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg[5]                                                            ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[1]                                                       ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[4]                                                       ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[5]                                                       ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[6]                                                       ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineState_reg1[1]                                                     ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|fullSpeedPol_reg1                                                       ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|fullSpeedRate_reg1                                                      ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|ACKRxed                                                                               ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|CurrState_getPkt.01010                                                                ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|CurrState_getPkt.01011                                                                ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|NAKRxed                                                                               ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RXFifoWEn                                                                             ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|RXOverflow                                                                            ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|getPacket:u_getPacket|stallRxed                                                                             ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|RxfifoBI:u_RxfifoBI|forceEmptyToggleSyncToUsbClk[0]                                                                       ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[0]                                                                                           ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[1]                                                                                           ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[2]                                                                                           ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[3]                                                                                           ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[4]                                                                                           ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[5]                                                                                           ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferInIndex[6]                                                                                           ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[0]                                                                               ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[1]                                                                               ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[2]                                                                               ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[3]                                                                               ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[4]                                                                               ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[5]                                                                               ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|bufferOutIndexSyncToWrClk[6]                                                                               ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|RxFifo:HostRxFifo|fifoRTL:u_fifo|fifoFull                                                                                                   ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggleSyncToUsbClk[1]                                                                       ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|TxfifoBI:u_TxfifoBI|forceEmptyToggleSyncToUsbClk[2]                                                                       ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferOutIndex[0]                                                                                          ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferOutIndex[1]                                                                                          ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferOutIndex[2]                                                                                          ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferOutIndex[3]                                                                                          ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferOutIndex[4]                                                                                          ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferOutIndex[5]                                                                                          ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|bufferOutIndex[6]                                                                                          ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dataOut[3]                                                                                                 ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dataOut[4]                                                                                                 ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dataOut[5]                                                                                                 ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dataOut[6]                                                                                                 ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dataOut[7]                                                                                                 ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|fifoEmpty                                                                                                  ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|fifoREnDelayed                                                                                             ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|LineDirectControlEn                                                     ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|LineDirectControlEn_reg1                                                ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg[3]                                                            ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg[4]                                                            ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg[5]                                                            ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg[6]                                                            ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[0]                                                       ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[1]                                                       ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[3]                                                       ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[4]                                                       ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[5]                                                       ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxAddrReg_reg1[6]                                                       ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxEndPReg[0]                                                            ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineState_reg1[0]                                                     ;
; 10.202 ; 10.418       ; 0.216          ; High Pulse Width ; usb_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|usbHostControl:u_usbHostControl|USBHostControlBI:u_USBHostControlBI|TxLineState_reg1[1]                                                     ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                ;
+--------+--------------+----------------+-----------------+--------------------------------------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type            ; Clock                                                                          ; Clock Edge ; Target                                                                                                                                                                                                                                           ;
+--------+--------------+----------------+-----------------+--------------------------------------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_nd71:auto_generated|ram_block1a14~porta_address_reg0                                                                                                                                            ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_nd71:auto_generated|ram_block1a4~porta_address_reg0                                                                                                                                             ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|altsyncram:buffer_rtl_0|altsyncram_6tc1:auto_generated|ram_block1a0~porta_address_reg0 ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|altsyncram:buffer_rtl_0|altsyncram_6tc1:auto_generated|ram_block1a0~porta_we_reg       ;
; 17.209 ; 17.439       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_address_reg0        ;
; 17.209 ; 17.439       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_address_reg0        ;
; 17.209 ; 17.439       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|sin_cos:tab_inst|sin_rom:sin_inst|altsyncram:altsyncram_component|altsyncram_r842:auto_generated|ram_block1a0~porta_address_reg0                                                                                                   ;
; 17.209 ; 17.439       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_nd71:auto_generated|ram_block1a0~porta_address_reg0                                                                                                                                             ;
; 17.209 ; 17.439       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_nd71:auto_generated|ram_block1a13~porta_address_reg0                                                                                                                                            ;
; 17.209 ; 17.439       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_nd71:auto_generated|ram_block1a18~porta_address_reg0                                                                                                                                            ;
; 17.209 ; 17.439       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_nd71:auto_generated|ram_block1a1~porta_address_reg0                                                                                                                                             ;
; 17.209 ; 17.439       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_nd71:auto_generated|ram_block1a20~porta_address_reg0                                                                                                                                            ;
; 17.209 ; 17.439       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_nd71:auto_generated|ram_block1a23~porta_address_reg0                                                                                                                                            ;
; 17.209 ; 17.439       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_nd71:auto_generated|ram_block1a25~porta_address_reg0                                                                                                                                            ;
; 17.209 ; 17.439       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_nd71:auto_generated|ram_block1a26~porta_address_reg0                                                                                                                                            ;
; 17.209 ; 17.439       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_nd71:auto_generated|ram_block1a27~porta_address_reg0                                                                                                                                            ;
; 17.209 ; 17.439       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_nd71:auto_generated|ram_block1a28~porta_address_reg0                                                                                                                                            ;
; 17.209 ; 17.439       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_nd71:auto_generated|ram_block1a29~porta_address_reg0                                                                                                                                            ;
; 17.209 ; 17.439       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_nd71:auto_generated|ram_block1a2~porta_address_reg0                                                                                                                                             ;
; 17.209 ; 17.439       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_nd71:auto_generated|ram_block1a30~porta_address_reg0                                                                                                                                            ;
; 17.209 ; 17.439       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram23_16|altsyncram:ram_block_rtl_0|altsyncram_qg41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                                 ;
; 17.209 ; 17.439       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram23_16|altsyncram:ram_block_rtl_0|altsyncram_qg41:auto_generated|ram_block1a0~porta_we_reg                                                                                                                       ;
; 17.209 ; 17.439       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram23_16|altsyncram:ram_block_rtl_0|altsyncram_qg41:auto_generated|ram_block1a4~porta_address_reg0                                                                                                                 ;
; 17.209 ; 17.439       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram23_16|altsyncram:ram_block_rtl_0|altsyncram_qg41:auto_generated|ram_block1a4~porta_we_reg                                                                                                                       ;
; 17.209 ; 17.439       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_qg41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                                ;
; 17.209 ; 17.439       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_qg41:auto_generated|ram_block1a0~porta_we_reg                                                                                                                      ;
; 17.209 ; 17.439       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_7_0|altsyncram:ram_block_rtl_0|altsyncram_qg41:auto_generated|ram_block1a4~porta_address_reg0                                                                                                                  ;
; 17.209 ; 17.439       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_7_0|altsyncram:ram_block_rtl_0|altsyncram_qg41:auto_generated|ram_block1a4~porta_we_reg                                                                                                                        ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|generic_ram_infer:freezer_bram|altsyncram:ram_block_rtl_0|altsyncram_sd41:auto_generated|ram_block1a0~porta_address_reg0       ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|generic_ram_infer:freezer_bram|altsyncram:ram_block_rtl_0|altsyncram_sd41:auto_generated|ram_block1a0~porta_we_reg             ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0                           ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~portb_address_reg0        ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a1                           ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a2                           ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a3                           ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a4                           ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a5                           ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a6                           ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0                           ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~portb_address_reg0        ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a1                           ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a2                           ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a3                           ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a4                           ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a5                           ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_address_reg0          ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_address_reg0          ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_address_reg0           ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|sin_cos:tab_inst|sin_rom:sin_inst|altsyncram:altsyncram_component|altsyncram_r842:auto_generated|ram_block1a0~portb_address_reg0                                                                                                   ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|sin_cos:tab_inst|sin_rom:sin_inst|altsyncram:altsyncram_component|altsyncram_r842:auto_generated|ram_block1a3~porta_address_reg0                                                                                                   ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_nd71:auto_generated|ram_block1a11~porta_address_reg0                                                                                                                                            ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_nd71:auto_generated|ram_block1a15~porta_address_reg0                                                                                                                                            ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_nd71:auto_generated|ram_block1a16~porta_address_reg0                                                                                                                                            ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_nd71:auto_generated|ram_block1a17~porta_address_reg0                                                                                                                                            ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_nd71:auto_generated|ram_block1a19~porta_address_reg0                                                                                                                                            ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_nd71:auto_generated|ram_block1a24~porta_address_reg0                                                                                                                                            ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_nd71:auto_generated|ram_block1a31~porta_address_reg0                                                                                                                                            ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_nd71:auto_generated|ram_block1a5~porta_address_reg0                                                                                                                                             ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_nd71:auto_generated|ram_block1a6~porta_address_reg0                                                                                                                                             ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_nd71:auto_generated|ram_block1a7~porta_address_reg0                                                                                                                                             ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_nd71:auto_generated|ram_block1a8~porta_address_reg0                                                                                                                                             ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_nd71:auto_generated|ram_block1a9~porta_address_reg0                                                                                                                                             ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_15_8|altsyncram:ram_block_rtl_0|altsyncram_qg41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                                 ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_15_8|altsyncram:ram_block_rtl_0|altsyncram_qg41:auto_generated|ram_block1a0~porta_we_reg                                                                                                                       ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_15_8|altsyncram:ram_block_rtl_0|altsyncram_qg41:auto_generated|ram_block1a3~porta_address_reg0                                                                                                                 ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_15_8|altsyncram:ram_block_rtl_0|altsyncram_qg41:auto_generated|ram_block1a3~porta_we_reg                                                                                                                       ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_qg41:auto_generated|ram_block1a4~porta_address_reg0                                                                                                                ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_qg41:auto_generated|ram_block1a4~porta_we_reg                                                                                                                      ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_7_0|altsyncram:ram_block_rtl_0|altsyncram_qg41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                                  ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_7_0|altsyncram:ram_block_rtl_0|altsyncram_qg41:auto_generated|ram_block1a0~porta_we_reg                                                                                                                        ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|altsyncram:buffer_rtl_0|altsyncram_6tc1:auto_generated|ram_block1a0~porta_address_reg0 ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:0:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|altsyncram:buffer_rtl_0|altsyncram_6tc1:auto_generated|ram_block1a0~porta_we_reg       ;
; 17.210 ; 17.440       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|usbHostCyc2Wrap_usb1t11:\USBGEN:1:usbcon|usbHost:usbHostInst|TxFifo:HostTxFifo|fifoRTL:u_fifo|dpMem_dc:u_dpMem_dc|altsyncram:buffer_rtl_0|altsyncram_6tc1:auto_generated|ram_block1a0~porta_datain_reg0  ;
; 17.211 ; 17.441       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0         ;
; 17.211 ; 17.441       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_datain_reg0         ;
; 17.211 ; 17.441       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0                             ;
; 17.211 ; 17.441       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~portb_address_reg0          ;
; 17.211 ; 17.441       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a1                             ;
; 17.211 ; 17.441       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a10                            ;
; 17.211 ; 17.441       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a11                            ;
; 17.211 ; 17.441       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a12                            ;
; 17.211 ; 17.441       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a13                            ;
; 17.211 ; 17.441       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a14                            ;
; 17.211 ; 17.441       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a15                            ;
; 17.211 ; 17.441       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a16                            ;
; 17.211 ; 17.441       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a17                            ;
; 17.211 ; 17.441       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a18                            ;
; 17.211 ; 17.441       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a19                            ;
; 17.211 ; 17.441       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a2                             ;
; 17.211 ; 17.441       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a20                            ;
; 17.211 ; 17.441       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a21                            ;
; 17.211 ; 17.441       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a22                            ;
; 17.211 ; 17.441       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a23                            ;
; 17.211 ; 17.441       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a24                            ;
; 17.211 ; 17.441       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a25                            ;
; 17.211 ; 17.441       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a26                            ;
; 17.211 ; 17.441       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a27                            ;
; 17.211 ; 17.441       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a28                            ;
; 17.211 ; 17.441       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a29                            ;
; 17.211 ; 17.441       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a3                             ;
+--------+--------------+----------------+-----------------+--------------------------------------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                    ;
+--------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                                         ; Clock Edge ; Target                                                                                              ;
+--------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------+
; 17.440 ; 17.440       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]                      ;
; 17.440 ; 17.440       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]                      ;
; 17.440 ; 17.440       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]                      ;
; 17.440 ; 17.440       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]                      ;
; 17.440 ; 17.440       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|observablevcoout            ;
; 17.454 ; 17.454       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]                    ;
; 17.458 ; 17.458       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|inclk[0] ;
; 17.458 ; 17.458       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|outclk   ;
; 17.462 ; 17.462       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|inclk[0] ;
; 17.462 ; 17.462       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|outclk   ;
; 17.465 ; 17.465       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]                    ;
; 17.480 ; 17.480       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]                      ;
; 17.480 ; 17.480       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]                      ;
; 17.480 ; 17.480       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]                      ;
; 17.480 ; 17.480       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]                      ;
; 17.480 ; 17.480       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|observablevcoout            ;
+--------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: 'FPGA_CLK'                                                                                                                         ;
+---------+--------------+----------------+------------------+----------+------------+-----------------------------------------------------------------------------------------+
; Slack   ; Actual Width ; Required Width ; Type             ; Clock    ; Clock Edge ; Target                                                                                  ;
+---------+--------------+----------------+------------------+----------+------------+-----------------------------------------------------------------------------------------+
; 99.418  ; 99.418       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 99.418  ; 99.418       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 99.420  ; 99.420       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                                     ;
; 99.420  ; 99.420       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|observablevcoout                           ;
; 99.449  ; 99.449       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; FPGA_CLK~input|o                                                                        ;
; 99.460  ; 99.460       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 99.462  ; 99.462       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|inclk[0]                                   ;
; 100.000 ; 100.000      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; FPGA_CLK~input|i                                                                        ;
; 100.000 ; 100.000      ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; FPGA_CLK~input|i                                                                        ;
; 100.538 ; 100.538      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|inclk[0]                                   ;
; 100.539 ; 100.539      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 100.551 ; 100.551      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; FPGA_CLK~input|o                                                                        ;
; 100.579 ; 100.579      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                                     ;
; 100.579 ; 100.579      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|observablevcoout                           ;
; 100.580 ; 100.580      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 100.580 ; 100.580      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 196.000 ; 200.000      ; 4.000          ; Port Rate        ; FPGA_CLK ; Rise       ; FPGA_CLK                                                                                ;
+---------+--------------+----------------+------------------+----------+------------+-----------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                                                              ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 1.419 ; 1.970 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 1.405 ; 1.956 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 1.405 ; 1.956 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 1.405 ; 1.956 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 1.407 ; 1.958 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 1.417 ; 1.968 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 1.403 ; 1.954 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 1.402 ; 1.953 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 1.385 ; 1.934 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 1.413 ; 1.964 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 1.419 ; 1.970 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 1.414 ; 1.965 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 1.414 ; 1.965 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 1.414 ; 1.965 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 1.414 ; 1.965 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 1.414 ; 1.965 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 1.414 ; 1.965 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0       ; FPGA_CLK   ; 2.132 ; 2.565 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 0.405 ; 0.956 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dminus2       ; FPGA_CLK   ; 0.411 ; 0.962 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus1        ; FPGA_CLK   ; 0.414 ; 0.965 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus2        ; FPGA_CLK   ; 0.409 ; 0.960 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                                                 ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; -0.937 ; -1.486 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; -0.956 ; -1.507 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; -0.956 ; -1.507 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; -0.956 ; -1.507 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; -0.958 ; -1.509 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; -0.968 ; -1.519 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; -0.953 ; -1.504 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; -0.952 ; -1.503 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; -0.937 ; -1.486 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; -0.964 ; -1.515 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; -0.970 ; -1.521 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; -0.965 ; -1.516 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; -0.965 ; -1.516 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; -0.965 ; -1.516 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; -0.965 ; -1.516 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; -0.965 ; -1.516 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; -0.965 ; -1.516 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0       ; FPGA_CLK   ; -1.624 ; -2.055 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; -0.093 ; -0.644 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dminus2       ; FPGA_CLK   ; -0.100 ; -0.651 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus1        ; FPGA_CLK   ; -0.102 ; -0.653 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus2        ; FPGA_CLK   ; -0.097 ; -0.648 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                                                      ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_A[*]    ; FPGA_CLK   ; 3.442  ; 3.819  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]   ; FPGA_CLK   ; 1.672  ; 1.577  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]   ; FPGA_CLK   ; 1.672  ; 1.577  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]   ; FPGA_CLK   ; 1.675  ; 1.580  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]   ; FPGA_CLK   ; 1.675  ; 1.580  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]   ; FPGA_CLK   ; 1.668  ; 1.573  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]   ; FPGA_CLK   ; 1.668  ; 1.573  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]   ; FPGA_CLK   ; 1.666  ; 1.571  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]   ; FPGA_CLK   ; 1.228  ; 1.202  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]   ; FPGA_CLK   ; 3.442  ; 3.819  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]   ; FPGA_CLK   ; 1.667  ; 1.572  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]  ; FPGA_CLK   ; 1.672  ; 1.577  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]  ; FPGA_CLK   ; 1.667  ; 1.572  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]   ; FPGA_CLK   ; 3.449  ; 3.826  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]  ; FPGA_CLK   ; 3.449  ; 3.826  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]  ; FPGA_CLK   ; 1.235  ; 1.209  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N   ; FPGA_CLK   ; 1.237  ; 1.211  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N    ; FPGA_CLK   ; 1.674  ; 1.579  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]   ; FPGA_CLK   ; 3.089  ; 3.564  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 1.918  ; 1.876  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 1.918  ; 1.876  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 1.918  ; 1.876  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 3.089  ; 3.564  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 3.079  ; 3.554  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 1.318  ; 1.379  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 1.777  ; 1.773  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 1.674  ; 1.579  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 1.910  ; 1.868  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 3.077  ; 3.552  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 1.909  ; 1.867  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 1.909  ; 1.867  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 1.909  ; 1.867  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 3.082  ; 3.557  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 1.909  ; 1.867  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 1.909  ; 1.867  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n  ; FPGA_CLK   ; 1.668  ; 1.573  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n  ; FPGA_CLK   ; 1.674  ; 1.579  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N   ; FPGA_CLK   ; 1.674  ; 1.579  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N    ; FPGA_CLK   ; 3.451  ; 3.828  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L       ; FPGA_CLK   ; 4.524  ; 5.184  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R       ; FPGA_CLK   ; 3.047  ; 3.257  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK        ; FPGA_CLK   ; 1.759  ; 1.807  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD        ; FPGA_CLK   ; 1.804  ; 1.863  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3       ; FPGA_CLK   ; 1.981  ; 1.924  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK     ; FPGA_CLK   ; 10.466 ;        ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK     ; FPGA_CLK   ;        ; 10.940 ; Fall       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]      ; FPGA_CLK   ; 3.005  ; 3.451  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]     ; FPGA_CLK   ; 1.230  ; 1.204  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]     ; FPGA_CLK   ; 3.005  ; 3.451  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]     ; FPGA_CLK   ; 1.228  ; 1.202  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]     ; FPGA_CLK   ; 1.231  ; 1.205  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]      ; FPGA_CLK   ; 3.007  ; 3.453  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]     ; FPGA_CLK   ; 1.230  ; 1.204  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]     ; FPGA_CLK   ; 1.230  ; 1.204  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]     ; FPGA_CLK   ; 1.230  ; 1.204  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]     ; FPGA_CLK   ; 3.007  ; 3.453  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; dminus1       ; FPGA_CLK   ; 2.323  ; 2.346  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dminus2       ; FPGA_CLK   ; 2.171  ; 2.232  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus1        ; FPGA_CLK   ; 3.945  ; 4.420  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus2        ; FPGA_CLK   ; 2.174  ; 2.235  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                                                              ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_A[*]    ; FPGA_CLK   ; 0.844  ; 0.818  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]   ; FPGA_CLK   ; 1.270  ; 1.178  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]   ; FPGA_CLK   ; 1.270  ; 1.178  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]   ; FPGA_CLK   ; 1.273  ; 1.181  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]   ; FPGA_CLK   ; 1.273  ; 1.181  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]   ; FPGA_CLK   ; 1.266  ; 1.174  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]   ; FPGA_CLK   ; 1.266  ; 1.174  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]   ; FPGA_CLK   ; 1.264  ; 1.172  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]   ; FPGA_CLK   ; 0.844  ; 0.818  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]   ; FPGA_CLK   ; 3.040  ; 3.420  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]   ; FPGA_CLK   ; 1.265  ; 1.173  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]  ; FPGA_CLK   ; 1.270  ; 1.178  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]  ; FPGA_CLK   ; 1.265  ; 1.173  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]   ; FPGA_CLK   ; 0.851  ; 0.825  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]  ; FPGA_CLK   ; 3.047  ; 3.427  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]  ; FPGA_CLK   ; 0.851  ; 0.825  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N   ; FPGA_CLK   ; 0.853  ; 0.827  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N    ; FPGA_CLK   ; 1.272  ; 1.180  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]   ; FPGA_CLK   ; 0.933  ; 0.995  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 1.516  ; 1.478  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 1.516  ; 1.478  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 1.516  ; 1.478  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 2.705  ; 3.181  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 2.695  ; 3.171  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 0.933  ; 0.995  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 1.374  ; 1.374  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 1.272  ; 1.180  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 1.508  ; 1.470  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 2.693  ; 3.169  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 1.507  ; 1.469  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 1.507  ; 1.469  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 1.507  ; 1.469  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 2.698  ; 3.174  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 1.507  ; 1.469  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 1.507  ; 1.469  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n  ; FPGA_CLK   ; 1.266  ; 1.174  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n  ; FPGA_CLK   ; 1.272  ; 1.180  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N   ; FPGA_CLK   ; 1.272  ; 1.180  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N    ; FPGA_CLK   ; 3.049  ; 3.429  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L       ; FPGA_CLK   ; 4.035  ; 4.686  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R       ; FPGA_CLK   ; 2.546  ; 2.746  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK        ; FPGA_CLK   ; 1.310  ; 1.355  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD        ; FPGA_CLK   ; 1.353  ; 1.408  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3       ; FPGA_CLK   ; 1.522  ; 1.469  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK     ; FPGA_CLK   ; 10.051 ;        ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK     ; FPGA_CLK   ;        ; 10.523 ; Fall       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]      ; FPGA_CLK   ; 0.844  ; 0.818  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]     ; FPGA_CLK   ; 0.846  ; 0.820  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]     ; FPGA_CLK   ; 2.621  ; 3.067  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]     ; FPGA_CLK   ; 0.844  ; 0.818  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]     ; FPGA_CLK   ; 0.847  ; 0.821  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]      ; FPGA_CLK   ; 0.846  ; 0.820  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]     ; FPGA_CLK   ; 0.846  ; 0.820  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]     ; FPGA_CLK   ; 0.846  ; 0.820  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]     ; FPGA_CLK   ; 0.846  ; 0.820  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]     ; FPGA_CLK   ; 2.623  ; 3.069  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; dminus1       ; FPGA_CLK   ; 2.076  ; 2.100  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dminus2       ; FPGA_CLK   ; 1.925  ; 1.987  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus1        ; FPGA_CLK   ; 3.698  ; 4.174  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus2        ; FPGA_CLK   ; 1.927  ; 1.989  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                                                      ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 1.670 ; 1.701 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 2.371 ; 2.370 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 2.371 ; 2.370 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 2.371 ; 2.370 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 3.810 ; 4.257 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 3.632 ; 4.079 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 1.670 ; 1.703 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 1.797 ; 1.830 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 1.756 ; 1.701 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 2.920 ; 2.919 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 4.367 ; 4.814 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 2.559 ; 2.558 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 2.559 ; 2.558 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 2.559 ; 2.558 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 4.178 ; 4.625 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 2.547 ; 2.546 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 2.547 ; 2.546 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 1.991 ; 1.936 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 2.986 ; 2.985 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dminus2       ; FPGA_CLK   ; 3.702 ; 3.735 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus1        ; FPGA_CLK   ; 4.808 ; 5.255 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus2        ; FPGA_CLK   ; 3.703 ; 3.736 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                                                              ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 1.234 ; 1.251 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 1.913 ; 1.912 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 1.913 ; 1.912 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 1.913 ; 1.912 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 3.359 ; 3.806 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 3.188 ; 3.635 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 1.234 ; 1.267 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 1.356 ; 1.389 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 1.306 ; 1.251 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 2.440 ; 2.439 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 3.895 ; 4.342 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 2.093 ; 2.092 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 2.093 ; 2.092 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 2.093 ; 2.092 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 3.713 ; 4.160 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 2.082 ; 2.081 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 2.082 ; 2.081 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 1.532 ; 1.477 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 2.676 ; 2.675 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dminus2       ; FPGA_CLK   ; 3.356 ; 3.389 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus1        ; FPGA_CLK   ; 4.490 ; 4.937 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus2        ; FPGA_CLK   ; 3.358 ; 3.391 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                                                             ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 1.751     ; 1.718     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 2.500     ; 2.501     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 2.500     ; 2.501     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 2.500     ; 2.501     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 4.357     ; 3.910     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 4.154     ; 3.707     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 1.751     ; 1.718     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 1.892     ; 1.859     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 1.766     ; 1.821     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 3.120     ; 3.121     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 4.998     ; 4.551     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 2.716     ; 2.717     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 2.716     ; 2.717     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 2.716     ; 2.717     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 4.779     ; 4.332     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 2.700     ; 2.701     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 2.700     ; 2.701     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 2.031     ; 2.086     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 3.076     ; 3.077     ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dminus2       ; FPGA_CLK   ; 3.967     ; 3.934     ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus1        ; FPGA_CLK   ; 5.373     ; 4.926     ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus2        ; FPGA_CLK   ; 3.970     ; 3.937     ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                                                     ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 1.313     ; 1.280     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 2.037     ; 2.038     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 2.037     ; 2.038     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 2.037     ; 2.038     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 3.903     ; 3.456     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 3.708     ; 3.261     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 1.313     ; 1.280     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 1.449     ; 1.416     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 1.313     ; 1.368     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 2.632     ; 2.633     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 4.518     ; 4.071     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 2.244     ; 2.245     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 2.244     ; 2.245     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 2.244     ; 2.245     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 4.308     ; 3.861     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 2.229     ; 2.230     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 2.229     ; 2.230     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 1.568     ; 1.623     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 2.762     ; 2.763     ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dminus2       ; FPGA_CLK   ; 3.612     ; 3.579     ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus1        ; FPGA_CLK   ; 5.050     ; 4.603     ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus2        ; FPGA_CLK   ; 3.615     ; 3.582     ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+


---------------------------------------------
; Fast 1200mV 0C Model Metastability Report ;
---------------------------------------------
No synchronizer chains to report.


+--------------------------------------------------------------------------------------------------------------------------------------------------+
; Multicorner Timing Analysis Summary                                                                                                              ;
+---------------------------------------------------------------------------------+----------+----------+----------+---------+---------------------+
; Clock                                                                           ; Setup    ; Hold     ; Recovery ; Removal ; Minimum Pulse Width ;
+---------------------------------------------------------------------------------+----------+----------+----------+---------+---------------------+
; Worst-case Slack                                                                ; -3.272   ; -1.680   ; 5.454    ; 0.692   ; 4.089               ;
;  FPGA_CLK                                                                       ; N/A      ; N/A      ; N/A      ; N/A     ; 99.418              ;
;  \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.485    ; 0.187    ; 7.995    ; 0.960   ; 5.525               ;
;  \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; -3.272   ; 0.141    ; 5.454    ; 0.692   ; 17.099              ;
;  \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 4.122    ; 0.194    ; N/A      ; N/A     ; 4.089               ;
;  \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0]  ; N/A      ; N/A      ; N/A      ; N/A     ; 17.428              ;
;  usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; -0.327   ; -1.680   ; N/A      ; N/A     ; 10.123              ;
; Design-wide TNS                                                                 ; -260.516 ; -122.432 ; 0.0      ; 0.0     ; 0.0                 ;
;  FPGA_CLK                                                                       ; N/A      ; N/A      ; N/A      ; N/A     ; 0.000               ;
;  \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000    ; 0.000    ; 0.000    ; 0.000   ; 0.000               ;
;  \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; -249.755 ; 0.000    ; 0.000    ; 0.000   ; 0.000               ;
;  \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000    ; 0.000    ; N/A      ; N/A     ; 0.000               ;
;  \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0]  ; N/A      ; N/A      ; N/A      ; N/A     ; 0.000               ;
;  usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; -10.761  ; -122.432 ; N/A      ; N/A     ; 0.000               ;
+---------------------------------------------------------------------------------+----------+----------+----------+---------+---------------------+


+------------------------------------------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                                                              ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 2.724 ; 2.903 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 2.705 ; 2.884 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 2.705 ; 2.884 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 2.705 ; 2.884 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 2.708 ; 2.887 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 2.717 ; 2.896 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 2.698 ; 2.877 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 2.697 ; 2.876 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 2.656 ; 2.834 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 2.717 ; 2.896 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 2.724 ; 2.903 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 2.719 ; 2.898 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 2.719 ; 2.898 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 2.719 ; 2.898 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 2.718 ; 2.897 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 2.718 ; 2.897 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 2.718 ; 2.897 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0       ; FPGA_CLK   ; 3.932 ; 4.039 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 0.790 ; 0.969 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dminus2       ; FPGA_CLK   ; 0.796 ; 0.975 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus1        ; FPGA_CLK   ; 0.799 ; 0.978 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus2        ; FPGA_CLK   ; 0.793 ; 0.972 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                                                 ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; -0.937 ; -1.486 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; -0.956 ; -1.507 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; -0.956 ; -1.507 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; -0.956 ; -1.507 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; -0.958 ; -1.509 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; -0.968 ; -1.519 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; -0.953 ; -1.504 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; -0.952 ; -1.503 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; -0.937 ; -1.486 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; -0.964 ; -1.515 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; -0.970 ; -1.521 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; -0.965 ; -1.516 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; -0.965 ; -1.516 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; -0.965 ; -1.516 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; -0.965 ; -1.516 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; -0.965 ; -1.516 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; -0.965 ; -1.516 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0       ; FPGA_CLK   ; -1.624 ; -2.055 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; -0.093 ; -0.303 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dminus2       ; FPGA_CLK   ; -0.100 ; -0.309 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus1        ; FPGA_CLK   ; -0.102 ; -0.312 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus2        ; FPGA_CLK   ; -0.097 ; -0.307 ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                                                      ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_A[*]    ; FPGA_CLK   ; 5.688  ; 5.935  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]   ; FPGA_CLK   ; 3.084  ; 2.871  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]   ; FPGA_CLK   ; 3.084  ; 2.871  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]   ; FPGA_CLK   ; 3.087  ; 2.874  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]   ; FPGA_CLK   ; 3.087  ; 2.874  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]   ; FPGA_CLK   ; 3.074  ; 2.861  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]   ; FPGA_CLK   ; 3.074  ; 2.861  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]   ; FPGA_CLK   ; 3.072  ; 2.859  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]   ; FPGA_CLK   ; 2.251  ; 2.177  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]   ; FPGA_CLK   ; 5.688  ; 5.935  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]   ; FPGA_CLK   ; 3.073  ; 2.860  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]  ; FPGA_CLK   ; 3.084  ; 2.871  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]  ; FPGA_CLK   ; 3.073  ; 2.860  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]   ; FPGA_CLK   ; 5.701  ; 5.948  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]  ; FPGA_CLK   ; 5.701  ; 5.948  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]  ; FPGA_CLK   ; 2.264  ; 2.190  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N   ; FPGA_CLK   ; 2.265  ; 2.191  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N    ; FPGA_CLK   ; 3.085  ; 2.872  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]   ; FPGA_CLK   ; 5.024  ; 5.448  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 3.455  ; 3.310  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 3.455  ; 3.310  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 3.455  ; 3.310  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 5.024  ; 5.448  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 5.015  ; 5.439  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 2.421  ; 2.400  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 3.283  ; 3.129  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 3.086  ; 2.873  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 3.443  ; 3.298  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 5.008  ; 5.432  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 3.441  ; 3.296  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 3.441  ; 3.296  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 3.441  ; 3.296  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 5.014  ; 5.438  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 3.442  ; 3.297  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 3.442  ; 3.297  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n  ; FPGA_CLK   ; 3.074  ; 2.861  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n  ; FPGA_CLK   ; 3.086  ; 2.873  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N   ; FPGA_CLK   ; 3.085  ; 2.872  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N    ; FPGA_CLK   ; 5.703  ; 5.950  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L       ; FPGA_CLK   ; 8.045  ; 8.431  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R       ; FPGA_CLK   ; 6.015  ; 5.887  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK        ; FPGA_CLK   ; 3.411  ; 3.357  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD        ; FPGA_CLK   ; 3.475  ; 3.435  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3       ; FPGA_CLK   ; 3.643  ; 3.723  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK     ; FPGA_CLK   ; 12.195 ;        ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK     ; FPGA_CLK   ;        ; 12.543 ; Fall       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]      ; FPGA_CLK   ; 4.868  ; 5.254  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]     ; FPGA_CLK   ; 2.252  ; 2.178  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]     ; FPGA_CLK   ; 4.868  ; 5.254  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]     ; FPGA_CLK   ; 2.251  ; 2.177  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]     ; FPGA_CLK   ; 2.254  ; 2.180  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]      ; FPGA_CLK   ; 4.870  ; 5.256  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]     ; FPGA_CLK   ; 2.253  ; 2.179  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]     ; FPGA_CLK   ; 2.253  ; 2.179  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]     ; FPGA_CLK   ; 2.253  ; 2.179  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]     ; FPGA_CLK   ; 4.870  ; 5.256  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; dminus1       ; FPGA_CLK   ; 4.249  ; 4.237  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dminus2       ; FPGA_CLK   ; 4.063  ; 4.042  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus1        ; FPGA_CLK   ; 6.673  ; 7.097  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus2        ; FPGA_CLK   ; 4.066  ; 4.045  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                                                              ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_A[*]    ; FPGA_CLK   ; 0.844  ; 0.818  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]   ; FPGA_CLK   ; 1.270  ; 1.178  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]   ; FPGA_CLK   ; 1.270  ; 1.178  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]   ; FPGA_CLK   ; 1.273  ; 1.181  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]   ; FPGA_CLK   ; 1.273  ; 1.181  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]   ; FPGA_CLK   ; 1.266  ; 1.174  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]   ; FPGA_CLK   ; 1.266  ; 1.174  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]   ; FPGA_CLK   ; 1.264  ; 1.172  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]   ; FPGA_CLK   ; 0.844  ; 0.818  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]   ; FPGA_CLK   ; 3.040  ; 3.420  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]   ; FPGA_CLK   ; 1.265  ; 1.173  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]  ; FPGA_CLK   ; 1.270  ; 1.178  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]  ; FPGA_CLK   ; 1.265  ; 1.173  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]   ; FPGA_CLK   ; 0.851  ; 0.825  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]  ; FPGA_CLK   ; 3.047  ; 3.427  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]  ; FPGA_CLK   ; 0.851  ; 0.825  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N   ; FPGA_CLK   ; 0.853  ; 0.827  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N    ; FPGA_CLK   ; 1.272  ; 1.180  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]   ; FPGA_CLK   ; 0.933  ; 0.995  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 1.516  ; 1.478  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 1.516  ; 1.478  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 1.516  ; 1.478  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 2.705  ; 3.181  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 2.695  ; 3.171  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 0.933  ; 0.995  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 1.374  ; 1.374  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 1.272  ; 1.180  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 1.508  ; 1.470  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 2.693  ; 3.169  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 1.507  ; 1.469  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 1.507  ; 1.469  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 1.507  ; 1.469  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 2.698  ; 3.174  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 1.507  ; 1.469  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 1.507  ; 1.469  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n  ; FPGA_CLK   ; 1.266  ; 1.174  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n  ; FPGA_CLK   ; 1.272  ; 1.180  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N   ; FPGA_CLK   ; 1.272  ; 1.180  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N    ; FPGA_CLK   ; 3.049  ; 3.429  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L       ; FPGA_CLK   ; 4.035  ; 4.686  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R       ; FPGA_CLK   ; 2.546  ; 2.746  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK        ; FPGA_CLK   ; 1.310  ; 1.355  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD        ; FPGA_CLK   ; 1.353  ; 1.408  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3       ; FPGA_CLK   ; 1.522  ; 1.469  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK     ; FPGA_CLK   ; 10.051 ;        ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK     ; FPGA_CLK   ;        ; 10.523 ; Fall       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]      ; FPGA_CLK   ; 0.844  ; 0.818  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]     ; FPGA_CLK   ; 0.846  ; 0.820  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]     ; FPGA_CLK   ; 2.621  ; 3.067  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]     ; FPGA_CLK   ; 0.844  ; 0.818  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]     ; FPGA_CLK   ; 0.847  ; 0.821  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]      ; FPGA_CLK   ; 0.846  ; 0.820  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]     ; FPGA_CLK   ; 0.846  ; 0.820  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]     ; FPGA_CLK   ; 0.846  ; 0.820  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]     ; FPGA_CLK   ; 0.846  ; 0.820  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]     ; FPGA_CLK   ; 2.623  ; 3.069  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; dminus1       ; FPGA_CLK   ; 2.076  ; 2.100  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dminus2       ; FPGA_CLK   ; 1.925  ; 1.987  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus1        ; FPGA_CLK   ; 3.698  ; 4.174  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
; dplus2        ; FPGA_CLK   ; 1.927  ; 1.989  ; Rise       ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ;
+---------------+------------+--------+--------+------------+--------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Board Trace Model Assignments                                                                                                                                                                                                                                                                                                                                                                                   ;
+--------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
; Pin          ; I/O Standard ; Near Tline Length ; Near Tline L per Length ; Near Tline C per Length ; Near Series R ; Near Differential R ; Near Pull-up R ; Near Pull-down R ; Near C ; Far Tline Length ; Far Tline L per Length ; Far Tline C per Length ; Far Series R ; Far Pull-up R ; Far Pull-down R ; Far C ; Termination Voltage ; Far Differential R ; EBD File Name ; EBD Signal Name ; EBD Far-end ;
+--------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
; VGA_B[0]     ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_B[1]     ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_B[2]     ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_B[3]     ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_G[0]     ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_G[1]     ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_G[2]     ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_G[3]     ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; AUDIO_L      ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; AUDIO_R      ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_BA[0]  ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_BA[1]  ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_CS_N   ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_RAS_N  ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_CAS_N  ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_WE_N   ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQMH_n ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQML_n ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_CLK    ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_CKE    ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[0]   ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[1]   ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[2]   ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[3]   ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[4]   ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[5]   ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[6]   ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[7]   ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[8]   ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[9]   ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[10]  ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[11]  ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[12]  ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SD_CLK       ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SD_CMD       ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SD_DAT3      ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; CFG_CLK      ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; CFG_CS_n     ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; CFG_DOUT     ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; dplus1       ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; dminus1      ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; dplus2       ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; dminus2      ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[0]  ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[1]  ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[2]  ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[3]  ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[4]  ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[5]  ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[6]  ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[7]  ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[8]  ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[9]  ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[10] ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[11] ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[12] ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[13] ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[14] ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[15] ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
+--------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+


+-----------------------------------------------------------------+
; Input Transition Times                                          ;
+--------------+--------------+-----------------+-----------------+
; Pin          ; I/O Standard ; 10-90 Rise Time ; 90-10 Fall Time ;
+--------------+--------------+-----------------+-----------------+
; CFG_DIN      ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; dplus1       ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; dminus1      ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; dplus2       ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; dminus2      ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[0]  ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[1]  ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[2]  ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[3]  ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[4]  ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[5]  ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[6]  ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[7]  ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[8]  ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[9]  ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[10] ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[11] ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[12] ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[13] ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[14] ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[15] ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; FPGA_CLK     ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SD_DAT0      ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
+--------------+--------------+-----------------+-----------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Signal Integrity Metrics (Slow 1200mv 0c Model)                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           ;
+--------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; Pin          ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
+--------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; VGA_B[0]     ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; VGA_B[1]     ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.09 V              ; -0.00419 V          ; 0.108 V                              ; 0.251 V                              ; 5.73e-09 s                  ; 5.85e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.69e-08 V                  ; 3.09 V             ; -0.00419 V         ; 0.108 V                             ; 0.251 V                             ; 5.73e-09 s                 ; 5.85e-09 s                 ; Yes                       ; Yes                       ;
; VGA_B[2]     ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; VGA_B[3]     ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; VGA_G[0]     ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; VGA_G[1]     ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; VGA_G[2]     ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; VGA_G[3]     ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.09 V              ; -0.00419 V          ; 0.108 V                              ; 0.251 V                              ; 5.73e-09 s                  ; 5.85e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.69e-08 V                  ; 3.09 V             ; -0.00419 V         ; 0.108 V                             ; 0.251 V                             ; 5.73e-09 s                 ; 5.85e-09 s                 ; Yes                       ; Yes                       ;
; AUDIO_L      ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.09 V              ; -0.00419 V          ; 0.108 V                              ; 0.251 V                              ; 5.73e-09 s                  ; 5.85e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.69e-08 V                  ; 3.09 V             ; -0.00419 V         ; 0.108 V                             ; 0.251 V                             ; 5.73e-09 s                 ; 5.85e-09 s                 ; Yes                       ; Yes                       ;
; AUDIO_R      ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_BA[0]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.09 V              ; -0.00419 V          ; 0.108 V                              ; 0.251 V                              ; 5.73e-09 s                  ; 5.85e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.69e-08 V                  ; 3.09 V             ; -0.00419 V         ; 0.108 V                             ; 0.251 V                             ; 5.73e-09 s                 ; 5.85e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_BA[1]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_CS_N   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_RAS_N  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_CAS_N  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_WE_N   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.09 V              ; -0.00419 V          ; 0.108 V                              ; 0.251 V                              ; 5.73e-09 s                  ; 5.85e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.69e-08 V                  ; 3.09 V             ; -0.00419 V         ; 0.108 V                             ; 0.251 V                             ; 5.73e-09 s                 ; 5.85e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQMH_n ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_DQML_n ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_CLK    ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.09 V              ; -0.00419 V          ; 0.108 V                              ; 0.251 V                              ; 5.73e-09 s                  ; 5.85e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.69e-08 V                  ; 3.09 V             ; -0.00419 V         ; 0.108 V                             ; 0.251 V                             ; 5.73e-09 s                 ; 5.85e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_CKE    ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[0]   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[1]   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[2]   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[3]   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[4]   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[5]   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[6]   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[7]   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[8]   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.09 V              ; -0.00419 V          ; 0.108 V                              ; 0.251 V                              ; 5.73e-09 s                  ; 5.85e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.69e-08 V                  ; 3.09 V             ; -0.00419 V         ; 0.108 V                             ; 0.251 V                             ; 5.73e-09 s                 ; 5.85e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[9]   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[10]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[11]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[12]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SD_CLK       ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SD_CMD       ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SD_DAT3      ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; CFG_CLK      ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 6.15e-09 V                   ; 3.18 V              ; -0.0303 V           ; 0.317 V                              ; 0.07 V                               ; 3.25e-10 s                  ; 3.88e-10 s                  ; No                         ; Yes                        ; 3.08 V                      ; 6.15e-09 V                  ; 3.18 V             ; -0.0303 V          ; 0.317 V                             ; 0.07 V                              ; 3.25e-10 s                 ; 3.88e-10 s                 ; No                        ; Yes                       ;
; CFG_CS_n     ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.76e-08 V                   ; 3.09 V              ; -0.0166 V           ; 0.084 V                              ; 0.289 V                              ; 2.05e-09 s                  ; 1.96e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.76e-08 V                  ; 3.09 V             ; -0.0166 V          ; 0.084 V                             ; 0.289 V                             ; 2.05e-09 s                 ; 1.96e-09 s                 ; Yes                       ; Yes                       ;
; CFG_DOUT     ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.76e-08 V                   ; 3.09 V              ; -0.0166 V           ; 0.084 V                              ; 0.289 V                              ; 2.05e-09 s                  ; 1.96e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.76e-08 V                  ; 3.09 V             ; -0.0166 V          ; 0.084 V                             ; 0.289 V                             ; 2.05e-09 s                 ; 1.96e-09 s                 ; Yes                       ; Yes                       ;
; dplus1       ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.09 V              ; -0.00398 V          ; 0.168 V                              ; 0.263 V                              ; 6.02e-09 s                  ; 6.14e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.09 V             ; -0.00398 V         ; 0.168 V                             ; 0.263 V                             ; 6.02e-09 s                 ; 6.14e-09 s                 ; Yes                       ; Yes                       ;
; dminus1      ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; dplus2       ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0307 V           ; 0.185 V                              ; 0.216 V                              ; 1.07e-09 s                  ; 1.08e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0307 V          ; 0.185 V                             ; 0.216 V                             ; 1.07e-09 s                 ; 1.08e-09 s                 ; Yes                       ; Yes                       ;
; dminus2      ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0307 V           ; 0.185 V                              ; 0.216 V                              ; 1.07e-09 s                  ; 1.08e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0307 V          ; 0.185 V                             ; 0.216 V                             ; 1.07e-09 s                 ; 1.08e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[0]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[1]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[2]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[3]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.09 V              ; -0.00398 V          ; 0.168 V                              ; 0.263 V                              ; 6.02e-09 s                  ; 6.14e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.09 V             ; -0.00398 V         ; 0.168 V                             ; 0.263 V                             ; 6.02e-09 s                 ; 6.14e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[4]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.09 V              ; -0.00398 V          ; 0.168 V                              ; 0.263 V                              ; 6.02e-09 s                  ; 6.14e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.09 V             ; -0.00398 V         ; 0.168 V                             ; 0.263 V                             ; 6.02e-09 s                 ; 6.14e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[5]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0307 V           ; 0.185 V                              ; 0.216 V                              ; 1.07e-09 s                  ; 1.08e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0307 V          ; 0.185 V                             ; 0.216 V                             ; 1.07e-09 s                 ; 1.08e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[6]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0307 V           ; 0.185 V                              ; 0.216 V                              ; 1.07e-09 s                  ; 1.08e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0307 V          ; 0.185 V                             ; 0.216 V                             ; 1.07e-09 s                 ; 1.08e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[7]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_DQ[8]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[9]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.09 V              ; -0.00398 V          ; 0.168 V                              ; 0.263 V                              ; 6.02e-09 s                  ; 6.14e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.09 V             ; -0.00398 V         ; 0.168 V                             ; 0.263 V                             ; 6.02e-09 s                 ; 6.14e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[10] ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[11] ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[12] ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[13] ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.09 V              ; -0.00398 V          ; 0.168 V                              ; 0.263 V                              ; 6.02e-09 s                  ; 6.14e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.09 V             ; -0.00398 V         ; 0.168 V                             ; 0.263 V                             ; 6.02e-09 s                 ; 6.14e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[14] ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[15] ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
+--------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Signal Integrity Metrics (Slow 1200mv 85c Model)                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                          ;
+--------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; Pin          ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
+--------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; VGA_B[0]     ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; VGA_B[1]     ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.00169 V          ; 0.058 V                              ; 0.159 V                              ; 6.95e-09 s                  ; 7.33e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.00169 V         ; 0.058 V                             ; 0.159 V                             ; 6.95e-09 s                 ; 7.33e-09 s                 ; Yes                       ; Yes                       ;
; VGA_B[2]     ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; VGA_B[3]     ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; VGA_G[0]     ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; VGA_G[1]     ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; VGA_G[2]     ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; VGA_G[3]     ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.00169 V          ; 0.058 V                              ; 0.159 V                              ; 6.95e-09 s                  ; 7.33e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.00169 V         ; 0.058 V                             ; 0.159 V                             ; 6.95e-09 s                 ; 7.33e-09 s                 ; Yes                       ; Yes                       ;
; AUDIO_L      ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.00169 V          ; 0.058 V                              ; 0.159 V                              ; 6.95e-09 s                  ; 7.33e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.00169 V         ; 0.058 V                             ; 0.159 V                             ; 6.95e-09 s                 ; 7.33e-09 s                 ; Yes                       ; Yes                       ;
; AUDIO_R      ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_BA[0]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.00169 V          ; 0.058 V                              ; 0.159 V                              ; 6.95e-09 s                  ; 7.33e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.00169 V         ; 0.058 V                             ; 0.159 V                             ; 6.95e-09 s                 ; 7.33e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_BA[1]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_CS_N   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_RAS_N  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_CAS_N  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_WE_N   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.00169 V          ; 0.058 V                              ; 0.159 V                              ; 6.95e-09 s                  ; 7.33e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.00169 V         ; 0.058 V                             ; 0.159 V                             ; 6.95e-09 s                 ; 7.33e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQMH_n ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQML_n ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_CLK    ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.00169 V          ; 0.058 V                              ; 0.159 V                              ; 6.95e-09 s                  ; 7.33e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.00169 V         ; 0.058 V                             ; 0.159 V                             ; 6.95e-09 s                 ; 7.33e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_CKE    ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[0]   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[1]   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[2]   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[3]   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[4]   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[5]   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[6]   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[7]   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[8]   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.00169 V          ; 0.058 V                              ; 0.159 V                              ; 6.95e-09 s                  ; 7.33e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.00169 V         ; 0.058 V                             ; 0.159 V                             ; 6.95e-09 s                 ; 7.33e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[9]   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[10]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[11]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[12]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SD_CLK       ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SD_CMD       ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SD_DAT3      ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; CFG_CLK      ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 6.52e-07 V                   ; 3.14 V              ; -0.0428 V           ; 0.161 V                              ; 0.071 V                              ; 4.71e-10 s                  ; 4.5e-10 s                   ; Yes                        ; Yes                        ; 3.08 V                      ; 6.52e-07 V                  ; 3.14 V             ; -0.0428 V          ; 0.161 V                             ; 0.071 V                             ; 4.71e-10 s                 ; 4.5e-10 s                  ; Yes                       ; Yes                       ;
; CFG_CS_n     ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.13e-06 V                   ; 3.08 V              ; -0.00721 V          ; 0.043 V                              ; 0.226 V                              ; 2.47e-09 s                  ; 2.5e-09 s                   ; Yes                        ; Yes                        ; 3.08 V                      ; 3.13e-06 V                  ; 3.08 V             ; -0.00721 V         ; 0.043 V                             ; 0.226 V                             ; 2.47e-09 s                 ; 2.5e-09 s                  ; Yes                       ; Yes                       ;
; CFG_DOUT     ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.13e-06 V                   ; 3.08 V              ; -0.00721 V          ; 0.043 V                              ; 0.226 V                              ; 2.47e-09 s                  ; 2.5e-09 s                   ; Yes                        ; Yes                        ; 3.08 V                      ; 3.13e-06 V                  ; 3.08 V             ; -0.00721 V         ; 0.043 V                             ; 0.226 V                             ; 2.47e-09 s                 ; 2.5e-09 s                  ; Yes                       ; Yes                       ;
; dplus1       ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.00144 V          ; 0.08 V                               ; 0.174 V                              ; 7.33e-09 s                  ; 7.73e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.00144 V         ; 0.08 V                              ; 0.174 V                             ; 7.33e-09 s                 ; 7.73e-09 s                 ; Yes                       ; Yes                       ;
; dminus1      ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; dplus2       ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.0139 V           ; 0.07 V                               ; 0.155 V                              ; 1.28e-09 s                  ; 1.32e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.0139 V          ; 0.07 V                              ; 0.155 V                             ; 1.28e-09 s                 ; 1.32e-09 s                 ; Yes                       ; Yes                       ;
; dminus2      ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.0139 V           ; 0.07 V                               ; 0.155 V                              ; 1.28e-09 s                  ; 1.32e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.0139 V          ; 0.07 V                              ; 0.155 V                             ; 1.28e-09 s                 ; 1.32e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[0]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[1]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[2]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[3]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.00144 V          ; 0.08 V                               ; 0.174 V                              ; 7.33e-09 s                  ; 7.73e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.00144 V         ; 0.08 V                              ; 0.174 V                             ; 7.33e-09 s                 ; 7.73e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[4]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.00144 V          ; 0.08 V                               ; 0.174 V                              ; 7.33e-09 s                  ; 7.73e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.00144 V         ; 0.08 V                              ; 0.174 V                             ; 7.33e-09 s                 ; 7.73e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[5]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.0139 V           ; 0.07 V                               ; 0.155 V                              ; 1.28e-09 s                  ; 1.32e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.0139 V          ; 0.07 V                              ; 0.155 V                             ; 1.28e-09 s                 ; 1.32e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[6]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.0139 V           ; 0.07 V                               ; 0.155 V                              ; 1.28e-09 s                  ; 1.32e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.0139 V          ; 0.07 V                              ; 0.155 V                             ; 1.28e-09 s                 ; 1.32e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[7]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[8]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[9]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.00144 V          ; 0.08 V                               ; 0.174 V                              ; 7.33e-09 s                  ; 7.73e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.00144 V         ; 0.08 V                              ; 0.174 V                             ; 7.33e-09 s                 ; 7.73e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[10] ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[11] ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[12] ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[13] ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.00144 V          ; 0.08 V                               ; 0.174 V                              ; 7.33e-09 s                  ; 7.73e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.00144 V         ; 0.08 V                              ; 0.174 V                             ; 7.33e-09 s                 ; 7.73e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[14] ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[15] ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
+--------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Signal Integrity Metrics (Fast 1200mv 0c Model)                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           ;
+--------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; Pin          ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
+--------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; VGA_B[0]     ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; VGA_B[1]     ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.47 V              ; -0.00753 V          ; 0.323 V                              ; 0.336 V                              ; 4.77e-09 s                  ; 5.18e-09 s                  ; Yes                        ; No                         ; 3.46 V                      ; 3.12e-07 V                  ; 3.47 V             ; -0.00753 V         ; 0.323 V                             ; 0.336 V                             ; 4.77e-09 s                 ; 5.18e-09 s                 ; Yes                       ; No                        ;
; VGA_B[2]     ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; VGA_B[3]     ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; VGA_G[0]     ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; VGA_G[1]     ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; VGA_G[2]     ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; VGA_G[3]     ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.47 V              ; -0.00753 V          ; 0.323 V                              ; 0.336 V                              ; 4.77e-09 s                  ; 5.18e-09 s                  ; Yes                        ; No                         ; 3.46 V                      ; 3.12e-07 V                  ; 3.47 V             ; -0.00753 V         ; 0.323 V                             ; 0.336 V                             ; 4.77e-09 s                 ; 5.18e-09 s                 ; Yes                       ; No                        ;
; AUDIO_L      ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.47 V              ; -0.00753 V          ; 0.323 V                              ; 0.336 V                              ; 4.77e-09 s                  ; 5.18e-09 s                  ; Yes                        ; No                         ; 3.46 V                      ; 3.12e-07 V                  ; 3.47 V             ; -0.00753 V         ; 0.323 V                             ; 0.336 V                             ; 4.77e-09 s                 ; 5.18e-09 s                 ; Yes                       ; No                        ;
; AUDIO_R      ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_BA[0]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.47 V              ; -0.00753 V          ; 0.323 V                              ; 0.336 V                              ; 4.77e-09 s                  ; 5.18e-09 s                  ; Yes                        ; No                         ; 3.46 V                      ; 3.12e-07 V                  ; 3.47 V             ; -0.00753 V         ; 0.323 V                             ; 0.336 V                             ; 4.77e-09 s                 ; 5.18e-09 s                 ; Yes                       ; No                        ;
; SDRAM_BA[1]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_CS_N   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_RAS_N  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_CAS_N  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_WE_N   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.47 V              ; -0.00753 V          ; 0.323 V                              ; 0.336 V                              ; 4.77e-09 s                  ; 5.18e-09 s                  ; Yes                        ; No                         ; 3.46 V                      ; 3.12e-07 V                  ; 3.47 V             ; -0.00753 V         ; 0.323 V                             ; 0.336 V                             ; 4.77e-09 s                 ; 5.18e-09 s                 ; Yes                       ; No                        ;
; SDRAM_DQMH_n ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_DQML_n ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_CLK    ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.47 V              ; -0.00753 V          ; 0.323 V                              ; 0.336 V                              ; 4.77e-09 s                  ; 5.18e-09 s                  ; Yes                        ; No                         ; 3.46 V                      ; 3.12e-07 V                  ; 3.47 V             ; -0.00753 V         ; 0.323 V                             ; 0.336 V                             ; 4.77e-09 s                 ; 5.18e-09 s                 ; Yes                       ; No                        ;
; SDRAM_CKE    ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[0]   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[1]   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[2]   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[3]   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[4]   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[5]   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[6]   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[7]   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[8]   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.47 V              ; -0.00753 V          ; 0.323 V                              ; 0.336 V                              ; 4.77e-09 s                  ; 5.18e-09 s                  ; Yes                        ; No                         ; 3.46 V                      ; 3.12e-07 V                  ; 3.47 V             ; -0.00753 V         ; 0.323 V                             ; 0.336 V                             ; 4.77e-09 s                 ; 5.18e-09 s                 ; Yes                       ; No                        ;
; SDRAM_A[9]   ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[10]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[11]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[12]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SD_CLK       ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SD_CMD       ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SD_DAT3      ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; CFG_CLK      ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 6.59e-08 V                   ; 3.58 V              ; -0.0703 V           ; 0.234 V                              ; 0.091 V                              ; 2.93e-10 s                  ; 3.09e-10 s                  ; Yes                        ; Yes                        ; 3.46 V                      ; 6.59e-08 V                  ; 3.58 V             ; -0.0703 V          ; 0.234 V                             ; 0.091 V                             ; 2.93e-10 s                 ; 3.09e-10 s                 ; Yes                       ; Yes                       ;
; CFG_CS_n     ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.08e-07 V                   ; 3.48 V              ; -0.026 V            ; 0.261 V                              ; 0.327 V                              ; 1.74e-09 s                  ; 1.77e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 3.08e-07 V                  ; 3.48 V             ; -0.026 V           ; 0.261 V                             ; 0.327 V                             ; 1.74e-09 s                 ; 1.77e-09 s                 ; No                        ; No                        ;
; CFG_DOUT     ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.08e-07 V                   ; 3.48 V              ; -0.026 V            ; 0.261 V                              ; 0.327 V                              ; 1.74e-09 s                  ; 1.77e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 3.08e-07 V                  ; 3.48 V             ; -0.026 V           ; 0.261 V                             ; 0.327 V                             ; 1.74e-09 s                 ; 1.77e-09 s                 ; No                        ; No                        ;
; dplus1       ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.47 V              ; -0.00704 V          ; 0.325 V                              ; 0.344 V                              ; 5.02e-09 s                  ; 5.44e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.47 V             ; -0.00704 V         ; 0.325 V                             ; 0.344 V                             ; 5.02e-09 s                 ; 5.44e-09 s                 ; No                        ; No                        ;
; dminus1      ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; dplus2       ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.51 V              ; -0.0513 V           ; 0.246 V                              ; 0.327 V                              ; 8.76e-10 s                  ; 8.99e-10 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.51 V             ; -0.0513 V          ; 0.246 V                             ; 0.327 V                             ; 8.76e-10 s                 ; 8.99e-10 s                 ; No                        ; No                        ;
; dminus2      ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.51 V              ; -0.0513 V           ; 0.246 V                              ; 0.327 V                              ; 8.76e-10 s                  ; 8.99e-10 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.51 V             ; -0.0513 V          ; 0.246 V                             ; 0.327 V                             ; 8.76e-10 s                 ; 8.99e-10 s                 ; No                        ; No                        ;
; SDRAM_DQ[0]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[1]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[2]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[3]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.47 V              ; -0.00704 V          ; 0.325 V                              ; 0.344 V                              ; 5.02e-09 s                  ; 5.44e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.47 V             ; -0.00704 V         ; 0.325 V                             ; 0.344 V                             ; 5.02e-09 s                 ; 5.44e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[4]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.47 V              ; -0.00704 V          ; 0.325 V                              ; 0.344 V                              ; 5.02e-09 s                  ; 5.44e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.47 V             ; -0.00704 V         ; 0.325 V                             ; 0.344 V                             ; 5.02e-09 s                 ; 5.44e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[5]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.51 V              ; -0.0513 V           ; 0.246 V                              ; 0.327 V                              ; 8.76e-10 s                  ; 8.99e-10 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.51 V             ; -0.0513 V          ; 0.246 V                             ; 0.327 V                             ; 8.76e-10 s                 ; 8.99e-10 s                 ; No                        ; No                        ;
; SDRAM_DQ[6]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.51 V              ; -0.0513 V           ; 0.246 V                              ; 0.327 V                              ; 8.76e-10 s                  ; 8.99e-10 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.51 V             ; -0.0513 V          ; 0.246 V                             ; 0.327 V                             ; 8.76e-10 s                 ; 8.99e-10 s                 ; No                        ; No                        ;
; SDRAM_DQ[7]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_DQ[8]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[9]  ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.47 V              ; -0.00704 V          ; 0.325 V                              ; 0.344 V                              ; 5.02e-09 s                  ; 5.44e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.47 V             ; -0.00704 V         ; 0.325 V                             ; 0.344 V                             ; 5.02e-09 s                 ; 5.44e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[10] ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[11] ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[12] ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[13] ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.47 V              ; -0.00704 V          ; 0.325 V                              ; 0.344 V                              ; 5.02e-09 s                  ; 5.44e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.47 V             ; -0.00704 V         ; 0.325 V                             ; 0.344 V                             ; 5.02e-09 s                 ; 5.44e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[14] ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[15] ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
+--------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Setup Transfers                                                                                                                                                                                             ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
; From Clock                                                                     ; To Clock                                                                       ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 2040     ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 1        ; 310      ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 7136     ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 24074502 ; 0        ; 104204   ; 0        ;
; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 88       ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 117      ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 224      ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; 80       ; 0        ; 0        ; 0        ;
; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; 23087    ; 0        ; 0        ; 0        ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Hold Transfers                                                                                                                                                                                              ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
; From Clock                                                                     ; To Clock                                                                       ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 2040     ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 1        ; 310      ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 7136     ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 24074502 ; 0        ; 104204   ; 0        ;
; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 88       ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 117      ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 224      ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; 80       ; 0        ; 0        ; 0        ;
; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; usb_pll|altpll_component|auto_generated|pll1|clk[0]                            ; 23087    ; 0        ; 0        ; 0        ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Recovery Transfers                                                                                                                                                                                          ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
; From Clock                                                                     ; To Clock                                                                       ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 157      ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 655      ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 1838     ; 0        ; 0        ; 0        ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Removal Transfers                                                                                                                                                                                           ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
; From Clock                                                                     ; To Clock                                                                       ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 157      ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 655      ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 1838     ; 0        ; 0        ; 0        ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


---------------
; Report TCCS ;
---------------
No dedicated SERDES Transmitter circuitry present in device or used in design


---------------
; Report RSKM ;
---------------
No dedicated SERDES Receiver circuitry present in device or used in design


+------------------------------------------------+
; Unconstrained Paths                            ;
+---------------------------------+-------+------+
; Property                        ; Setup ; Hold ;
+---------------------------------+-------+------+
; Illegal Clocks                  ; 0     ; 0    ;
; Unconstrained Clocks            ; 0     ; 0    ;
; Unconstrained Input Ports       ; 21    ; 21   ;
; Unconstrained Input Port Paths  ; 21    ; 21   ;
; Unconstrained Output Ports      ; 54    ; 54   ;
; Unconstrained Output Port Paths ; 75    ; 75   ;
+---------------------------------+-------+------+


+------------------------------------+
; TimeQuest Timing Analyzer Messages ;
+------------------------------------+
Info: *******************************************************************
Info: Running Quartus II 32-bit TimeQuest Timing Analyzer
    Info: Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
    Info: Processing started: Sat Mar 28 00:21:31 2015
Info: Command: quartus_sta atari800core -c atari800core
Info: qsta_default_script.tcl version: #1
Info (11104): Parallel Compilation has detected 4 hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use 2 of the 2 physical processors detected instead.
Info (21077): Low junction temperature is 0 degrees C
Info (21077): High junction temperature is 85 degrees C
Info (332104): Reading SDC File: 'atari800core.sdc'
Info (332110): Deriving PLL clocks
    Info (332110): create_generated_clock -source {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]} -multiply_by 3 -duty_cycle 50.00 -name {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]} {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]}
    Info (332110): create_generated_clock -source {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]} -duty_cycle 50.00 -name {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]} {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]}
    Info (332110): create_generated_clock -source {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]} -multiply_by 3 -phase 236.25 -duty_cycle 50.00 -name {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]} {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]}
    Info (332110): create_generated_clock -source {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]} -multiply_by 4 -duty_cycle 50.00 -name {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]} {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]}
    Info (332110): create_generated_clock -source {\gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|inclk[0]} -divide_by 11 -multiply_by 63 -duty_cycle 50.00 -name {\gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0]} {\gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0]}
    Info (332110): create_generated_clock -source {usb_pll|altpll_component|auto_generated|pll1|inclk[0]} -divide_by 5 -multiply_by 48 -duty_cycle 50.00 -name {usb_pll|altpll_component|auto_generated|pll1|clk[0]} {usb_pll|altpll_component|auto_generated|pll1|clk[0]}
Info (332151): Clock uncertainty is not calculated until you update the timing netlist.
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
Info: Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON
Info: Analyzing Slow 1200mV 85C Model
Critical Warning (332148): Timing requirements not met
    Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer.
Info (332146): Worst-case setup slack is -3.272
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    -3.272      -249.755 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    -0.327       -10.761 usb_pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     0.485         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     4.122         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
Info (332146): Worst-case hold slack is -1.680
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    -1.680      -122.432 usb_pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     0.352         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.412         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     0.439         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
Info (332146): Worst-case recovery slack is 5.454
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     5.454         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     7.995         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case removal slack is 1.444
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     1.444         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     1.889         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case minimum pulse width slack is 4.090
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.090         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
    Info (332119):     5.544         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    10.144         0.000 usb_pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    17.099         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    17.433         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    99.796         0.000 FPGA_CLK 
Info: Analyzing Slow 1200mV 0C Model
Info (334003): Started post-fitting delay annotation
Info (334004): Delay annotation completed successfully
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
Critical Warning (332148): Timing requirements not met
    Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer.
Info (332146): Worst-case setup slack is -2.907
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    -2.907      -220.428 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    -0.287       -10.149 usb_pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     1.001         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     4.524         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
Info (332146): Worst-case hold slack is -1.474
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    -1.474      -107.385 usb_pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     0.348         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.363         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     0.405         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
Info (332146): Worst-case recovery slack is 6.042
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     6.042         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     8.363         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case removal slack is 1.300
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     1.300         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     1.683         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case minimum pulse width slack is 4.089
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.089         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
    Info (332119):     5.525         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    10.123         0.000 usb_pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    17.122         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    17.428         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    99.778         0.000 FPGA_CLK 
Info: Analyzing Fast 1200mV 0C Model
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
Critical Warning (332148): Timing requirements not met
    Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer.
Info (332146): Worst-case setup slack is -1.668
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    -1.668      -128.358 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    -0.123        -1.939 usb_pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     3.101         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     6.500         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
Info (332146): Worst-case hold slack is -1.027
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    -1.027       -76.896 usb_pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     0.141         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.187         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     0.194         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
Info (332146): Worst-case recovery slack is 8.429
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     8.429         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     9.788         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case removal slack is 0.692
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.692         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.960         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case minimum pulse width slack is 4.147
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.147         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
    Info (332119):     5.602         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    10.161         0.000 usb_pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    17.208         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    17.440         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    99.418         0.000 FPGA_CLK 
Info (332102): Design is not fully constrained for setup requirements
Info (332102): Design is not fully constrained for hold requirements
Info: Quartus II 32-bit TimeQuest Timing Analyzer was successful. 0 errors, 3 warnings
    Info: Peak virtual memory: 546 megabytes
    Info: Processing ended: Sat Mar 28 00:21:49 2015
    Info: Elapsed time: 00:00:18
    Info: Total CPU time (on all processors): 00:00:22


