TimeQuest Timing Analyzer report for atari800core
Sat Nov  8 23:28:20 2014
Quartus II 32-bit Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. TimeQuest Timing Analyzer Summary
  3. Parallel Compilation
  4. SDC File List
  5. Clocks
  6. Slow 1200mV 85C Model Fmax Summary
  7. Timing Closure Recommendations
  8. Slow 1200mV 85C Model Setup Summary
  9. Slow 1200mV 85C Model Hold Summary
 10. Slow 1200mV 85C Model Recovery Summary
 11. Slow 1200mV 85C Model Removal Summary
 12. Slow 1200mV 85C Model Minimum Pulse Width Summary
 13. Slow 1200mV 85C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 14. Slow 1200mV 85C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 15. Slow 1200mV 85C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 16. Slow 1200mV 85C Model Setup: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 17. Slow 1200mV 85C Model Setup: 'altera_reserved_tck'
 18. Slow 1200mV 85C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 19. Slow 1200mV 85C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 20. Slow 1200mV 85C Model Hold: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 21. Slow 1200mV 85C Model Hold: 'altera_reserved_tck'
 22. Slow 1200mV 85C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 23. Slow 1200mV 85C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 24. Slow 1200mV 85C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 25. Slow 1200mV 85C Model Recovery: 'altera_reserved_tck'
 26. Slow 1200mV 85C Model Recovery: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 27. Slow 1200mV 85C Model Removal: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 28. Slow 1200mV 85C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 29. Slow 1200mV 85C Model Removal: 'altera_reserved_tck'
 30. Slow 1200mV 85C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 31. Slow 1200mV 85C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 32. Slow 1200mV 85C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 33. Slow 1200mV 85C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 34. Slow 1200mV 85C Model Minimum Pulse Width: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[1]'
 35. Slow 1200mV 85C Model Minimum Pulse Width: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 36. Slow 1200mV 85C Model Minimum Pulse Width: 'altera_reserved_tck'
 37. Slow 1200mV 85C Model Minimum Pulse Width: 'FPGA_CLK'
 38. Setup Times
 39. Hold Times
 40. Clock to Output Times
 41. Minimum Clock to Output Times
 42. Output Enable Times
 43. Minimum Output Enable Times
 44. Output Disable Times
 45. Minimum Output Disable Times
 46. Slow 1200mV 85C Model Metastability Report
 47. Slow 1200mV 0C Model Fmax Summary
 48. Slow 1200mV 0C Model Setup Summary
 49. Slow 1200mV 0C Model Hold Summary
 50. Slow 1200mV 0C Model Recovery Summary
 51. Slow 1200mV 0C Model Removal Summary
 52. Slow 1200mV 0C Model Minimum Pulse Width Summary
 53. Slow 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 54. Slow 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 55. Slow 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 56. Slow 1200mV 0C Model Setup: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 57. Slow 1200mV 0C Model Setup: 'altera_reserved_tck'
 58. Slow 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 59. Slow 1200mV 0C Model Hold: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 60. Slow 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 61. Slow 1200mV 0C Model Hold: 'altera_reserved_tck'
 62. Slow 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 63. Slow 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 64. Slow 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 65. Slow 1200mV 0C Model Recovery: 'altera_reserved_tck'
 66. Slow 1200mV 0C Model Recovery: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 67. Slow 1200mV 0C Model Removal: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 68. Slow 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 69. Slow 1200mV 0C Model Removal: 'altera_reserved_tck'
 70. Slow 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 71. Slow 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 72. Slow 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 73. Slow 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 74. Slow 1200mV 0C Model Minimum Pulse Width: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[1]'
 75. Slow 1200mV 0C Model Minimum Pulse Width: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 76. Slow 1200mV 0C Model Minimum Pulse Width: 'altera_reserved_tck'
 77. Slow 1200mV 0C Model Minimum Pulse Width: 'FPGA_CLK'
 78. Setup Times
 79. Hold Times
 80. Clock to Output Times
 81. Minimum Clock to Output Times
 82. Output Enable Times
 83. Minimum Output Enable Times
 84. Output Disable Times
 85. Minimum Output Disable Times
 86. Slow 1200mV 0C Model Metastability Report
 87. Fast 1200mV 0C Model Setup Summary
 88. Fast 1200mV 0C Model Hold Summary
 89. Fast 1200mV 0C Model Recovery Summary
 90. Fast 1200mV 0C Model Removal Summary
 91. Fast 1200mV 0C Model Minimum Pulse Width Summary
 92. Fast 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 93. Fast 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 94. Fast 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 95. Fast 1200mV 0C Model Setup: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 96. Fast 1200mV 0C Model Setup: 'altera_reserved_tck'
 97. Fast 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 98. Fast 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 99. Fast 1200mV 0C Model Hold: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
100. Fast 1200mV 0C Model Hold: 'altera_reserved_tck'
101. Fast 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
102. Fast 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
103. Fast 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
104. Fast 1200mV 0C Model Recovery: 'altera_reserved_tck'
105. Fast 1200mV 0C Model Recovery: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
106. Fast 1200mV 0C Model Removal: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
107. Fast 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
108. Fast 1200mV 0C Model Removal: 'altera_reserved_tck'
109. Fast 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
110. Fast 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
111. Fast 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
112. Fast 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
113. Fast 1200mV 0C Model Minimum Pulse Width: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[1]'
114. Fast 1200mV 0C Model Minimum Pulse Width: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
115. Fast 1200mV 0C Model Minimum Pulse Width: 'altera_reserved_tck'
116. Fast 1200mV 0C Model Minimum Pulse Width: 'FPGA_CLK'
117. Setup Times
118. Hold Times
119. Clock to Output Times
120. Minimum Clock to Output Times
121. Output Enable Times
122. Minimum Output Enable Times
123. Output Disable Times
124. Minimum Output Disable Times
125. Fast 1200mV 0C Model Metastability Report
126. Multicorner Timing Analysis Summary
127. Setup Times
128. Hold Times
129. Clock to Output Times
130. Minimum Clock to Output Times
131. Board Trace Model Assignments
132. Input Transition Times
133. Signal Integrity Metrics (Slow 1200mv 0c Model)
134. Signal Integrity Metrics (Slow 1200mv 85c Model)
135. Signal Integrity Metrics (Fast 1200mv 0c Model)
136. Setup Transfers
137. Hold Transfers
138. Recovery Transfers
139. Removal Transfers
140. Report TCCS
141. Report RSKM
142. Unconstrained Paths
143. TimeQuest Timing Analyzer Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2013 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
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Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+----------------------------------------------------------------------------------------+
; TimeQuest Timing Analyzer Summary                                                      ;
+--------------------+-------------------------------------------------------------------+
; Quartus II Version ; Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition ;
; Revision Name      ; atari800core                                                      ;
; Device Family      ; Cyclone IV E                                                      ;
; Device Name        ; EP4CE15E22C7                                                      ;
; Timing Models      ; Final                                                             ;
; Delay Model        ; Combined                                                          ;
; Rise/Fall Delays   ; Enabled                                                           ;
+--------------------+-------------------------------------------------------------------+


+------------------------------------------+
; Parallel Compilation                     ;
+----------------------------+-------------+
; Processors                 ; Number      ;
+----------------------------+-------------+
; Number detected on machine ; 4           ;
; Maximum allowed            ; 2           ;
;                            ;             ;
; Average used               ; 1.19        ;
; Maximum used               ; 2           ;
;                            ;             ;
; Usage by Processor         ; % Time Used ;
;     Processor 1            ; 100.0%      ;
;     Processor 2            ;  18.6%      ;
;     Processors 3-4         ;   0.0%      ;
+----------------------------+-------------+


+------------------------------------------------------+
; SDC File List                                        ;
+------------------+--------+--------------------------+
; SDC File Path    ; Status ; Read at                  ;
+------------------+--------+--------------------------+
; atari800core.sdc ; OK     ; Sat Nov  8 23:27:40 2014 ;
+------------------+--------+--------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clocks                                                                                                                                                                                                                                                                                                                                                                                                                                                         ;
+--------------------------------------------------------------------------------+-----------+---------+------------+-------+---------+------------+-----------+-------------+-------+--------+-----------+------------+----------+------------------------------------------------------+----------------------------------------------------------------------------------+------------------------------------------------------------------------------------+
; Clock Name                                                                     ; Type      ; Period  ; Frequency  ; Rise  ; Fall    ; Duty Cycle ; Divide by ; Multiply by ; Phase ; Offset ; Edge List ; Edge Shift ; Inverted ; Master                                               ; Source                                                                           ; Targets                                                                            ;
+--------------------------------------------------------------------------------+-----------+---------+------------+-------+---------+------------+-----------+-------------+-------+--------+-----------+------------+----------+------------------------------------------------------+----------------------------------------------------------------------------------+------------------------------------------------------------------------------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Generated ; 11.640  ; 85.91 MHz  ; 0.000 ; 5.820   ; 50.00      ; 1         ; 3           ;       ;        ;           ;            ; false    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0] ; { \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] } ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Generated ; 34.920  ; 28.64 MHz  ; 0.000 ; 17.460  ; 50.00      ; 1         ; 1           ;       ;        ;           ;            ; false    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0] ; { \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] } ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ; Generated ; 11.640  ; 85.91 MHz  ; 7.638 ; 13.458  ; 50.00      ; 1         ; 3           ; 236.2 ;        ;           ;            ; false    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0] ; { \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] } ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Generated ; 8.730   ; 114.55 MHz ; 0.000 ; 4.365   ; 50.00      ; 1         ; 4           ;       ;        ;           ;            ; false    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0] ; { \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] } ;
; altera_reserved_tck                                                            ; Base      ; 100.000 ; 10.0 MHz   ; 0.000 ; 50.000  ;            ;           ;             ;       ;        ;           ;            ;          ;                                                      ;                                                                                  ; { altera_reserved_tck }                                                            ;
; FPGA_CLK                                                                       ; Base      ; 200.000 ; 5.0 MHz    ; 0.000 ; 100.000 ;            ;           ;             ;       ;        ;           ;            ;          ;                                                      ;                                                                                  ; { FPGA_CLK }                                                                       ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; Generated ; 66.666  ; 15.0 MHz   ; 0.000 ; 33.333  ; 50.00      ; 1         ; 3           ;       ;        ;           ;            ; false    ; FPGA_CLK                                             ; mcc_pll3|altpll_component|auto_generated|pll1|inclk[0]                           ; { mcc_pll3|altpll_component|auto_generated|pll1|clk[0] }                           ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[1]                           ; Generated ; 34.920  ; 28.64 MHz  ; 0.000 ; 17.460  ; 50.00      ; 11        ; 63          ;       ;        ;           ;            ; false    ; FPGA_CLK                                             ; mcc_pll3|altpll_component|auto_generated|pll1|inclk[0]                           ; { mcc_pll3|altpll_component|auto_generated|pll1|clk[1] }                           ;
+--------------------------------------------------------------------------------+-----------+---------+------------+-------+---------+------------+-----------+-------------+-------+--------+-----------+------------+----------+------------------------------------------------------+----------------------------------------------------------------------------------+------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Fmax Summary                                                                                   ;
+------------+-----------------+--------------------------------------------------------------------------------+------+
; Fmax       ; Restricted Fmax ; Clock Name                                                                     ; Note ;
+------------+-----------------+--------------------------------------------------------------------------------+------+
; 44.24 MHz  ; 44.24 MHz       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;      ;
; 66.89 MHz  ; 66.89 MHz       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;      ;
; 90.79 MHz  ; 90.79 MHz       ; altera_reserved_tck                                                            ;      ;
; 132.52 MHz ; 132.52 MHz      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;      ;
; 212.95 MHz ; 212.95 MHz      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;      ;
+------------+-----------------+--------------------------------------------------------------------------------+------+
This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods.  FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock.  Paths of different clocks, including generated clocks, are ignored.  For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.


----------------------------------
; Timing Closure Recommendations ;
----------------------------------
HTML report is unavailable in plain text report export.


+---------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup Summary                                                                     ;
+--------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                          ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; -3.960 ; -367.875      ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.198 ; -0.300        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 4.034  ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 25.858 ; 0.000         ;
; altera_reserved_tck                                                            ; 44.493 ; 0.000         ;
+--------------------------------------------------------------------------------+--------+---------------+


+--------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold Summary                                                                     ;
+--------------------------------------------------------------------------------+-------+---------------+
; Clock                                                                          ; Slack ; End Point TNS ;
+--------------------------------------------------------------------------------+-------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.346 ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.353 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 0.394 ; 0.000         ;
; altera_reserved_tck                                                            ; 0.413 ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.414 ; 0.000         ;
+--------------------------------------------------------------------------------+-------+---------------+


+---------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery Summary                                                                  ;
+--------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                          ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 5.876  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 7.996  ; 0.000         ;
; altera_reserved_tck                                                            ; 48.335 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 63.571 ; 0.000         ;
+--------------------------------------------------------------------------------+--------+---------------+


+---------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal Summary                                                                   ;
+--------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                          ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------------------+--------+---------------+
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; -0.003 ; -0.019        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 1.435  ; 0.000         ;
; altera_reserved_tck                                                            ; 1.453  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 2.322  ; 0.000         ;
+--------------------------------------------------------------------------------+--------+---------------+


+---------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width Summary                                                       ;
+--------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                          ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 4.091  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.547  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.179 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[1]                           ; 17.427 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 33.028 ; 0.000         ;
; altera_reserved_tck                                                            ; 49.482 ; 0.000         ;
; FPGA_CLK                                                                       ; 99.796 ; 0.000         ;
+--------------------------------------------------------------------------------+--------+---------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                        ;
+--------+--------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                        ; To Node                                                                                                                 ; Launch Clock                                         ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; -3.960 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[28]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.548     ; 5.514      ;
; -3.932 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[28]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.548     ; 5.486      ;
; -3.871 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[27]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.548     ; 5.425      ;
; -3.862 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[28]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.548     ; 5.416      ;
; -3.861 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.554     ; 5.409      ;
; -3.782 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[27]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.548     ; 5.336      ;
; -3.778 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.554     ; 5.326      ;
; -3.754 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[27]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.548     ; 5.308      ;
; -3.750 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.554     ; 5.298      ;
; -3.738 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[27]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.548     ; 5.292      ;
; -3.729 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[28]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.548     ; 5.283      ;
; -3.728 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.554     ; 5.276      ;
; -3.715 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.553     ; 5.264      ;
; -3.677 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[22]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.556     ; 5.223      ;
; -3.666 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.216     ; 5.552      ;
; -3.666 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[26]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.551     ; 5.217      ;
; -3.649 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[22]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.556     ; 5.195      ;
; -3.643 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[30]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.553     ; 5.192      ;
; -3.638 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[26]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.551     ; 5.189      ;
; -3.631 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.553     ; 5.180      ;
; -3.624 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.216     ; 5.510      ;
; -3.615 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[30]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.553     ; 5.164      ;
; -3.603 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.553     ; 5.152      ;
; -3.582 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.553     ; 5.131      ;
; -3.564 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[0]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.203     ; 5.463      ;
; -3.560 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.216     ; 5.446      ;
; -3.547 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[0]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.190     ; 5.459      ;
; -3.545 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[22]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.556     ; 5.091      ;
; -3.543 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|doReg[1]    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.573     ; 5.072      ;
; -3.540 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[0]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.570     ; 5.072      ;
; -3.534 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[24]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.551     ; 5.085      ;
; -3.534 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[26]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.551     ; 5.085      ;
; -3.532 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.182     ; 5.452      ;
; -3.528 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[30]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.553     ; 5.077      ;
; -3.522 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[0]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.203     ; 5.421      ;
; -3.512 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.203     ; 5.411      ;
; -3.506 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[24]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.551     ; 5.057      ;
; -3.505 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[0]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.190     ; 5.417      ;
; -3.502 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[0]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.185     ; 5.419      ;
; -3.500 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.185     ; 5.417      ;
; -3.500 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[1]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.570     ; 5.032      ;
; -3.497 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[0]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.570     ; 5.029      ;
; -3.486 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.576     ; 5.012      ;
; -3.485 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.190     ; 5.397      ;
; -3.476 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[23]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.556     ; 5.022      ;
; -3.452 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.216     ; 5.338      ;
; -3.451 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[0]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.185     ; 5.368      ;
; -3.444 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.576     ; 4.970      ;
; -3.412 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[20]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.549     ; 4.965      ;
; -3.412 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[22]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.556     ; 4.958      ;
; -3.412 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|doReg[1]    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.573     ; 4.941      ;
; -3.402 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[24]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.551     ; 4.953      ;
; -3.401 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[26]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.551     ; 4.952      ;
; -3.401 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.182     ; 5.321      ;
; -3.395 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[30]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.553     ; 4.944      ;
; -3.384 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[20]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.549     ; 4.937      ;
; -3.381 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.203     ; 5.280      ;
; -3.369 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.185     ; 5.286      ;
; -3.369 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[1]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.570     ; 4.901      ;
; -3.365 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[23]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.556     ; 4.911      ;
; -3.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.576     ; 4.890      ;
; -3.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[21]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.556     ; 4.910      ;
; -3.357 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.173     ; 5.286      ;
; -3.354 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.190     ; 5.266      ;
; -3.352 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.180     ; 5.274      ;
; -3.349 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.173     ; 5.278      ;
; -3.348 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[23]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.556     ; 4.894      ;
; -3.345 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.173     ; 5.274      ;
; -3.343 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[23]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.556     ; 4.889      ;
; -3.335 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.138     ; 5.299      ;
; -3.323 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[25]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.554     ; 4.871      ;
; -3.321 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.216     ; 5.207      ;
; -3.321 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[20]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.549     ; 4.874      ;
; -3.318 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[18] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.572     ; 4.848      ;
; -3.310 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.138     ; 5.274      ;
; -3.306 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.173     ; 5.235      ;
; -3.299 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.182     ; 5.219      ;
; -3.298 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.167     ; 5.233      ;
; -3.290 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.563     ; 4.829      ;
; -3.281 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.173     ; 5.210      ;
; -3.271 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.182     ; 5.191      ;
; -3.270 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[41] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.180     ; 5.192      ;
; -3.269 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[24]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.551     ; 4.820      ;
; -3.268 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.138     ; 5.232      ;
; -3.261 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_cache_reg[2]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.560     ; 4.803      ;
; -3.252 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[21]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.556     ; 4.798      ;
; -3.247 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.203     ; 5.146      ;
; -3.247 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.167     ; 5.182      ;
; -3.236 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[21]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.556     ; 4.782      ;
; -3.233 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.576     ; 4.759      ;
; -3.233 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.138     ; 5.197      ;
; -3.232 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.173     ; 5.161      ;
; -3.231 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[21]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.556     ; 4.777      ;
; -3.230 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|doReg[0]    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.572     ; 4.760      ;
; -3.229 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.182     ; 5.149      ;
; -3.226 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.210     ; 5.118      ;
; -3.219 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.180     ; 5.141      ;
; -3.216 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.138     ; 5.180      ;
; -3.214 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.138     ; 5.178      ;
; -3.213 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[25]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.554     ; 4.761      ;
+--------+--------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                                        ;
+--------+---------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                                                                         ; To Node                                      ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+--------+---------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; -0.198 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.170     ; 11.551     ;
; -0.102 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.170     ; 11.455     ;
; -0.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.170     ; 11.412     ;
; -0.057 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.170     ; 11.410     ;
; -0.013 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.170     ; 11.366     ;
; -0.011 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.170     ; 11.364     ;
; 0.097  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.170     ; 11.256     ;
; 0.126  ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.165     ; 11.232     ;
; 0.148  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.169     ; 11.206     ;
; 0.150  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.169     ; 11.204     ;
; 0.151  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[13]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.159     ; 11.213     ;
; 0.193  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.170     ; 11.160     ;
; 0.200  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.165     ; 11.158     ;
; 0.238  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.159     ; 11.126     ;
; 0.279  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.173     ; 11.071     ;
; 0.281  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.174     ; 11.068     ;
; 0.315  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_direction_reg[5]                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.188     ; 11.020     ;
; 0.325  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.161     ; 11.037     ;
; 0.327  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.174     ; 11.022     ;
; 0.332  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.161     ; 11.030     ;
; 0.334  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.159     ; 11.030     ;
; 0.338  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[8]                             ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.159     ; 11.026     ;
; 0.345  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.173     ; 11.005     ;
; 0.361  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.174     ; 10.988     ;
; 0.361  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[10]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.161     ; 11.001     ;
; 0.371  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.173     ; 10.979     ;
; 0.373  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.173     ; 10.977     ;
; 0.380  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[11]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.159     ; 10.984     ;
; 0.407  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.174     ; 10.942     ;
; 0.432  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.174     ; 10.917     ;
; 0.443  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[12]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.159     ; 10.921     ;
; 0.469  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.165     ; 10.889     ;
; 0.470  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[11]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.176     ; 10.877     ;
; 0.472  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.173     ; 10.878     ;
; 0.487  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]                             ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.159     ; 10.877     ;
; 0.490  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.182     ; 10.851     ;
; 0.492  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.169     ; 10.862     ;
; 0.504  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[5]                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.189     ; 10.830     ;
; 0.528  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[8]                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.178     ; 10.817     ;
; 0.532  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 10.819     ;
; 0.535  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[13]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.162     ; 10.826     ;
; 0.545  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.173     ; 10.805     ;
; 0.548  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.165     ; 10.810     ;
; 0.553  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 10.798     ;
; 0.557  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.173     ; 10.793     ;
; 0.574  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.173     ; 10.776     ;
; 0.579  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.182     ; 10.762     ;
; 0.581  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.182     ; 10.760     ;
; 0.582  ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.165     ; 10.776     ;
; 0.589  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_direction_reg[4]                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.159     ; 10.775     ;
; 0.594  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[8]                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.169     ; 10.760     ;
; 0.605  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[9]                             ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.161     ; 10.757     ;
; 0.613  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.174     ; 10.736     ;
; 0.615  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[0]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.173     ; 10.735     ;
; 0.623  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.158     ; 10.742     ;
; 0.627  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.168     ; 10.728     ;
; 0.634  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.165     ; 10.724     ;
; 0.667  ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.168     ; 10.688     ;
; 0.682  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.182     ; 10.659     ;
; 0.693  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|state[1]                        ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.594     ; 10.236     ;
; 0.708  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.164     ; 10.651     ;
; 0.711  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.177     ; 10.635     ;
; 0.713  ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[17]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.175     ; 10.635     ;
; 0.718  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.162     ; 10.643     ;
; 0.722  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[8]                             ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.162     ; 10.639     ;
; 0.722  ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[18]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.175     ; 10.626     ;
; 0.728  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.164     ; 10.631     ;
; 0.732  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[7]                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.621     ; 10.170     ;
; 0.736  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.624     ; 10.163     ;
; 0.740  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.181     ; 10.602     ;
; 0.743  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[13]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 10.609     ;
; 0.745  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.177     ; 10.601     ;
; 0.745  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[12]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.169     ; 10.609     ;
; 0.745  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[10]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.164     ; 10.614     ;
; 0.748  ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.158     ; 10.617     ;
; 0.756  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[0]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.173     ; 10.594     ;
; 0.758  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[0]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.173     ; 10.592     ;
; 0.763  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.169     ; 10.591     ;
; 0.764  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[11]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.162     ; 10.597     ;
; 0.772  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.182     ; 10.569     ;
; 0.774  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.182     ; 10.567     ;
; 0.784  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[14]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.157     ; 10.582     ;
; 0.785  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.182     ; 10.556     ;
; 0.796  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.177     ; 10.550     ;
; 0.801  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[14]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.157     ; 10.565     ;
; 0.803  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.177     ; 10.543     ;
; 0.827  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[12]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.162     ; 10.534     ;
; 0.834  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[21]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.160     ; 10.529     ;
; 0.836  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[22]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.160     ; 10.527     ;
; 0.844  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]                             ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.162     ; 10.517     ;
; 0.850  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[13]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.159     ; 10.514     ;
; 0.854  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[22]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.160     ; 10.509     ;
; 0.854  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[11]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.179     ; 10.490     ;
; 0.855  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[18]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.160     ; 10.508     ;
; 0.859  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.169     ; 10.495     ;
; 0.876  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 10.475     ;
; 0.877  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[0]                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.166     ; 10.480     ;
; 0.884  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[10]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.178     ; 10.461     ;
; 0.894  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[5]                             ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.588     ; 10.041     ;
; 0.896  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.168     ; 10.459     ;
+--------+---------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                                             ;
+-------+-------------------------+--------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node               ; To Node      ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------+--------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 4.034 ; svideo_yout_dly2[6]     ; cvbs2_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 4.506      ;
; 4.034 ; svideo_yout_dly2[4]     ; cvbs2_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 4.506      ;
; 4.142 ; svideo_yout_dly2[6]     ; cvbs2_out[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 4.397      ;
; 4.142 ; svideo_yout_dly2[4]     ; cvbs2_out[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 4.397      ;
; 4.313 ; svideo_yout_dly2[2]     ; cvbs2_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 4.227      ;
; 4.320 ; svideo_yout_dly2[7]     ; cvbs2_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 4.220      ;
; 4.326 ; svideo_yout_dly2[6]     ; cvbs2_out[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 4.213      ;
; 4.335 ; svideo_yout_dly2[4]     ; cvbs2_out[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 4.204      ;
; 4.347 ; svideo_yout_dly2[3]     ; cvbs2_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 4.193      ;
; 4.354 ; svideo_yout_dly2[6]     ; cvbs2_out[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 4.185      ;
; 4.358 ; svideo_yout_dly2[5]     ; cvbs2_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 4.182      ;
; 4.358 ; svideo_yout_dly2[4]     ; cvbs2_out[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 4.181      ;
; 4.379 ; svideo_yout_dly2[6]     ; cvbs2_out[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 4.160      ;
; 4.379 ; svideo_yout_dly2[4]     ; cvbs2_out[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 4.160      ;
; 4.411 ; svideo_yout_dly2[6]     ; cvbs2_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 4.126      ;
; 4.411 ; svideo_yout_dly2[4]     ; cvbs2_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 4.126      ;
; 4.421 ; svideo_yout_dly2[2]     ; cvbs2_out[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 4.118      ;
; 4.428 ; svideo_yout_dly2[7]     ; cvbs2_out[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 4.111      ;
; 4.455 ; svideo_yout_dly2[3]     ; cvbs2_out[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 4.084      ;
; 4.466 ; svideo_yout_dly2[5]     ; cvbs2_out[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 4.073      ;
; 4.621 ; svideo_yout_dly2[2]     ; cvbs2_out[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 3.918      ;
; 4.628 ; svideo_yout_dly2[7]     ; cvbs2_out[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 3.911      ;
; 4.631 ; svideo_yout_dly2[6]     ; cvbs2_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 3.907      ;
; 4.633 ; svideo_yout_dly2[3]     ; cvbs2_out[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 3.906      ;
; 4.634 ; svideo_yout_dly2[5]     ; cvbs2_out[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 3.905      ;
; 4.636 ; svideo_yout_dly2[4]     ; cvbs2_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 3.902      ;
; 4.637 ; svideo_yout_dly2[2]     ; cvbs2_out[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 3.902      ;
; 4.644 ; svideo_yout_dly2[7]     ; cvbs2_out[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 3.895      ;
; 4.658 ; svideo_yout_dly2[2]     ; cvbs2_out[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 3.881      ;
; 4.661 ; svideo_yout_dly2[3]     ; cvbs2_out[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 3.878      ;
; 4.662 ; svideo_yout_dly2[5]     ; cvbs2_out[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 3.877      ;
; 4.665 ; svideo_yout_dly2[7]     ; cvbs2_out[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 3.874      ;
; 4.690 ; svideo_yout_dly2[2]     ; cvbs2_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 3.847      ;
; 4.692 ; svideo_yout_dly2[3]     ; cvbs2_out[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 3.847      ;
; 4.697 ; svideo_yout_dly2[7]     ; cvbs2_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 3.840      ;
; 4.703 ; svideo_yout_dly2[5]     ; cvbs2_out[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 3.836      ;
; 4.723 ; svideo_yout_dly2[6]     ; cvbs2_out[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 3.814      ;
; 4.723 ; svideo_yout_dly2[4]     ; cvbs2_out[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 3.814      ;
; 4.724 ; svideo_yout_dly2[3]     ; cvbs2_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 3.813      ;
; 4.735 ; svideo_yout_dly2[5]     ; cvbs2_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 3.802      ;
; 4.915 ; svideo_yout_dly2[2]     ; cvbs2_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 3.623      ;
; 4.922 ; svideo_yout_dly2[7]     ; cvbs2_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 3.616      ;
; 4.938 ; svideo_yout_dly2[3]     ; cvbs2_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 3.600      ;
; 4.939 ; svideo:svideo|chroma[2] ; cvbs1_out[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 3.594      ;
; 4.939 ; svideo_yout_dly2[5]     ; cvbs2_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 3.599      ;
; 5.002 ; svideo_yout_dly2[2]     ; cvbs2_out[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 3.535      ;
; 5.009 ; svideo_yout_dly2[7]     ; cvbs2_out[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 3.528      ;
; 5.017 ; svideo_yout_dly2[0]     ; cvbs2_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 3.523      ;
; 5.026 ; svideo:svideo|chroma[2] ; cvbs1_out[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 3.507      ;
; 5.027 ; svideo_yout_dly2[1]     ; cvbs2_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 3.513      ;
; 5.036 ; svideo_yout_dly2[3]     ; cvbs2_out[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 3.501      ;
; 5.040 ; svideo_yout_dly2[5]     ; cvbs2_out[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 3.497      ;
; 5.071 ; svideo:svideo|chroma[2] ; cvbs1_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 3.462      ;
; 5.124 ; svideo_yout_dly2[1]     ; cvbs2_out[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 3.415      ;
; 5.125 ; svideo_yout_dly2[0]     ; cvbs2_out[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 3.414      ;
; 5.158 ; svideo:svideo|chroma[2] ; cvbs1_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 3.375      ;
; 5.203 ; svideo:svideo|chroma[2] ; cvbs1_out[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 3.330      ;
; 5.238 ; svideo:svideo|chroma[0] ; cvbs1_out[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 3.295      ;
; 5.270 ; svideo_yout_dly2[1]     ; cvbs2_out[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 3.269      ;
; 5.290 ; svideo:svideo|chroma[2] ; cvbs1_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 3.243      ;
; 5.295 ; svideo:svideo|chroma[1] ; cvbs1_out[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 3.238      ;
; 5.298 ; svideo_yout_dly2[1]     ; cvbs2_out[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 3.241      ;
; 5.314 ; svideo:svideo|chroma[1] ; cvbs1_out[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 3.219      ;
; 5.325 ; svideo_yout_dly2[0]     ; cvbs2_out[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 3.214      ;
; 5.335 ; svideo:svideo|chroma[2] ; cvbs1_out[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 3.198      ;
; 5.341 ; svideo_yout_dly2[0]     ; cvbs2_out[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 3.198      ;
; 5.350 ; svideo_yout_dly2[1]     ; cvbs2_out[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 3.189      ;
; 5.362 ; svideo_yout_dly2[0]     ; cvbs2_out[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 3.177      ;
; 5.370 ; svideo:svideo|chroma[0] ; cvbs1_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 3.163      ;
; 5.378 ; svideo_yout_dly2[1]     ; cvbs2_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 3.159      ;
; 5.389 ; svideo:svideo|chroma[0] ; cvbs1_out[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 3.144      ;
; 5.394 ; svideo_yout_dly2[0]     ; cvbs2_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 3.143      ;
; 5.427 ; svideo:svideo|chroma[1] ; cvbs1_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 3.106      ;
; 5.446 ; svideo:svideo|chroma[1] ; cvbs1_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 3.087      ;
; 5.454 ; svideo:svideo|chroma[4] ; cvbs1_out[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 3.079      ;
; 5.463 ; svideo:svideo|chroma[3] ; cvbs1_out[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 3.070      ;
; 5.477 ; svideo:svideo|chroma[5] ; cvbs1_out[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 3.056      ;
; 5.478 ; svideo:svideo|chroma[8] ; cvbs1_out[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 3.055      ;
; 5.482 ; svideo:svideo|chroma[3] ; cvbs1_out[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 3.051      ;
; 5.496 ; svideo:svideo|chroma[5] ; cvbs1_out[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 3.037      ;
; 5.502 ; svideo:svideo|chroma[0] ; cvbs1_out[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 3.031      ;
; 5.506 ; cvbs1_out[9]            ; cvbs2_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.071     ; 3.036      ;
; 5.521 ; svideo:svideo|chroma[0] ; cvbs1_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 3.012      ;
; 5.559 ; svideo:svideo|chroma[1] ; cvbs1_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 2.974      ;
; 5.575 ; svideo_yout_dly2[1]     ; cvbs2_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 2.963      ;
; 5.578 ; svideo:svideo|chroma[1] ; cvbs1_out[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 2.955      ;
; 5.586 ; svideo:svideo|chroma[4] ; cvbs1_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 2.947      ;
; 5.595 ; svideo:svideo|chroma[3] ; cvbs1_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 2.938      ;
; 5.600 ; svideo:svideo|chroma[6] ; cvbs1_out[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 2.933      ;
; 5.605 ; svideo:svideo|chroma[4] ; cvbs1_out[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 2.928      ;
; 5.605 ; cvbs1_out[4]            ; cvbs2_out[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.072     ; 2.936      ;
; 5.609 ; svideo:svideo|chroma[5] ; cvbs1_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 2.924      ;
; 5.614 ; svideo:svideo|chroma[3] ; cvbs1_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 2.919      ;
; 5.619 ; svideo_yout_dly2[0]     ; cvbs2_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 2.919      ;
; 5.628 ; svideo:svideo|chroma[5] ; cvbs1_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 2.905      ;
; 5.634 ; svideo:svideo|chroma[0] ; cvbs1_out[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 2.899      ;
; 5.653 ; svideo:svideo|chroma[0] ; cvbs1_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 2.880      ;
; 5.676 ; svideo_yout_dly2[1]     ; cvbs2_out[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.076     ; 2.861      ;
; 5.691 ; svideo:svideo|chroma[1] ; cvbs1_out[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 2.842      ;
; 5.702 ; svideo:svideo|chroma[7] ; cvbs1_out[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.195     ; 2.831      ;
+-------+-------------------------+--------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                               ;
+--------+-----------------------------------------------+---------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                     ; To Node                                           ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------+---------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 25.858 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.094     ; 7.369      ;
; 25.858 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.094     ; 7.369      ;
; 25.993 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.094     ; 7.234      ;
; 25.993 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.094     ; 7.234      ;
; 26.028 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.094     ; 7.199      ;
; 26.028 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.094     ; 7.199      ;
; 26.163 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.094     ; 7.064      ;
; 26.163 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.094     ; 7.064      ;
; 26.252 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.094     ; 6.975      ;
; 26.252 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.094     ; 6.975      ;
; 26.314 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[3]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.914      ;
; 26.314 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.914      ;
; 26.317 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.911      ;
; 26.331 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.897      ;
; 26.331 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.897      ;
; 26.332 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[12] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.896      ;
; 26.333 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.895      ;
; 26.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[5]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.861      ;
; 26.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.861      ;
; 26.382 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.094     ; 6.845      ;
; 26.382 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.094     ; 6.845      ;
; 26.387 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.094     ; 6.840      ;
; 26.387 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.094     ; 6.840      ;
; 26.502 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[3]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.726      ;
; 26.503 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.725      ;
; 26.505 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.723      ;
; 26.517 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.094     ; 6.710      ;
; 26.517 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.094     ; 6.710      ;
; 26.530 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.698      ;
; 26.530 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.698      ;
; 26.531 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[12] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.697      ;
; 26.532 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.696      ;
; 26.533 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[5]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.691      ;
; 26.533 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.691      ;
; 26.560 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[3]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.668      ;
; 26.561 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.667      ;
; 26.563 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.665      ;
; 26.591 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[5]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.633      ;
; 26.591 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.633      ;
; 26.603 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.094     ; 6.624      ;
; 26.603 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.094     ; 6.624      ;
; 26.606 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.622      ;
; 26.606 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.622      ;
; 26.607 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[12] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.621      ;
; 26.608 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.620      ;
; 26.618 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[10] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.610      ;
; 26.620 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[1]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.608      ;
; 26.621 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[2]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.607      ;
; 26.621 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[14] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.607      ;
; 26.622 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[7]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.606      ;
; 26.642 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.094     ; 6.585      ;
; 26.642 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.094     ; 6.585      ;
; 26.649 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.094     ; 6.578      ;
; 26.649 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.094     ; 6.578      ;
; 26.721 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[3]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.507      ;
; 26.721 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.507      ;
; 26.724 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.504      ;
; 26.726 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[3]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.502      ;
; 26.727 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.501      ;
; 26.729 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.499      ;
; 26.738 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.094     ; 6.489      ;
; 26.738 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.094     ; 6.489      ;
; 26.738 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.490      ;
; 26.738 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.490      ;
; 26.739 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[12] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.489      ;
; 26.740 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.488      ;
; 26.757 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[5]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.467      ;
; 26.757 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.467      ;
; 26.772 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.456      ;
; 26.772 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.456      ;
; 26.773 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[12] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.455      ;
; 26.774 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.454      ;
; 26.784 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.094     ; 6.443      ;
; 26.784 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.094     ; 6.443      ;
; 26.787 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[5]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.437      ;
; 26.787 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.437      ;
; 26.812 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.094     ; 6.415      ;
; 26.812 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.094     ; 6.415      ;
; 26.817 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[10] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.411      ;
; 26.819 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[1]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.409      ;
; 26.820 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[2]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.408      ;
; 26.820 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[14] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.408      ;
; 26.821 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[7]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.407      ;
; 26.856 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[3]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.372      ;
; 26.857 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.371      ;
; 26.859 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.369      ;
; 26.873 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[3]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.355      ;
; 26.874 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.354      ;
; 26.876 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.352      ;
; 26.887 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[5]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.337      ;
; 26.887 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.337      ;
; 26.890 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[10] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.338      ;
; 26.891 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[1]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.337      ;
; 26.891 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.337      ;
; 26.891 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.337      ;
; 26.892 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[2]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.336      ;
; 26.892 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[14] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.336      ;
; 26.892 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[12] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.336      ;
; 26.893 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[7]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.335      ;
; 26.893 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.093     ; 6.335      ;
+--------+-----------------------------------------------+---------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                                                                                                                                   ;
+--------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                                                                                                                                        ; To Node                                                                                                                                                             ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+--------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 44.493 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                              ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.171      ; 5.676      ;
; 45.333 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.197      ; 4.862      ;
; 45.428 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.182      ; 4.752      ;
; 45.517 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.197      ; 4.678      ;
; 45.519 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.182      ; 4.661      ;
; 45.546 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                              ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.176      ; 4.628      ;
; 45.895 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                   ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.196      ; 4.299      ;
; 46.153 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                   ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.196      ; 4.041      ;
; 46.245 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.192      ; 3.945      ;
; 46.329 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.197      ; 3.866      ;
; 46.396 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.180      ; 3.782      ;
; 46.629 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.180      ; 3.549      ;
; 46.730 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.180      ; 3.448      ;
; 46.919 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.181      ; 3.260      ;
; 47.055 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.183      ; 3.126      ;
; 47.128 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[3]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.195      ; 3.065      ;
; 47.191 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.198      ; 3.005      ;
; 47.278 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[0]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.192      ; 2.912      ;
; 47.300 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.182      ; 2.880      ;
; 47.332 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.180      ; 2.846      ;
; 47.438 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.198      ; 2.758      ;
; 47.688 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo_bypass_reg                                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.183      ; 2.493      ;
; 47.838 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|design_hash_reg[0]                                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.193      ; 2.353      ;
; 47.895 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[0]                                                                                                                               ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.183      ; 2.286      ;
; 93.993 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.080     ; 5.925      ;
; 93.993 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.080     ; 5.925      ;
; 93.993 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.080     ; 5.925      ;
; 93.993 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.080     ; 5.925      ;
; 93.993 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.080     ; 5.925      ;
; 93.993 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.080     ; 5.925      ;
; 93.993 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.080     ; 5.925      ;
; 93.993 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.080     ; 5.925      ;
; 93.993 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.080     ; 5.925      ;
; 94.802 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.093     ; 5.103      ;
; 94.802 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.093     ; 5.103      ;
; 94.802 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.093     ; 5.103      ;
; 94.802 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.093     ; 5.103      ;
; 94.802 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.093     ; 5.103      ;
; 94.802 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.093     ; 5.103      ;
; 94.802 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.093     ; 5.103      ;
; 94.802 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.093     ; 5.103      ;
; 94.973 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 4.951      ;
; 94.973 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 4.951      ;
; 94.973 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 4.951      ;
; 94.973 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 4.951      ;
; 94.973 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 4.951      ;
; 94.973 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 4.951      ;
; 94.973 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 4.951      ;
; 94.973 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 4.951      ;
; 94.973 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 4.951      ;
; 94.997 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.352     ; 4.649      ;
; 95.043 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 4.902      ;
; 95.043 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 4.902      ;
; 95.043 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 4.902      ;
; 95.043 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 4.902      ;
; 95.043 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 4.902      ;
; 95.093 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 4.831      ;
; 95.093 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 4.831      ;
; 95.093 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 4.831      ;
; 95.093 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 4.831      ;
; 95.093 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 4.831      ;
; 95.093 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 4.831      ;
; 95.093 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 4.831      ;
; 95.093 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 4.831      ;
; 95.093 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 4.831      ;
; 95.162 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.352     ; 4.484      ;
; 95.173 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.352     ; 4.473      ;
; 95.181 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.352     ; 4.465      ;
; 95.193 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 4.739      ;
; 95.193 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 4.739      ;
; 95.193 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 4.739      ;
; 95.193 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 4.739      ;
; 95.193 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 4.739      ;
; 95.193 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 4.739      ;
; 95.193 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 4.739      ;
; 95.193 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 4.739      ;
; 95.201 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.352     ; 4.445      ;
; 95.235 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 4.710      ;
; 95.235 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 4.710      ;
; 95.235 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 4.710      ;
; 95.235 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 4.710      ;
; 95.235 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 4.710      ;
; 95.245 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.356     ; 4.397      ;
; 95.266 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.352     ; 4.380      ;
; 95.302 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.356     ; 4.340      ;
; 95.331 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 4.593      ;
; 95.331 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 4.593      ;
; 95.331 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 4.593      ;
; 95.331 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 4.593      ;
; 95.331 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 4.593      ;
; 95.331 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 4.593      ;
; 95.331 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 4.593      ;
; 95.331 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 4.593      ;
; 95.331 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 4.593      ;
; 95.334 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.352     ; 4.312      ;
; 95.347 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.352     ; 4.299      ;
; 95.360 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 4.563      ;
; 95.360 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 4.563      ;
; 95.360 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 4.563      ;
; 95.360 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 4.563      ;
+--------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                   ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                                                       ; To Node                                                                                                                                                                                                                                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.346 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[6]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.435      ; 1.003      ;
; 0.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.004      ;
; 0.353 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[3]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.435      ; 1.010      ;
; 0.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[7]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.013      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vscrol_raw_reg[2]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.016      ;
; 0.364 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vscrol_raw_reg[0]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.018      ;
; 0.373 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[5]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.027      ;
; 0.373 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[2]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.027      ;
; 0.378 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~portb_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 1.030      ;
; 0.378 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.429      ; 1.029      ;
; 0.378 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vscrol_raw_reg[3]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.032      ;
; 0.382 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.035      ;
; 0.382 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[5]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.036      ;
; 0.383 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[0]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.037      ;
; 0.383 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[3]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.037      ;
; 0.384 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[7]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.038      ;
; 0.386 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp2_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.041      ;
; 0.387 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.042      ;
; 0.388 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.042      ;
; 0.389 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.043      ;
; 0.389 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[1]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.043      ;
; 0.391 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp0_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.434      ; 1.047      ;
; 0.393 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.047      ;
; 0.395 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|state[1]                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|state[1]                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.088      ; 0.669      ;
; 0.395 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|state[2]                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|state[2]                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.088      ; 0.669      ;
; 0.395 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp2_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.050      ;
; 0.397 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.051      ;
; 0.397 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.052      ;
; 0.397 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[5]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.052      ;
; 0.398 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmien_raw_reg[6]                                                                                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.052      ;
; 0.398 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp0_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.434      ; 1.054      ;
; 0.400 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.055      ;
; 0.401 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.055      ;
; 0.401 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.056      ;
; 0.401 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp2_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.056      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp0_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.434      ; 1.058      ;
; 0.403 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.057      ;
; 0.403 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp2_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.058      ;
; 0.404 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizep1_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.427      ; 1.053      ;
; 0.404 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.059      ;
; 0.405 ; svideo:svideo|ampl_U[1]                                                                                                                                                                                         ; svideo:svideo|sin_cos:tab_inst|sin_rom:sin_inst|altsyncram:altsyncram_component|altsyncram_r842:auto_generated|ram_block1a3~porta_address_reg0                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.421      ; 1.048      ;
; 0.406 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[1]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.060      ;
; 0.406 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmien_raw_reg[7]                                                                                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.060      ;
; 0.406 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.060      ;
; 0.406 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[2]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.060      ;
; 0.406 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[4]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.060      ;
; 0.406 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.061      ;
; 0.407 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.061      ;
; 0.407 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[5]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.061      ;
; 0.408 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm1_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.062      ;
; 0.409 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[6]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.063      ;
; 0.411 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_ip_framing_reg                                                                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_ip_framing_reg                                                                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.411 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[5]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[5]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.411 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_ip_overrun_reg                                                                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_ip_overrun_reg                                                                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.411 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vscrol_raw_reg[1]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.065      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|insn.dec_insn_fetch                                                                                                                                       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|insn.dec_insn_fetch                                                                                                                                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|idim_r                                                                                                                                                    ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|idim_r                                                                                                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[16]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[16]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[22]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[22]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_clock_reg                                                                                                                                            ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_clock_reg                                                                                                                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[2]                                                                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[2]                                                                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[0]                                                                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[0]                                                                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[1]                                                                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[1]                                                                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[3]                                                                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[3]                                                                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[1]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[1]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[1]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[1]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[0]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[0]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[2]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[2]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[3]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[3]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[6]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[6]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[4]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[4]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[5]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[5]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[7]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[7]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[0]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[0]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[3]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[3]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[1]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[1]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[2]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[2]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[4]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[4]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[5]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[5]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[6]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[6]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[7]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[7]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0]                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0]                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0]                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0]                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[4]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[4]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[0]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[0]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[1]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[1]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[2]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[2]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[3]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[3]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[6]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[6]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[5]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[5]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[7]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[7]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[0]                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[0]                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_clock_reg                                                                                                                                           ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_clock_reg                                                                                                                                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[3]                                                                                                                                     ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[3]                                                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[2]                                                                                                                                     ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[2]                                                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[1]                                                                                                                                     ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[1]                                                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_shift_reg[9]                                                                                                                                        ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_shift_reg[9]                                                                                                                                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_out_reg                                                                                                                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_out_reg                                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|twotone_reg                                                                                                                                                ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|twotone_reg                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                                                             ;
+-------+---------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                 ; To Node                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.353 ; svideo:svideo|luma[8]     ; svideo:svideo|luma_1[8]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.160      ; 0.719      ;
; 0.440 ; svideo:svideo|luma_1[9]   ; svideo:svideo|luma_2[9]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.695      ;
; 0.441 ; svideo:svideo|luma_1[0]   ; svideo:svideo|luma_2[0]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.696      ;
; 0.441 ; svideo_yout_dly1[6]       ; svideo_yout_dly2[6]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.696      ;
; 0.442 ; svideo_yout_dly1[4]       ; svideo_yout_dly2[4]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.697      ;
; 0.443 ; svideo_yout_dly1[5]       ; svideo_yout_dly2[5]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.698      ;
; 0.501 ; svideo:svideo|luma[6]     ; svideo:svideo|luma_1[6]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.158      ; 0.865      ;
; 0.505 ; svideo:svideo|luma[0]     ; svideo:svideo|luma_1[0]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.160      ; 0.871      ;
; 0.508 ; svideo:svideo|luma[9]     ; svideo:svideo|luma_1[9]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.161      ; 0.875      ;
; 0.524 ; svideo:svideo|luma[5]     ; svideo:svideo|luma_1[5]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.160      ; 0.890      ;
; 0.530 ; svideo:svideo|luma[3]     ; svideo:svideo|luma_1[3]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.161      ; 0.897      ;
; 0.590 ; luma_saturated[9]         ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.068      ; 0.844      ;
; 0.603 ; svideo:svideo|luma_acc[7] ; svideo_yout_dly1[5]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.859      ;
; 0.605 ; svideo:svideo|luma_1[2]   ; svideo:svideo|luma_2[2]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.860      ;
; 0.607 ; svideo:svideo|luma_acc[2] ; svideo_yout_dly1[0]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.863      ;
; 0.608 ; svideo:svideo|luma_1[8]   ; svideo:svideo|luma_2[8]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.863      ;
; 0.610 ; svideo:svideo|luma_1[7]   ; svideo:svideo|luma_2[7]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.865      ;
; 0.611 ; svideo_yout_dly1[0]       ; svideo_yout_dly2[0]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.866      ;
; 0.611 ; svideo_yout_dly1[3]       ; svideo_yout_dly2[3]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.866      ;
; 0.611 ; svideo_yout_dly1[2]       ; svideo_yout_dly2[2]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.866      ;
; 0.612 ; svideo_yout_dly1[1]       ; svideo_yout_dly2[1]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.867      ;
; 0.614 ; svideo_yout_dly1[7]       ; svideo_yout_dly2[7]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.869      ;
; 0.631 ; svideo:svideo|luma_1[1]   ; svideo:svideo|luma_2[1]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.886      ;
; 0.631 ; svideo:svideo|luma_1[3]   ; svideo:svideo|luma_2[3]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.886      ;
; 0.632 ; svideo:svideo|luma_1[5]   ; svideo:svideo|luma_2[5]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.887      ;
; 0.633 ; svideo:svideo|luma_acc[8] ; svideo_yout_dly1[6]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.889      ;
; 0.648 ; svideo:svideo|luma_2[3]   ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.903      ;
; 0.649 ; svideo:svideo|luma_2[7]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.904      ;
; 0.649 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.904      ;
; 0.650 ; svideo:svideo|luma_2[1]   ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.905      ;
; 0.650 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.905      ;
; 0.651 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.906      ;
; 0.653 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.908      ;
; 0.664 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.919      ;
; 0.675 ; svideo:svideo|luma[2]     ; svideo:svideo|luma_1[2]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.161      ; 1.042      ;
; 0.707 ; svideo:svideo|luma[4]     ; svideo:svideo|luma_1[4]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.161      ; 1.074      ;
; 0.710 ; svideo:svideo|luma[2]     ; luma_saturated[2]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.161      ; 1.077      ;
; 0.714 ; svideo:svideo|luma[9]     ; luma_saturated[9]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.161      ; 1.081      ;
; 0.715 ; svideo:svideo|luma[6]     ; luma_saturated[6]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.158      ; 1.079      ;
; 0.740 ; svideo:svideo|luma[0]     ; luma_saturated[0]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.160      ; 1.106      ;
; 0.751 ; svideo:svideo|luma[4]     ; luma_saturated[4]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.161      ; 1.118      ;
; 0.755 ; svideo:svideo|luma[3]     ; luma_saturated[3]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.161      ; 1.122      ;
; 0.776 ; svideo:svideo|luma_acc[4] ; svideo_yout_dly1[2]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.032      ;
; 0.777 ; svideo:svideo|luma_acc[9] ; svideo_yout_dly1[7]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.033      ;
; 0.802 ; luma_saturated[4]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.068      ; 1.056      ;
; 0.804 ; luma_saturated[2]         ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.068      ; 1.058      ;
; 0.810 ; svideo:svideo|luma_acc[3] ; svideo_yout_dly1[1]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.066      ;
; 0.810 ; svideo:svideo|luma_acc[6] ; svideo_yout_dly1[4]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.066      ;
; 0.811 ; svideo:svideo|luma_1[6]   ; svideo:svideo|luma_2[6]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.066      ;
; 0.812 ; svideo:svideo|luma_1[4]   ; svideo:svideo|luma_2[4]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.067      ;
; 0.812 ; svideo:svideo|luma_2[9]   ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.067      ;
; 0.812 ; svideo:svideo|luma_acc[5] ; svideo_yout_dly1[3]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.068      ;
; 0.813 ; luma_saturated[8]         ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.068      ; 1.067      ;
; 0.814 ; luma_saturated[7]         ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.068      ; 1.068      ;
; 0.815 ; luma_saturated[3]         ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.068      ; 1.069      ;
; 0.815 ; svideo:svideo|luma_2[5]   ; svideo:svideo|luma_acc[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.067      ; 1.068      ;
; 0.849 ; luma_saturated[6]         ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.068      ; 1.103      ;
; 0.851 ; luma_saturated[5]         ; cvbs1_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.068      ; 1.105      ;
; 0.964 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.219      ;
; 0.965 ; luma_saturated[1]         ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.220      ;
; 0.966 ; svideo:svideo|luma_2[7]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.221      ;
; 0.966 ; svideo:svideo|luma_2[3]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.221      ;
; 0.966 ; svideo:svideo|luma_2[1]   ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.221      ;
; 0.976 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.231      ;
; 0.977 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.232      ;
; 0.978 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.233      ;
; 0.980 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.235      ;
; 0.981 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.236      ;
; 0.982 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.237      ;
; 0.983 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.238      ;
; 0.985 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.240      ;
; 0.988 ; svideo:svideo|luma[7]     ; luma_saturated[7]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.158      ; 1.352      ;
; 0.996 ; svideo:svideo|luma[1]     ; svideo:svideo|luma_1[1]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.158      ; 1.360      ;
; 1.027 ; svideo:svideo|luma[2]     ; luma_saturated[3]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.161      ; 1.394      ;
; 1.029 ; svideo:svideo|luma[6]     ; luma_saturated[7]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.158      ; 1.393      ;
; 1.046 ; svideo:svideo|luma[5]     ; luma_saturated[5]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.158      ; 1.410      ;
; 1.052 ; svideo:svideo|luma[8]     ; luma_saturated[8]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.158      ; 1.416      ;
; 1.068 ; svideo:svideo|luma[4]     ; luma_saturated[5]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.161      ; 1.435      ;
; 1.072 ; svideo:svideo|luma_2[0]   ; svideo:svideo|luma_acc[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.328      ;
; 1.082 ; svideo:svideo|luma[3]     ; luma_saturated[4]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.161      ; 1.449      ;
; 1.085 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.340      ;
; 1.086 ; luma_saturated[1]         ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.341      ;
; 1.087 ; svideo:svideo|luma[3]     ; luma_saturated[5]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.161      ; 1.454      ;
; 1.087 ; svideo:svideo|luma_2[7]   ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.342      ;
; 1.087 ; svideo:svideo|luma_2[3]   ; svideo:svideo|luma_acc[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.342      ;
; 1.087 ; svideo:svideo|luma_2[1]   ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.342      ;
; 1.090 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.345      ;
; 1.091 ; luma_saturated[1]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.346      ;
; 1.092 ; svideo:svideo|luma_2[3]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.347      ;
; 1.092 ; svideo:svideo|luma_2[1]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.347      ;
; 1.102 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.357      ;
; 1.103 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.358      ;
; 1.104 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.359      ;
; 1.106 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.361      ;
; 1.108 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.363      ;
; 1.109 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.364      ;
; 1.111 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.366      ;
; 1.129 ; luma_saturated[3]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.068      ; 1.383      ;
; 1.130 ; luma_saturated[7]         ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.068      ; 1.384      ;
; 1.131 ; luma_saturated[4]         ; cvbs1_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.068      ; 1.385      ;
+-------+---------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                       ;
+-------+---------------------------------------------------------------------+---------------------------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                           ; To Node                                                             ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------------+---------------------------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 0.394 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 0.669      ;
; 0.412 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[1]                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[2]                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|val                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|val                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[0]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[0]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[1]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[1]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[4]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[4]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[5]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[5]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[2]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[2]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[3]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[3]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[6]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[6]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[7]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[7]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm_previous                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm_previous                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; cntr_reset[5]                                                       ; cntr_reset[5]                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; cntr_reset[6]                                                       ; cntr_reset[6]                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; cntr_reset[1]                                                       ; cntr_reset[1]                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; cntr_reset[2]                                                       ; cntr_reset[2]                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; reset_usbdrv                                                        ; reset_usbdrv                                                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state3                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state3                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[2]                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[2]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state4                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state4                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[0]                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[0]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[3]                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[3]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state2                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state2                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid                    ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[1]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[1]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[2]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[2]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[3]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[3]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_send_com.Idle                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_send_com.Idle                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_send_com.reset_start           ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_send_com.reset_start           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[7]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[7]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[4]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[4]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[5]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[5]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[6]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[6]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[3]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[3]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[2]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[2]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[1]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[1]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[0]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[0]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dp_previous                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dp_previous                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dm_previous                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dm_previous                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte10        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte10        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte11        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte11        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait20                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait20                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte3         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte3         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_available                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_available                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_valid                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_valid                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.getreport_sendpkt1_end  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.getreport_sendpkt1_end  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt1_end ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt1_end ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|val                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|val                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid                    ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.Idle                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.Idle                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.reset_start           ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.reset_start           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|send_frame                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|send_frame                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp_previous                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp_previous                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte9         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte9         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait40                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait40                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.send_getreport_ack_end  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.send_getreport_ack_end  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.start_get_data          ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.start_get_data          ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait21                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait21                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.getreport_sendpkt1_end  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.getreport_sendpkt1_end  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait30                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait30                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte2         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte2         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte4         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte4         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte5         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte5         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte6         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte6         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte7         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte7         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte8         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte8         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|set_command[0]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|set_command[0]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
+-------+---------------------------------------------------------------------+---------------------------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                          ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                                                             ; To Node                                                                                                                                                                                                               ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                                                         ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                                                             ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                                                         ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo_bypass_reg                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo_bypass_reg                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.669      ;
; 0.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[11]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[11]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                             ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.418 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.674      ;
; 0.419 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.674      ;
; 0.419 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.674      ;
; 0.429 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.359      ; 1.010      ;
; 0.432 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|reset_ena_reg                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.688      ;
; 0.438 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.693      ;
; 0.438 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.693      ;
; 0.439 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.695      ;
; 0.440 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[7]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.696      ;
; 0.440 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[1]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[0]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.695      ;
; 0.440 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[9]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.695      ;
; 0.441 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[14]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.696      ;
; 0.441 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.696      ;
; 0.441 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.696      ;
; 0.442 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.697      ;
; 0.443 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.698      ;
; 0.443 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.698      ;
; 0.445 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.701      ;
; 0.445 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.363      ; 1.030      ;
; 0.446 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[2]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[3]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.701      ;
; 0.447 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.703      ;
; 0.447 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.703      ;
; 0.447 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.703      ;
; 0.447 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.703      ;
; 0.448 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.704      ;
; 0.448 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[3]                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[3]                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.704      ;
; 0.448 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[12]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.703      ;
; 0.449 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[9]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[10]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.704      ;
; 0.449 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[3]                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[2]                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.705      ;
; 0.450 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.363      ; 1.035      ;
; 0.451 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.707      ;
; 0.451 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.707      ;
; 0.452 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.708      ;
; 0.452 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.708      ;
; 0.453 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.709      ;
; 0.454 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.709      ;
; 0.454 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.710      ;
; 0.454 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.709      ;
; 0.455 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.711      ;
; 0.460 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|mixer_addr_reg[4]                                                                                                                                       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|mixer_addr_reg[4]                                                                                                                                       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.716      ;
; 0.461 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[4]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[4]                                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.716      ;
; 0.461 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.363      ; 1.046      ;
; 0.463 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[11]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[12]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.718      ;
; 0.463 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.719      ;
; 0.463 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.359      ; 1.044      ;
; 0.463 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[2]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.718      ;
; 0.463 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.718      ;
; 0.464 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.719      ;
; 0.466 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.363      ; 1.051      ;
; 0.468 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.724      ;
; 0.471 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.363      ; 1.056      ;
; 0.473 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.359      ; 1.054      ;
; 0.473 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.363      ; 1.058      ;
; 0.479 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.363      ; 1.064      ;
; 0.495 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.359      ; 1.076      ;
; 0.500 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.356      ; 1.078      ;
; 0.502 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.359      ; 1.083      ;
; 0.504 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.359      ; 1.085      ;
; 0.504 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.363      ; 1.089      ;
; 0.509 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.359      ; 1.090      ;
; 0.523 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.356      ; 1.101      ;
; 0.527 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.359      ; 1.108      ;
; 0.534 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.359      ; 1.115      ;
; 0.540 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.359      ; 1.121      ;
; 0.546 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.359      ; 1.127      ;
; 0.563 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[3]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[2]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.819      ;
; 0.564 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[1]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[0]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.820      ;
; 0.565 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.821      ;
; 0.566 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.821      ;
; 0.566 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                                                                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.822      ;
; 0.575 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.359      ; 1.156      ;
; 0.587 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][3]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.842      ;
; 0.588 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.844      ;
; 0.588 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.843      ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                               ;
+-------+-----------------------------------------------------------------------------------------------------------------+-------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                       ; To Node                                               ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------+-------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.414 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[0]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sdram_ctrl:sdram_controller|r_refr_act                                                                          ; sdram_ctrl:sdram_controller|r_refr_act                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sdram_ctrl:sdram_controller|r_bst_stp[0]                                                                        ; sdram_ctrl:sdram_controller|r_bst_stp[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                                                                        ; sdram_ctrl:sdram_controller|r_rd_bctr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sdram_ctrl:sdram_controller|r_rd_act                                                                            ; sdram_ctrl:sdram_controller|r_rd_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sdram_ctrl:sdram_controller|r_wr_act                                                                            ; sdram_ctrl:sdram_controller|r_wr_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sdram_request_complete_reg                                                                                      ; sdram_request_complete_reg                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.415 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                                                                      ; sdram_ctrl:sdram_controller|r_init_tmr[10]            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 0.669      ;
; 0.415 ; sdram_ctrl:sdram_controller|r_init_fsm[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[1]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 0.669      ;
; 0.415 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                           ; sdram_ctrl:sdram_controller|sdram_rdy                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 0.669      ;
; 0.419 ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                                                                        ; sdram_ctrl:sdram_controller|r_wr_bctr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.674      ;
; 0.420 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[0]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 0.674      ;
; 0.454 ; sdram_ctrl:sdram_controller|r_rd_act                                                                            ; sdram_ctrl:sdram_controller|r_rd_bctr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.709      ;
; 0.635 ; seq_reg[1]                                                                                                      ; seq_reg[2]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.890      ;
; 0.637 ; seq_reg[11]                                                                                                     ; sdram_ctrl:sdram_controller|r_init_fsm[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.892      ;
; 0.639 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[17] ; ram_di_reg[1]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.161      ; 1.006      ;
; 0.639 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[18] ; ram_di_reg[2]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 1.007      ;
; 0.640 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[19] ; ram_di_reg[3]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 1.008      ;
; 0.642 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[31] ; ram_di_reg[15]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.161      ; 1.009      ;
; 0.644 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[23] ; ram_di_reg[7]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.161      ; 1.011      ;
; 0.645 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[8]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 0.899      ;
; 0.646 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[6]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 0.900      ;
; 0.648 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 0.902      ;
; 0.648 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 0.902      ;
; 0.648 ; sdram_ctrl:sdram_controller|r_bst_stp[0]                                                                        ; sdram_ctrl:sdram_controller|r_rd_bctr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.903      ;
; 0.650 ; seq_reg[9]                                                                                                      ; seq_reg[10]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 0.904      ;
; 0.650 ; sdram_ctrl:sdram_controller|r_init_tmr[9]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 0.904      ;
; 0.651 ; seq_reg[6]                                                                                                      ; seq_reg[7]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.906      ;
; 0.651 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 0.905      ;
; 0.651 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 0.905      ;
; 0.654 ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                                                                        ; sdram_ctrl:sdram_controller|r_rd_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.909      ;
; 0.656 ; seq_reg[3]                                                                                                      ; seq_reg[4]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.911      ;
; 0.656 ; seq_reg[4]                                                                                                      ; seq_reg[5]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.911      ;
; 0.665 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[1]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 0.919      ;
; 0.665 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[1]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 0.919      ;
; 0.667 ; seq_reg[11]                                                                                                     ; sdram_ctrl:sdram_controller|r_init_fsm[1]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 0.921      ;
; 0.673 ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                                                                        ; sdram_ctrl:sdram_controller|r_wr_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.928      ;
; 0.700 ; seq_reg[10]                                                                                                     ; seq_reg[11]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 0.954      ;
; 0.700 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[0]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.955      ;
; 0.748 ; sdram_ctrl:sdram_controller|r_rd_act                                                                            ; sdram_ctrl:sdram_controller|ap1_rd_bst_act            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.004      ;
; 0.755 ; sdram_ctrl:sdram_controller|r_refr_act                                                                          ; sdram_ctrl:sdram_controller|r_rd_reg                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 1.010      ;
; 0.755 ; sdram_ctrl:sdram_controller|r_refr_req                                                                          ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.009      ;
; 0.768 ; sdram_ctrl:sdram_controller|r_refr_act                                                                          ; sdram_ctrl:sdram_controller|r_wr_reg                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 1.023      ;
; 0.775 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[24] ; ram_di_reg[8]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 1.143      ;
; 0.778 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[21] ; ram_di_reg[5]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 1.144      ;
; 0.779 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[16] ; ram_di_reg[0]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 1.147      ;
; 0.804 ; seq_reg[0]                                                                                                      ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.058      ;
; 0.811 ; seq_reg[5]                                                                                                      ; seq_reg[6]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 1.066      ;
; 0.818 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.072      ;
; 0.836 ; seq_reg[7]                                                                                                      ; seq_reg[8]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 1.091      ;
; 0.844 ; seq_reg[9]                                                                                                      ; sdram_ctrl:sdram_controller|r_refr_act                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 1.099      ;
; 0.853 ; seq_reg[10]                                                                                                     ; sdram_ctrl:sdram_controller|sdram_rdy                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.107      ;
; 0.856 ; sdram_ctrl:sdram_controller|r_psel_dly[0]                                                                       ; sdram_ctrl:sdram_controller|ap1_rd_bst_act            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.112      ;
; 0.859 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[29] ; ram_di_reg[13]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 1.227      ;
; 0.860 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[20] ; ram_di_reg[4]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 1.226      ;
; 0.861 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[30] ; ram_di_reg[14]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 1.227      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[22] ; ram_di_reg[6]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 1.228      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[25] ; ram_di_reg[9]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.161      ; 1.229      ;
; 0.909 ; seq_reg[4]                                                                                                      ; sdram_ctrl:sdram_controller|r_rd_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.163      ;
; 0.920 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[1]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.174      ;
; 0.922 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                                                                       ; sdram_ctrl:sdram_controller|r_refr_act                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 1.177      ;
; 0.942 ; sdram_ctrl:sdram_controller|r_wr_reg                                                                            ; sdram_ctrl:sdram_controller|r_wr_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 1.195      ;
; 0.950 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                                                                      ; sdram_ctrl:sdram_controller|r_init_fsm[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 1.205      ;
; 0.952 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                                                                      ; sdram_ctrl:sdram_controller|sdram_rdy                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.206      ;
; 0.954 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                                                                      ; sdram_ctrl:sdram_controller|r_init_fsm[0]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 1.209      ;
; 0.954 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[10]            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.208      ;
; 0.958 ; seq_reg[11]                                                                                                     ; seq_reg[0]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.214      ;
; 0.963 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.217      ;
; 0.964 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.218      ;
; 0.965 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.219      ;
; 0.965 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.219      ;
; 0.975 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.229      ;
; 0.978 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[8]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.232      ;
; 0.978 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.232      ;
; 0.978 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.232      ;
; 0.980 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.234      ;
; 0.980 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[11] ; ram_di_reg[11]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 1.348      ;
; 0.980 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[9]  ; ram_di_reg[9]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.161      ; 1.347      ;
; 0.983 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.237      ;
; 0.983 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.237      ;
; 0.983 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.237      ;
; 0.992 ; seq_reg[11]                                                                                                     ; sdram_ctrl:sdram_controller|r_init_tmr[10]            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.246      ;
; 1.002 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                                                                       ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.258      ;
; 1.012 ; seq_reg[8]                                                                                                      ; seq_reg[9]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.266      ;
; 1.013 ; sdram_ctrl:sdram_controller|r_refr_req                                                                          ; sdram_ctrl:sdram_controller|r_rd_reg                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 1.266      ;
; 1.013 ; sdram_ctrl:sdram_controller|r_refr_req                                                                          ; sdram_ctrl:sdram_controller|r_wr_reg                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 1.266      ;
; 1.055 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[28] ; ram_di_reg[12]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 1.421      ;
; 1.073 ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1                                                           ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.327      ;
; 1.074 ; sdram_ctrl:sdram_controller|r_wr_act                                                                            ; sdram_ctrl:sdram_controller|r_wr_bctr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 1.329      ;
; 1.085 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[8]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.339      ;
; 1.086 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[6]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.340      ;
; 1.086 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.340      ;
; 1.090 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.344      ;
; 1.091 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.345      ;
; 1.091 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.345      ;
; 1.099 ; sdram_ctrl:sdram_controller|r_rd_reg                                                                            ; sdram_ctrl:sdram_controller|r_rd_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 1.352      ;
; 1.101 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.355      ;
; 1.104 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 1.359      ;
; 1.104 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[6]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.358      ;
+-------+-----------------------------------------------------------------------------------------------------------------+-------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                          ;
+-------+---------------------------------------+----------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                             ; To Node                                                        ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------+----------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 5.876 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[16]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 5.615      ;
; 5.876 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[25]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 5.615      ;
; 5.904 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[11]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.152     ; 5.582      ;
; 5.904 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[12]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.152     ; 5.582      ;
; 5.907 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[20]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.166     ; 5.565      ;
; 5.907 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[14]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.166     ; 5.565      ;
; 5.907 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[19]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.166     ; 5.565      ;
; 5.913 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.158     ; 5.567      ;
; 6.282 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.145     ; 5.211      ;
; 6.282 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[22]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.146     ; 5.210      ;
; 6.282 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[22]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.146     ; 5.210      ;
; 6.282 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[20]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.146     ; 5.210      ;
; 6.282 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[20]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.145     ; 5.211      ;
; 6.282 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[20]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.146     ; 5.210      ;
; 6.283 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[19]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.155     ; 5.200      ;
; 6.283 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[27]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.155     ; 5.200      ;
; 6.283 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[4]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 5.199      ;
; 6.283 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[22]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.155     ; 5.200      ;
; 6.283 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[20]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.155     ; 5.200      ;
; 6.283 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[0]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 5.198      ;
; 6.283 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[1]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 5.198      ;
; 6.283 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[2]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 5.198      ;
; 6.283 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[3]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 5.198      ;
; 6.283 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[4]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 5.198      ;
; 6.283 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[5]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 5.198      ;
; 6.283 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[6]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 5.198      ;
; 6.283 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[7]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 5.198      ;
; 6.283 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[8]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 5.198      ;
; 6.283 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[9]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 5.198      ;
; 6.283 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[10]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 5.198      ;
; 6.283 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[11]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 5.198      ;
; 6.283 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[12]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 5.198      ;
; 6.283 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[13]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 5.198      ;
; 6.283 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[14]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 5.198      ;
; 6.283 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[15]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 5.198      ;
; 6.285 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[15]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.145     ; 5.208      ;
; 6.285 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[13]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 5.197      ;
; 6.285 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[14]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 5.197      ;
; 6.285 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[8]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 5.197      ;
; 6.285 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[12]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.145     ; 5.208      ;
; 6.285 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[11]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 5.197      ;
; 6.285 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[9]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 5.197      ;
; 6.285 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[10]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 5.197      ;
; 6.286 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[18]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.163     ; 5.189      ;
; 6.286 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[22]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.163     ; 5.189      ;
; 6.286 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.151     ; 5.201      ;
; 6.286 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[23]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.163     ; 5.189      ;
; 6.286 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[21]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.163     ; 5.189      ;
; 6.287 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[2]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 5.190      ;
; 6.292 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[15]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.136     ; 5.210      ;
; 6.292 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[13]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.135     ; 5.211      ;
; 6.292 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[9]            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 5.198      ;
; 6.292 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[8]            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.135     ; 5.211      ;
; 6.292 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[10]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 5.198      ;
; 6.292 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[11]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.136     ; 5.210      ;
; 6.293 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[21]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 5.197      ;
; 6.293 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[22]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 5.197      ;
; 6.293 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[19]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 5.197      ;
; 6.293 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[20]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 5.197      ;
; 6.293 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[17]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 5.197      ;
; 6.293 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[18]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 5.197      ;
; 6.293 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[0]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.160     ; 5.185      ;
; 6.294 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[12]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.154     ; 5.190      ;
; 6.294 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.154     ; 5.190      ;
; 6.294 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.154     ; 5.190      ;
; 6.294 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[14]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.146     ; 5.198      ;
; 6.294 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.154     ; 5.190      ;
; 6.294 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.154     ; 5.190      ;
; 6.295 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[0]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 5.186      ;
; 6.295 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[6]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 5.186      ;
; 6.295 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[1]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 5.186      ;
; 6.295 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[6]            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 5.186      ;
; 6.296 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 5.185      ;
; 6.296 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_8BIT_WRITE_ENABLE_reg    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 5.185      ;
; 6.296 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 5.185      ;
; 6.296 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_READ_reg                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 5.185      ;
; 6.296 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[1]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.155     ; 5.187      ;
; 6.296 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[2]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.158     ; 5.184      ;
; 6.296 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[0]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.158     ; 5.184      ;
; 6.296 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[3]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.158     ; 5.184      ;
; 6.296 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[1]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.158     ; 5.184      ;
; 6.296 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[16]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.158     ; 5.184      ;
; 6.296 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[17]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.158     ; 5.184      ;
; 6.297 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 5.194      ;
; 6.297 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 5.194      ;
; 6.297 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[22]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 5.193      ;
; 6.304 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[1]    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.134     ; 5.200      ;
; 6.304 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[23]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.134     ; 5.200      ;
; 6.304 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[23]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.134     ; 5.200      ;
; 6.304 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[16]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 5.187      ;
; 6.304 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[16]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.135     ; 5.199      ;
; 6.304 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[16]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.136     ; 5.198      ;
; 6.304 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[16]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.135     ; 5.199      ;
; 6.304 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[15]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.134     ; 5.200      ;
; 6.304 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[22]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.149     ; 5.185      ;
; 6.304 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[5]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 5.187      ;
; 6.304 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[30]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.149     ; 5.185      ;
; 6.304 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[30]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.134     ; 5.200      ;
; 6.304 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[30]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.134     ; 5.200      ;
; 6.304 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[28]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.134     ; 5.200      ;
+-------+---------------------------------------+----------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                      ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node              ; To Node                                                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 7.996 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[7]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.261     ; 3.259      ;
; 8.066 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[4]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.182     ; 3.275      ;
; 8.066 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[5]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.182     ; 3.275      ;
; 8.066 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[9]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.183     ; 3.274      ;
; 8.066 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[11]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.183     ; 3.274      ;
; 8.068 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[6]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.185     ; 3.270      ;
; 8.069 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[7]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.185     ; 3.269      ;
; 8.069 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[8]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.185     ; 3.269      ;
; 8.077 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[8]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.310     ; 3.128      ;
; 8.085 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[8]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.199     ; 3.241      ;
; 8.086 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[9]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.328     ; 3.101      ;
; 8.088 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[14]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.322     ; 3.105      ;
; 8.088 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[13]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.322     ; 3.105      ;
; 8.088 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[15]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.322     ; 3.105      ;
; 8.089 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[7]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 3.263      ;
; 8.090 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[10]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.324     ; 3.101      ;
; 8.090 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[11]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.324     ; 3.101      ;
; 8.090 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[12]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.324     ; 3.101      ;
; 8.090 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[2]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.170     ; 3.263      ;
; 8.090 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[3]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.170     ; 3.263      ;
; 8.092 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ba[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.173     ; 3.258      ;
; 8.092 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ba[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.173     ; 3.258      ;
; 8.092 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[0]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.173     ; 3.258      ;
; 8.092 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[1]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.173     ; 3.258      ;
; 8.092 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.173     ; 3.258      ;
; 8.094 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[9]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.217     ; 3.214      ;
; 8.096 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[13]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.211     ; 3.218      ;
; 8.096 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[14]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.211     ; 3.218      ;
; 8.096 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[15]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.211     ; 3.218      ;
; 8.098 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[10]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.213     ; 3.214      ;
; 8.098 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[11]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.213     ; 3.214      ;
; 8.098 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[12]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.213     ; 3.214      ;
; 8.104 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[5]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.314     ; 3.097      ;
; 8.104 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[6]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.313     ; 3.098      ;
; 8.105 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[4]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.321     ; 3.089      ;
; 8.106 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[3]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.313     ; 3.096      ;
; 8.106 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[0]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.310     ; 3.099      ;
; 8.106 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[1]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.310     ; 3.099      ;
; 8.106 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[2]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.310     ; 3.099      ;
; 8.112 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[5]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.203     ; 3.210      ;
; 8.112 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[6]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.202     ; 3.211      ;
; 8.113 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[4]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.210     ; 3.202      ;
; 8.114 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[0]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.199     ; 3.212      ;
; 8.114 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[1]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.199     ; 3.212      ;
; 8.114 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[2]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.199     ; 3.212      ;
; 8.114 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[3]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.202     ; 3.209      ;
; 8.315 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.182     ; 3.026      ;
; 8.338 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ras_n                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 3.013      ;
; 8.338 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cas_n                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 3.013      ;
; 8.338 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_we_n                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 3.014      ;
; 8.338 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 3.014      ;
; 8.338 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 3.013      ;
; 8.574 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.162     ; 2.902      ;
; 8.578 ; sdram_reset_ctrl_n_reg ; ram_do_reg[26]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.876      ;
; 8.578 ; sdram_reset_ctrl_n_reg ; ram_do_reg[28]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.876      ;
; 8.578 ; sdram_reset_ctrl_n_reg ; ram_do_reg[23]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.876      ;
; 8.578 ; sdram_reset_ctrl_n_reg ; ram_do_reg[1]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.876      ;
; 8.578 ; sdram_reset_ctrl_n_reg ; ram_do_reg[15]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.876      ;
; 8.578 ; sdram_reset_ctrl_n_reg ; ram_do_reg[25]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.876      ;
; 8.578 ; sdram_reset_ctrl_n_reg ; ram_do_reg[4]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.876      ;
; 8.578 ; sdram_reset_ctrl_n_reg ; ram_do_reg[31]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.876      ;
; 8.578 ; sdram_reset_ctrl_n_reg ; ram_do_reg[7]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.876      ;
; 8.578 ; sdram_reset_ctrl_n_reg ; ram_do_reg[2]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.876      ;
; 8.578 ; sdram_reset_ctrl_n_reg ; ram_do_reg[12]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.876      ;
; 8.578 ; sdram_reset_ctrl_n_reg ; ram_do_reg[9]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.876      ;
; 8.578 ; sdram_reset_ctrl_n_reg ; ram_do_reg[10]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.876      ;
; 8.578 ; sdram_reset_ctrl_n_reg ; ram_do_reg[20]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.876      ;
; 8.578 ; sdram_reset_ctrl_n_reg ; ram_do_reg[18]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.876      ;
; 8.578 ; sdram_reset_ctrl_n_reg ; ram_do_reg[17]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.876      ;
; 8.579 ; sdram_reset_ctrl_n_reg ; sdram_request_reg                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.191     ; 2.868      ;
; 8.579 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_psel[0]                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.191     ; 2.868      ;
; 8.579 ; sdram_reset_ctrl_n_reg ; sdram_request_complete_reg                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.191     ; 2.868      ;
; 8.579 ; sdram_reset_ctrl_n_reg ; ram_di_reg[1]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.185     ; 2.874      ;
; 8.579 ; sdram_reset_ctrl_n_reg ; ram_di_reg[7]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.185     ; 2.874      ;
; 8.579 ; sdram_reset_ctrl_n_reg ; ram_di_reg[9]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.185     ; 2.874      ;
; 8.579 ; sdram_reset_ctrl_n_reg ; ram_di_reg[15]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.185     ; 2.874      ;
; 8.580 ; sdram_reset_ctrl_n_reg ; ram_do_reg[19]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.874      ;
; 8.580 ; sdram_reset_ctrl_n_reg ; ram_do_reg[0]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.874      ;
; 8.580 ; sdram_reset_ctrl_n_reg ; ram_do_reg[27]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.874      ;
; 8.580 ; sdram_reset_ctrl_n_reg ; ram_do_reg[3]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.874      ;
; 8.580 ; sdram_reset_ctrl_n_reg ; ram_do_reg[30]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.874      ;
; 8.580 ; sdram_reset_ctrl_n_reg ; ram_do_reg[16]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.874      ;
; 8.580 ; sdram_reset_ctrl_n_reg ; ram_do_reg[5]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.874      ;
; 8.580 ; sdram_reset_ctrl_n_reg ; ram_do_reg[6]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.874      ;
; 8.580 ; sdram_reset_ctrl_n_reg ; ram_do_reg[29]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.874      ;
; 8.580 ; sdram_reset_ctrl_n_reg ; ram_do_reg[13]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.874      ;
; 8.580 ; sdram_reset_ctrl_n_reg ; ram_do_reg[14]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.874      ;
; 8.580 ; sdram_reset_ctrl_n_reg ; ram_do_reg[8]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.874      ;
; 8.580 ; sdram_reset_ctrl_n_reg ; ram_do_reg[22]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.874      ;
; 8.580 ; sdram_reset_ctrl_n_reg ; ram_do_reg[11]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.874      ;
; 8.580 ; sdram_reset_ctrl_n_reg ; ram_do_reg[24]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.874      ;
; 8.580 ; sdram_reset_ctrl_n_reg ; ram_do_reg[21]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.874      ;
; 8.581 ; sdram_reset_ctrl_n_reg ; ram_di_reg[0]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.873      ;
; 8.581 ; sdram_reset_ctrl_n_reg ; ram_di_reg[4]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.185     ; 2.872      ;
; 8.581 ; sdram_reset_ctrl_n_reg ; ram_di_reg[5]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.185     ; 2.872      ;
; 8.581 ; sdram_reset_ctrl_n_reg ; ram_di_reg[6]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.185     ; 2.872      ;
; 8.581 ; sdram_reset_ctrl_n_reg ; ram_di_reg[8]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.873      ;
; 8.581 ; sdram_reset_ctrl_n_reg ; ram_di_reg[12]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.185     ; 2.872      ;
; 8.581 ; sdram_reset_ctrl_n_reg ; ram_di_reg[13]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 2.873      ;
; 8.581 ; sdram_reset_ctrl_n_reg ; ram_di_reg[14]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.185     ; 2.872      ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                           ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                        ; To Node                                                                                                                                                                        ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 48.335 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[8] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.183      ; 1.846      ;
; 97.088 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.065     ; 2.845      ;
; 97.088 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.065     ; 2.845      ;
; 97.088 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.065     ; 2.845      ;
; 97.088 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.065     ; 2.845      ;
; 97.193 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.065     ; 2.740      ;
; 97.193 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.065     ; 2.740      ;
; 97.193 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.065     ; 2.740      ;
; 97.193 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.065     ; 2.740      ;
; 97.274 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.076     ; 2.648      ;
; 97.274 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.076     ; 2.648      ;
; 97.274 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.076     ; 2.648      ;
; 97.307 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.080     ; 2.611      ;
; 97.307 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.080     ; 2.611      ;
; 97.307 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.080     ; 2.611      ;
; 97.307 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.080     ; 2.611      ;
; 97.307 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.080     ; 2.611      ;
; 97.307 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.080     ; 2.611      ;
; 97.307 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.080     ; 2.611      ;
; 97.307 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.080     ; 2.611      ;
; 97.307 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.080     ; 2.611      ;
; 97.549 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 2.380      ;
; 97.549 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 2.380      ;
; 97.570 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 2.361      ;
; 97.570 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 2.361      ;
; 97.570 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 2.361      ;
; 97.570 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 2.361      ;
; 97.699 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 2.233      ;
; 97.730 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[3]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 2.201      ;
; 97.730 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 2.201      ;
; 97.730 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 2.201      ;
; 97.730 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 2.201      ;
; 97.730 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 2.201      ;
; 97.754 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 2.189      ;
; 97.754 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 2.189      ;
; 97.754 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 2.189      ;
; 97.754 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 2.189      ;
; 97.754 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 2.189      ;
; 97.754 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 2.189      ;
; 97.754 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 2.189      ;
; 97.754 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 2.189      ;
; 97.754 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 2.189      ;
; 97.754 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 2.189      ;
; 97.754 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 2.189      ;
; 97.754 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 2.189      ;
; 97.783 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 2.148      ;
; 97.783 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 2.148      ;
; 97.783 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 2.148      ;
; 97.783 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 2.148      ;
; 97.914 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.073     ; 2.011      ;
; 98.039 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.082     ; 1.877      ;
; 98.039 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.082     ; 1.877      ;
; 98.043 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.082     ; 1.873      ;
; 98.044 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.068     ; 1.886      ;
; 98.044 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.068     ; 1.886      ;
; 98.044 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.068     ; 1.886      ;
; 98.044 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.068     ; 1.886      ;
; 98.044 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.068     ; 1.886      ;
; 98.044 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.068     ; 1.886      ;
; 98.044 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.068     ; 1.886      ;
; 98.044 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.068     ; 1.886      ;
; 98.044 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.068     ; 1.886      ;
; 98.044 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.068     ; 1.886      ;
; 98.061 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 1.870      ;
; 98.061 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 1.870      ;
; 98.061 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 1.870      ;
; 98.061 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 1.870      ;
; 98.061 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 1.870      ;
; 98.061 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 1.870      ;
; 98.061 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 1.870      ;
; 98.061 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 1.870      ;
; 98.061 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 1.870      ;
; 98.063 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.083     ; 1.852      ;
; 98.063 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.083     ; 1.852      ;
; 98.063 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.083     ; 1.852      ;
; 98.063 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.083     ; 1.852      ;
; 98.063 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.083     ; 1.852      ;
; 98.063 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.083     ; 1.852      ;
; 98.063 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.083     ; 1.852      ;
; 98.063 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.083     ; 1.852      ;
; 98.063 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.083     ; 1.852      ;
; 98.063 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.083     ; 1.852      ;
; 98.075 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.084     ; 1.839      ;
; 98.075 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.084     ; 1.839      ;
; 98.075 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.084     ; 1.839      ;
; 98.075 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[2]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.084     ; 1.839      ;
; 98.085 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.064     ; 1.849      ;
; 98.085 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.064     ; 1.849      ;
; 98.085 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.064     ; 1.849      ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                             ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node    ; To Node                                             ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 63.571 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.065     ; 3.018      ;
; 63.571 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.065     ; 3.018      ;
; 63.571 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.065     ; 3.018      ;
; 63.571 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.065     ; 3.018      ;
; 63.571 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.065     ; 3.018      ;
; 63.571 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.065     ; 3.018      ;
; 63.571 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.065     ; 3.018      ;
; 63.571 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.065     ; 3.018      ;
; 63.571 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.065     ; 3.018      ;
; 63.571 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.065     ; 3.018      ;
; 63.571 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.065     ; 3.018      ;
; 63.571 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.065     ; 3.018      ;
; 63.571 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.065     ; 3.018      ;
; 63.571 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.065     ; 3.018      ;
; 63.571 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.065     ; 3.018      ;
; 63.572 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.066     ; 3.016      ;
; 63.572 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.066     ; 3.016      ;
; 63.572 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.066     ; 3.016      ;
; 63.572 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.066     ; 3.016      ;
; 63.572 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.064     ; 3.018      ;
; 63.572 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.065     ; 3.017      ;
; 63.572 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.065     ; 3.017      ;
; 63.572 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.065     ; 3.017      ;
; 63.572 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.065     ; 3.017      ;
; 63.572 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.065     ; 3.017      ;
; 63.573 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.064     ; 3.017      ;
; 63.573 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.064     ; 3.017      ;
; 63.573 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.064     ; 3.017      ;
; 63.573 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.064     ; 3.017      ;
; 63.573 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.064     ; 3.017      ;
; 64.006 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 0.369      ; 3.017      ;
; 66.028 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.398      ; 3.024      ;
; 66.028 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.398      ; 3.024      ;
; 66.028 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.398      ; 3.024      ;
; 66.028 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.398      ; 3.024      ;
; 66.028 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.397      ; 3.023      ;
; 66.028 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.398      ; 3.024      ;
; 66.028 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.398      ; 3.024      ;
; 66.028 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.398      ; 3.024      ;
; 66.028 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.397      ; 3.023      ;
; 66.028 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.398      ; 3.024      ;
; 66.028 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.398      ; 3.024      ;
; 66.028 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.398      ; 3.024      ;
; 66.028 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.397      ; 3.023      ;
; 66.028 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.398      ; 3.024      ;
; 66.028 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.397      ; 3.023      ;
; 66.028 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.398      ; 3.024      ;
; 66.029 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.395      ; 3.020      ;
; 66.029 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.395      ; 3.020      ;
; 66.029 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.395      ; 3.020      ;
; 66.029 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.397      ; 3.022      ;
; 66.029 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.397      ; 3.022      ;
; 66.029 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.396      ; 3.021      ;
; 66.029 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.397      ; 3.022      ;
; 66.029 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.397      ; 3.022      ;
; 66.029 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.396      ; 3.021      ;
; 66.029 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.396      ; 3.021      ;
; 66.029 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.395      ; 3.020      ;
; 66.029 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.396      ; 3.021      ;
; 66.029 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.396      ; 3.021      ;
; 66.030 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.397      ; 3.021      ;
; 66.030 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.397      ; 3.021      ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                              ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node    ; To Node                                             ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; -0.003 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.672      ; 2.855      ;
; -0.003 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.672      ; 2.855      ;
; -0.001 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.670      ; 2.855      ;
; -0.001 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.670      ; 2.855      ;
; -0.001 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.670      ; 2.855      ;
; -0.001 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.671      ; 2.856      ;
; -0.001 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.671      ; 2.856      ;
; -0.001 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.671      ; 2.856      ;
; -0.001 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.671      ; 2.856      ;
; -0.001 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.671      ; 2.856      ;
; -0.001 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.670      ; 2.855      ;
; -0.001 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.670      ; 2.855      ;
; -0.001 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.670      ; 2.855      ;
; -0.001 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.671      ; 2.856      ;
; -0.001 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.671      ; 2.856      ;
; 0.000  ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.673      ; 2.859      ;
; 0.000  ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.673      ; 2.859      ;
; 0.000  ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.673      ; 2.859      ;
; 0.000  ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.673      ; 2.859      ;
; 0.000  ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.672      ; 2.858      ;
; 0.000  ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.673      ; 2.859      ;
; 0.000  ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.673      ; 2.859      ;
; 0.000  ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.673      ; 2.859      ;
; 0.000  ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.672      ; 2.858      ;
; 0.000  ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.673      ; 2.859      ;
; 0.000  ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.673      ; 2.859      ;
; 0.000  ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.673      ; 2.859      ;
; 0.000  ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.672      ; 2.858      ;
; 0.000  ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.673      ; 2.859      ;
; 0.000  ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.672      ; 2.858      ;
; 0.000  ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.673      ; 2.859      ;
; 2.135  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.528      ; 2.849      ;
; 2.587  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.076      ; 2.849      ;
; 2.587  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.076      ; 2.849      ;
; 2.588  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.076      ; 2.850      ;
; 2.588  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.076      ; 2.850      ;
; 2.588  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.076      ; 2.850      ;
; 2.588  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.076      ; 2.850      ;
; 2.588  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.076      ; 2.850      ;
; 2.588  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.076      ; 2.850      ;
; 2.588  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.076      ; 2.850      ;
; 2.589  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.074      ; 2.849      ;
; 2.589  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.074      ; 2.849      ;
; 2.589  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.074      ; 2.849      ;
; 2.589  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.074      ; 2.849      ;
; 2.589  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.075      ; 2.850      ;
; 2.589  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.075      ; 2.850      ;
; 2.589  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.075      ; 2.850      ;
; 2.589  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.075      ; 2.850      ;
; 2.589  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.075      ; 2.850      ;
; 2.589  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.075      ; 2.850      ;
; 2.589  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.075      ; 2.850      ;
; 2.589  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.075      ; 2.850      ;
; 2.589  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.075      ; 2.850      ;
; 2.589  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.075      ; 2.850      ;
; 2.589  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.075      ; 2.850      ;
; 2.589  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.075      ; 2.850      ;
; 2.589  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.075      ; 2.850      ;
; 2.589  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.075      ; 2.850      ;
; 2.589  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.075      ; 2.850      ;
; 2.589  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.075      ; 2.850      ;
; 2.589  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.075      ; 2.850      ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                 ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                           ; To Node                                                                                                                                                                                                                ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 1.435 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a5 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.385      ; 2.006      ;
; 1.435 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a4 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.385      ; 2.006      ;
; 1.435 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a3 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.385      ; 2.006      ;
; 1.435 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a2 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.385      ; 2.006      ;
; 1.435 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.385      ; 2.006      ;
; 1.435 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.385      ; 2.006      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a63  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a62  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a61  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a60  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a59  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a58  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a57  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a56  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a47  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a46  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a45  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a44  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a43  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a42  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a41  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a40  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a31  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a30  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a29  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a28  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a27  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a26  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a25  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a24  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a23  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a22  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a21  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a20  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a15  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a14  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a13  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a12  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a11  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a10  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a9   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.069      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a55  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.267      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a54  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.267      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a53  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.267      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a52  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.267      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a51  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.267      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a50  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.267      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a49  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.267      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a48  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.267      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a39  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.267      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a38  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.267      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a37  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.267      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a36  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.267      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a35  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.267      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a34  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.267      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a33  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.267      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a32  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.267      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a19  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.267      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a18  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.267      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a17  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.267      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a16  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.267      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a7   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.267      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a6   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.267      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a5   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.267      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a4   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.267      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a3   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.267      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a2   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.267      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a1   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.267      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 2.267      ;
; 1.761 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a6 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.385      ; 2.332      ;
; 1.761 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a5 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.385      ; 2.332      ;
; 1.761 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a4 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.385      ; 2.332      ;
; 1.761 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a3 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.385      ; 2.332      ;
; 1.761 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a2 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.385      ; 2.332      ;
; 1.761 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.385      ; 2.332      ;
; 1.761 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.385      ; 2.332      ;
; 2.066 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a15   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.641      ;
; 2.066 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a14   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.641      ;
; 2.066 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a13   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.641      ;
; 2.066 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a12   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.641      ;
; 2.066 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a11   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.641      ;
; 2.066 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a10   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.641      ;
; 2.066 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a9    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.641      ;
; 2.066 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a8    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.641      ;
; 2.066 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a7    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.641      ;
; 2.066 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a6    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.641      ;
; 2.066 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a5    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.641      ;
; 2.066 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a4    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.641      ;
; 2.066 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a3    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.641      ;
; 2.066 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a2    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.641      ;
; 2.066 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a1    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.641      ;
; 2.066 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.641      ;
; 4.068 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[6]                                                                                                                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.639      ; 4.913      ;
; 4.068 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[7]                                                                                                                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.639      ; 4.913      ;
; 4.077 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                                                                                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.642      ; 4.925      ;
; 4.078 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[5]                                                                                                                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.642      ; 4.926      ;
; 4.462 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[6]                                                                                                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.538      ; 5.186      ;
; 4.484 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[2]                                                                                                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.213      ; 4.903      ;
; 4.484 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot0_reg[0]                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.213      ; 4.903      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                            ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                        ; To Node                                                                                                                                                                        ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 1.453  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.055      ; 1.694      ;
; 1.453  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.055      ; 1.694      ;
; 1.453  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.055      ; 1.694      ;
; 1.453  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[2]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.055      ; 1.694      ;
; 1.457  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.075      ; 1.718      ;
; 1.457  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.075      ; 1.718      ;
; 1.457  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.075      ; 1.718      ;
; 1.465  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.056      ; 1.707      ;
; 1.465  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.056      ; 1.707      ;
; 1.465  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.056      ; 1.707      ;
; 1.465  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.056      ; 1.707      ;
; 1.465  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.056      ; 1.707      ;
; 1.465  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.056      ; 1.707      ;
; 1.465  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.056      ; 1.707      ;
; 1.465  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.056      ; 1.707      ;
; 1.465  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.056      ; 1.707      ;
; 1.465  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.056      ; 1.707      ;
; 1.485  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.071      ; 1.742      ;
; 1.485  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.071      ; 1.742      ;
; 1.485  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.071      ; 1.742      ;
; 1.485  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.071      ; 1.742      ;
; 1.485  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.071      ; 1.742      ;
; 1.485  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.071      ; 1.742      ;
; 1.485  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.071      ; 1.742      ;
; 1.485  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.071      ; 1.742      ;
; 1.485  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.071      ; 1.742      ;
; 1.485  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.071      ; 1.742      ;
; 1.487  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.057      ; 1.730      ;
; 1.490  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.072      ; 1.748      ;
; 1.490  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.072      ; 1.748      ;
; 1.490  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.072      ; 1.748      ;
; 1.490  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.072      ; 1.748      ;
; 1.490  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.072      ; 1.748      ;
; 1.490  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.072      ; 1.748      ;
; 1.490  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.072      ; 1.748      ;
; 1.490  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.072      ; 1.748      ;
; 1.490  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.072      ; 1.748      ;
; 1.491  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.057      ; 1.734      ;
; 1.491  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.057      ; 1.734      ;
; 1.591  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.067      ; 1.844      ;
; 1.735  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.084      ; 2.005      ;
; 1.735  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.084      ; 2.005      ;
; 1.735  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.084      ; 2.005      ;
; 1.735  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.084      ; 2.005      ;
; 1.735  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.084      ; 2.005      ;
; 1.735  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.084      ; 2.005      ;
; 1.735  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.084      ; 2.005      ;
; 1.735  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.084      ; 2.005      ;
; 1.735  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.084      ; 2.005      ;
; 1.735  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.084      ; 2.005      ;
; 1.735  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.084      ; 2.005      ;
; 1.735  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.084      ; 2.005      ;
; 1.768  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.071      ; 2.025      ;
; 1.768  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.071      ; 2.025      ;
; 1.768  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.071      ; 2.025      ;
; 1.768  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.071      ; 2.025      ;
; 1.794  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[3]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.073      ; 2.053      ;
; 1.794  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.073      ; 2.053      ;
; 1.794  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.073      ; 2.053      ;
; 1.794  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.073      ; 2.053      ;
; 1.794  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.073      ; 2.053      ;
; 1.818  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.073      ; 2.077      ;
; 1.950  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.071      ; 2.207      ;
; 1.950  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.071      ; 2.207      ;
; 1.950  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.071      ; 2.207      ;
; 1.950  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.071      ; 2.207      ;
; 2.009  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.071      ; 2.266      ;
; 2.009  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.071      ; 2.266      ;
; 2.134  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.090      ; 2.410      ;
; 2.134  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.090      ; 2.410      ;
; 2.134  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.090      ; 2.410      ;
; 2.134  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.090      ; 2.410      ;
; 2.134  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.090      ; 2.410      ;
; 2.134  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.090      ; 2.410      ;
; 2.134  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.090      ; 2.410      ;
; 2.134  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.090      ; 2.410      ;
; 2.134  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.090      ; 2.410      ;
; 2.208  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.095      ; 2.489      ;
; 2.208  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.095      ; 2.489      ;
; 2.208  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.095      ; 2.489      ;
; 2.242  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.073      ; 2.501      ;
; 2.242  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.073      ; 2.501      ;
; 2.242  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.073      ; 2.501      ;
; 2.242  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.073      ; 2.501      ;
; 2.436  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.073      ; 2.695      ;
; 2.436  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.073      ; 2.695      ;
; 2.436  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.073      ; 2.695      ;
; 2.436  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.073      ; 2.695      ;
; 51.177 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[8] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; -50.000      ; 0.325      ; 1.708      ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                       ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node              ; To Node                                                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 2.322 ; sdram_reset_ctrl_n_reg ; ram_di_reg[2]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 2.685      ;
; 2.322 ; sdram_reset_ctrl_n_reg ; ram_di_reg[3]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 2.685      ;
; 2.322 ; sdram_reset_ctrl_n_reg ; ram_di_reg[10]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 2.685      ;
; 2.322 ; sdram_reset_ctrl_n_reg ; ram_di_reg[11]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 2.685      ;
; 2.322 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_oe                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 2.685      ;
; 2.323 ; sdram_reset_ctrl_n_reg ; seq_reg[1]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.153      ; 2.682      ;
; 2.323 ; sdram_reset_ctrl_n_reg ; seq_reg[2]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.153      ; 2.682      ;
; 2.323 ; sdram_reset_ctrl_n_reg ; seq_reg[3]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.153      ; 2.682      ;
; 2.323 ; sdram_reset_ctrl_n_reg ; seq_reg[4]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.153      ; 2.682      ;
; 2.323 ; sdram_reset_ctrl_n_reg ; seq_reg[5]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.153      ; 2.682      ;
; 2.323 ; sdram_reset_ctrl_n_reg ; seq_reg[6]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.153      ; 2.682      ;
; 2.323 ; sdram_reset_ctrl_n_reg ; seq_reg[7]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.153      ; 2.682      ;
; 2.323 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.154      ; 2.683      ;
; 2.323 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.154      ; 2.683      ;
; 2.323 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_act                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.154      ; 2.683      ;
; 2.323 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_reg                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.154      ; 2.683      ;
; 2.323 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.681      ;
; 2.323 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.681      ;
; 2.323 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.681      ;
; 2.323 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.681      ;
; 2.323 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.153      ; 2.682      ;
; 2.323 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_reg                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.154      ; 2.683      ;
; 2.323 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.681      ;
; 2.323 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.681      ;
; 2.323 ; sdram_reset_ctrl_n_reg ; ram_di_reg[0]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.687      ;
; 2.323 ; sdram_reset_ctrl_n_reg ; ram_di_reg[8]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.687      ;
; 2.323 ; sdram_reset_ctrl_n_reg ; ram_di_reg[13]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.687      ;
; 2.323 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[1]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.681      ;
; 2.323 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[0]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.681      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; seq_reg[8]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.153      ; 2.683      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; seq_reg[9]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.153      ; 2.683      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; seq_reg[10]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.153      ; 2.683      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; seq_reg[11]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.153      ; 2.683      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; seq_reg[0]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.155      ; 2.685      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.155      ; 2.685      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.155      ; 2.685      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.155      ; 2.685      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.155      ; 2.685      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.155      ; 2.685      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.155      ; 2.685      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.155      ; 2.685      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.155      ; 2.685      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.155      ; 2.685      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.155      ; 2.685      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.153      ; 2.683      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.153      ; 2.683      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.153      ; 2.683      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; ram_do_reg[19]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.688      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; ram_do_reg[0]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.688      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; ram_do_reg[27]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.688      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; ram_do_reg[3]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.688      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; ram_do_reg[30]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.688      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; ram_do_reg[16]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.688      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; ram_do_reg[5]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.688      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; ram_do_reg[6]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.688      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; ram_do_reg[29]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.688      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; ram_do_reg[13]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.688      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; ram_do_reg[14]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.688      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; ram_do_reg[8]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.688      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; ram_do_reg[22]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.688      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; ram_do_reg[11]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.688      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; ram_do_reg[24]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.688      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; ram_do_reg[21]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.688      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_req                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.155      ; 2.685      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; ram_di_reg[4]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.156      ; 2.686      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; ram_di_reg[5]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.156      ; 2.686      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; ram_di_reg[6]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.156      ; 2.686      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; ram_di_reg[12]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.156      ; 2.686      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; ram_di_reg[14]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.156      ; 2.686      ;
; 2.324 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.155      ; 2.685      ;
; 2.325 ; sdram_reset_ctrl_n_reg ; ram_di_reg[1]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 2.688      ;
; 2.325 ; sdram_reset_ctrl_n_reg ; ram_di_reg[7]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 2.688      ;
; 2.325 ; sdram_reset_ctrl_n_reg ; ram_di_reg[9]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 2.688      ;
; 2.325 ; sdram_reset_ctrl_n_reg ; ram_di_reg[15]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 2.688      ;
; 2.325 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.181      ; 2.712      ;
; 2.326 ; sdram_reset_ctrl_n_reg ; ram_do_reg[26]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.690      ;
; 2.326 ; sdram_reset_ctrl_n_reg ; ram_do_reg[28]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.690      ;
; 2.326 ; sdram_reset_ctrl_n_reg ; ram_do_reg[23]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.690      ;
; 2.326 ; sdram_reset_ctrl_n_reg ; ram_do_reg[1]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.690      ;
; 2.326 ; sdram_reset_ctrl_n_reg ; ram_do_reg[15]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.690      ;
; 2.326 ; sdram_reset_ctrl_n_reg ; ram_do_reg[25]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.690      ;
; 2.326 ; sdram_reset_ctrl_n_reg ; ram_do_reg[4]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.690      ;
; 2.326 ; sdram_reset_ctrl_n_reg ; ram_do_reg[31]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.690      ;
; 2.326 ; sdram_reset_ctrl_n_reg ; ram_do_reg[7]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.690      ;
; 2.326 ; sdram_reset_ctrl_n_reg ; ram_do_reg[2]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.690      ;
; 2.326 ; sdram_reset_ctrl_n_reg ; ram_do_reg[12]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.690      ;
; 2.326 ; sdram_reset_ctrl_n_reg ; ram_do_reg[9]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.690      ;
; 2.326 ; sdram_reset_ctrl_n_reg ; ram_do_reg[10]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.690      ;
; 2.326 ; sdram_reset_ctrl_n_reg ; ram_do_reg[20]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.690      ;
; 2.326 ; sdram_reset_ctrl_n_reg ; ram_do_reg[18]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.690      ;
; 2.326 ; sdram_reset_ctrl_n_reg ; ram_do_reg[17]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 2.690      ;
; 2.328 ; sdram_reset_ctrl_n_reg ; sdram_request_reg                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.151      ; 2.685      ;
; 2.328 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_psel[0]                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.151      ; 2.685      ;
; 2.328 ; sdram_reset_ctrl_n_reg ; sdram_request_complete_reg                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.151      ; 2.685      ;
; 2.556 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ras_n                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.151      ; 2.837      ;
; 2.556 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cas_n                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.151      ; 2.837      ;
; 2.556 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_we_n                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.838      ;
; 2.556 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.838      ;
; 2.556 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.151      ; 2.837      ;
; 2.579 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.140      ; 2.849      ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                        ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+---------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                                                          ; Clock Edge ; Target                    ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+---------------------------+
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[0]         ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[2]         ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[3]         ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[4]         ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[5]         ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[6]         ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[7]         ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[8]         ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[9]         ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[0]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[1]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[2]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[3]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[4]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[6]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[7]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[9]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[0]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[1]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[2]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[3]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[4]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[6]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[7]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[9]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[0] ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[1] ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[2] ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[3] ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[4] ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[5] ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[6] ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[7] ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[8] ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[9] ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[0]       ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[1]       ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[2]       ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[3]       ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[4]       ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[5]       ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[6]       ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[7]       ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[0]       ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[1]       ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[2]       ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[3]       ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[4]       ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[5]       ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[6]       ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[7]       ;
; 4.092 ; 4.312        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[2]              ;
; 4.092 ; 4.312        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[3]              ;
; 4.092 ; 4.312        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[4]              ;
; 4.092 ; 4.312        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[5]              ;
; 4.092 ; 4.312        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[6]              ;
; 4.092 ; 4.312        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[7]              ;
; 4.092 ; 4.312        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[8]              ;
; 4.092 ; 4.312        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[9]              ;
; 4.092 ; 4.312        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[1]         ;
; 4.093 ; 4.313        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[5]   ;
; 4.093 ; 4.313        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[8]   ;
; 4.093 ; 4.313        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[5]   ;
; 4.093 ; 4.313        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[8]   ;
; 4.209 ; 4.367        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[0]              ;
; 4.209 ; 4.367        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[1]              ;
; 4.209 ; 4.367        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[2]              ;
; 4.209 ; 4.367        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[3]              ;
; 4.209 ; 4.367        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[4]              ;
; 4.209 ; 4.367        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[5]              ;
; 4.209 ; 4.367        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[6]              ;
; 4.209 ; 4.362        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[7]              ;
; 4.209 ; 4.367        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[7]              ;
; 4.210 ; 4.363        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[0]              ;
; 4.210 ; 4.363        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[1]              ;
; 4.210 ; 4.363        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[2]              ;
; 4.210 ; 4.363        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[3]              ;
; 4.210 ; 4.363        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[4]              ;
; 4.210 ; 4.363        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[5]              ;
; 4.210 ; 4.363        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[6]              ;
; 4.228 ; 4.416        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[5]   ;
; 4.228 ; 4.416        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[8]   ;
; 4.229 ; 4.417        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[5]   ;
; 4.229 ; 4.417        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[8]   ;
; 4.230 ; 4.418        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[2]              ;
; 4.230 ; 4.418        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[3]              ;
; 4.230 ; 4.418        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[4]              ;
; 4.230 ; 4.418        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[5]              ;
; 4.230 ; 4.418        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[6]              ;
; 4.230 ; 4.418        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[7]              ;
; 4.230 ; 4.418        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[8]              ;
; 4.230 ; 4.418        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[9]              ;
; 4.230 ; 4.418        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[1]         ;
; 4.231 ; 4.419        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[0]         ;
; 4.231 ; 4.419        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[2]         ;
; 4.231 ; 4.419        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[3]         ;
; 4.231 ; 4.419        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[4]         ;
; 4.231 ; 4.419        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[5]         ;
; 4.231 ; 4.419        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[6]         ;
; 4.231 ; 4.419        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[7]         ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+---------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                        ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-----------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                                                          ; Clock Edge ; Target                                                    ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-----------------------------------------------------------+
; 5.547 ; 5.767        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_psel[0]                     ;
; 5.547 ; 5.767        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_request_complete_reg                                ;
; 5.547 ; 5.767        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_request_reg                                         ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[0]                                             ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[10]                                            ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[11]                                            ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[12]                                            ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[13]                                            ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[14]                                            ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[2]                                             ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[3]                                             ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[4]                                             ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[5]                                             ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[6]                                             ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[8]                                             ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_refr_req                    ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1     ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[0]                                                ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_bena_reg[0]                                           ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_bena_reg[1]                                           ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[15]                                            ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[1]                                             ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[7]                                             ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[9]                                             ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[0]                                             ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[11]                                            ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[13]                                            ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[14]                                            ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[16]                                            ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[19]                                            ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[21]                                            ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[22]                                            ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[24]                                            ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[27]                                            ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[29]                                            ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[30]                                            ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[3]                                             ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[5]                                             ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[6]                                             ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[8]                                             ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_act                      ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_reg                      ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_refr_act                    ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_dq_oe                 ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_act                      ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_reg                      ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|sdram_rdy                     ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[10]                                               ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[11]                                               ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[1]                                                ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[2]                                                ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[3]                                                ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[4]                                                ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[5]                                                ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[6]                                                ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[7]                                                ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[8]                                                ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[9]                                                ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[10]                                            ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[12]                                            ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[15]                                            ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[17]                                            ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[18]                                            ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[1]                                             ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[20]                                            ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[23]                                            ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[25]                                            ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[26]                                            ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[28]                                            ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[2]                                             ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[31]                                            ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[4]                                             ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[7]                                             ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[9]                                             ;
; 5.551 ; 5.771        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ;
; 5.597 ; 5.755        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[8]                   ;
; 5.599 ; 5.757        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[0]                   ;
; 5.599 ; 5.757        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[1]                   ;
; 5.599 ; 5.757        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[2]                   ;
; 5.599 ; 5.757        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[3]                   ;
; 5.599 ; 5.757        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[6]                   ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-----------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                             ;
+--------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                                          ; Clock Edge ; Target                                                                                                                        ;
+--------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------+
; 17.179 ; 17.399       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]        ;
; 17.180 ; 17.400       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[15]                                                         ;
; 17.180 ; 17.400       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[17]                                                         ;
; 17.181 ; 17.401       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[0]                              ;
; 17.181 ; 17.401       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[1]                              ;
; 17.181 ; 17.401       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[2]                              ;
; 17.181 ; 17.401       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[3]                              ;
; 17.181 ; 17.401       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[6]                              ;
; 17.181 ; 17.401       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[0]                              ;
; 17.181 ; 17.401       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[1]                              ;
; 17.181 ; 17.401       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[2]                              ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_UG[10]                                                                                                     ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_UG[11]                                                                                                     ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_UG[12]                                                                                                     ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_UG[13]                                                                                                     ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_UG[14]                                                                                                     ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_UG[15]                                                                                                     ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_UG[4]                                                                                                      ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_UG[5]                                                                                                      ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_UG[6]                                                                                                      ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_UG[7]                                                                                                      ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_UG[8]                                                                                                      ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_UG[9]                                                                                                      ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YB[10]                                                                                                     ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YB[11]                                                                                                     ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YB[12]                                                                                                     ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YB[6]                                                                                                      ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YB[7]                                                                                                      ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YB[8]                                                                                                      ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YB[9]                                                                                                      ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YG[10]                                                                                                     ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YG[11]                                                                                                     ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YG[12]                                                                                                     ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YG[13]                                                                                                     ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YG[14]                                                                                                     ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YG[15]                                                                                                     ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YG[2]                                                                                                      ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YG[4]                                                                                                      ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YG[5]                                                                                                      ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YG[6]                                                                                                      ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YG[7]                                                                                                      ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YG[8]                                                                                                      ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YG[9]                                                                                                      ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YR[10]                                                                                                     ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YR[11]                                                                                                     ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YR[12]                                                                                                     ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YR[13]                                                                                                     ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YR[14]                                                                                                     ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YR[2]                                                                                                      ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YR[3]                                                                                                      ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YR[4]                                                                                                      ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YR[6]                                                                                                      ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YR[7]                                                                                                      ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YR[8]                                                                                                      ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YR[9]                                                                                                      ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|porta_output_reg[3]                          ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|VOLUME_OUT_L_REG[4]  ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|VOLUME_OUT_R_REG[5]  ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|VOLUME_OUT_R_REG[9]  ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_UB[10]                                                                                                     ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_UB[11]                                                                                                     ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_UB[12]                                                                                                     ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_UB[13]                                                                                                     ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_UB[14]                                                                                                     ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_UB[15]                                                                                                     ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_UB[4]                                                                                                      ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_UB[5]                                                                                                      ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_UB[6]                                                                                                      ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_UB[7]                                                                                                      ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_UB[8]                                                                                                      ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_UB[9]                                                                                                      ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_VG[10]                                                                                                     ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_VG[11]                                                                                                     ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_VG[12]                                                                                                     ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_VG[13]                                                                                                     ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_VG[14]                                                                                                     ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_VG[15]                                                                                                     ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_VG[16]                                                                                                     ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_VG[7]                                                                                                      ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_VG[8]                                                                                                      ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_VG[9]                                                                                                      ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|comp_YG[3]                                                                                                      ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[0]                                                          ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[10]                                                         ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[11]                                                         ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[13]                                                         ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[1]                                                          ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[2]                                                          ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[3]                                                          ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[4]                                                          ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[5]                                                          ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[6]                                                          ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[8]                                                          ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[9]                                                          ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|VOLUME_OUT_R_REG[14] ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|VOLUME_OUT_R_REG[15] ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|VOLUME_OUT_R_REG[3]  ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|insn.dec_add                                                            ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|insn.dec_and                                                            ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|insn.dec_eq                                                             ;
+--------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                        ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                ; Clock Edge ; Target                                                                                   ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+------------------------------------------------------------------------------------------+
; 17.427 ; 17.427       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]           ;
; 17.427 ; 17.427       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]           ;
; 17.427 ; 17.427       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]           ;
; 17.427 ; 17.427       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]           ;
; 17.427 ; 17.427       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|observablevcoout ;
; 17.438 ; 17.438       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; mcc_pll3|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl|inclk[0]               ;
; 17.438 ; 17.438       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; mcc_pll3|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl|outclk                 ;
; 17.450 ; 17.450       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]         ;
; 17.470 ; 17.470       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]         ;
; 17.481 ; 17.481       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; mcc_pll3|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl|inclk[0]               ;
; 17.481 ; 17.481       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; mcc_pll3|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl|outclk                 ;
; 17.492 ; 17.492       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]           ;
; 17.492 ; 17.492       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]           ;
; 17.492 ; 17.492       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]           ;
; 17.492 ; 17.492       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]           ;
; 17.492 ; 17.492       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|observablevcoout ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                            ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+--------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                ; Clock Edge ; Target                                                       ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+--------------------------------------------------------------+
; 33.028 ; 33.248       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyleft_out[0]              ;
; 33.028 ; 33.248       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyleft_out[1]              ;
; 33.028 ; 33.248       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyleft_out[2]              ;
; 33.028 ; 33.248       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyleft_out[3]              ;
; 33.028 ; 33.248       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyright_out[3]             ;
; 33.029 ; 33.249       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]                ;
; 33.029 ; 33.249       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]                ;
; 33.029 ; 33.249       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]                ;
; 33.029 ; 33.249       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]                ;
; 33.029 ; 33.249       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]                ;
; 33.029 ; 33.249       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]                ;
; 33.029 ; 33.249       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]                ;
; 33.029 ; 33.249       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]                ;
; 33.029 ; 33.249       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[4]                ;
; 33.029 ; 33.249       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[5]                ;
; 33.029 ; 33.249       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[6]                ;
; 33.029 ; 33.249       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[7]                ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[0]              ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[1]              ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[2]              ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[3]              ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[4]              ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[5]              ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[6]              ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[7]              ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[8]              ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[0]                ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]                ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]                ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]                ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm1_last~_emulated          ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dminus_buf1                 ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dminus_buf2                 ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dminus~en                   ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp1_last~_emulated          ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp2_prev~_emulated          ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp_previous                 ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dplus_buf2                  ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dplus~en                    ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]                  ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]                  ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]                  ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]                  ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rden_sig                    ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid             ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[0]       ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[1]       ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[2]       ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[3]       ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[4]       ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[5]       ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[6]       ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[7]       ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[8]       ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[9]       ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|send_frame                  ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[0]                 ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]                 ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]                 ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|synch                       ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1           ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2           ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3           ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4           ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.Idle           ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.end_send1      ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.end_send2      ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.reset_released ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.reset_start    ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send1          ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send2          ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send3          ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send_bit0      ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send_complete  ;
; 33.030 ; 33.250       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|val                         ;
; 33.034 ; 33.254       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[5]              ;
; 33.034 ; 33.254       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[7]              ;
; 33.034 ; 33.254       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send_bit1      ;
; 33.034 ; 33.254       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send_bit2      ;
; 33.034 ; 33.254       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send_bit3      ;
; 33.034 ; 33.254       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send_bit4      ;
; 33.035 ; 33.255       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[0]              ;
; 33.035 ; 33.255       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[1]              ;
; 33.035 ; 33.255       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[2]              ;
; 33.035 ; 33.255       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[3]              ;
; 33.035 ; 33.255       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[4]              ;
; 33.035 ; 33.255       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[6]              ;
; 33.035 ; 33.255       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm_previous                 ;
; 33.035 ; 33.255       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dminus~reg0                 ;
; 33.035 ; 33.255       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dplus_buf1                  ;
; 33.035 ; 33.255       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dplus~reg0                  ;
; 33.035 ; 33.255       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[0]           ;
; 33.035 ; 33.255       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[1]           ;
; 33.035 ; 33.255       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[2]           ;
; 33.035 ; 33.255       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[3]           ;
; 33.035 ; 33.255       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[4]           ;
; 33.035 ; 33.255       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[5]           ;
; 33.035 ; 33.255       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[6]           ;
; 33.035 ; 33.255       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[7]           ;
; 33.035 ; 33.255       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[0]               ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+--------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: 'altera_reserved_tck'                                                                                                                                                                                                                                                     ;
+--------+--------------+----------------+------------------+---------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock               ; Clock Edge ; Target                                                                                                                                                                                                                ;
+--------+--------------+----------------+------------------+---------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 49.482 ; 49.717       ; 0.235          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ;
; 49.482 ; 49.717       ; 0.235          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                           ;
; 49.483 ; 49.718       ; 0.235          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ;
; 49.483 ; 49.718       ; 0.235          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                           ;
; 49.485 ; 49.720       ; 0.235          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ;
; 49.486 ; 49.721       ; 0.235          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ;
; 49.539 ; 49.759       ; 0.220          ; High Pulse Width ; altera_reserved_tck ; Fall       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ;
; 49.588 ; 49.776       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[0]                                                                                                                 ;
; 49.588 ; 49.776       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[1]                                                                                                                 ;
; 49.588 ; 49.776       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[2]                                                                                                                 ;
; 49.588 ; 49.776       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[3]                                                                                                                 ;
; 49.588 ; 49.776       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[4]                                                                                                                 ;
; 49.589 ; 49.777       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[0]                                                                                                                      ;
; 49.589 ; 49.777       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[1]                                                                                                                      ;
; 49.589 ; 49.777       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[2]                                                                                                                      ;
; 49.589 ; 49.777       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[3]                                                                                                                      ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[2] ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[3] ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|design_hash_reg[0]                                                                                                                                      ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|design_hash_reg[1]                                                                                                                                      ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|design_hash_reg[2]                                                                                                                                      ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|design_hash_reg[3]                                                                                                                                      ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                                                          ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                                                          ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                                                          ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                                                          ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                                                          ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                                                          ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                                                          ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                                                          ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                                                          ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                                                          ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|mixer_addr_reg[0]                                                                                                                                       ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|mixer_addr_reg[1]                                                                                                                                       ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|mixer_addr_reg[2]                                                                                                                                       ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|mixer_addr_reg[3]                                                                                                                                       ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|mixer_addr_reg[4]                                                                                                                                       ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0]                                                                                                                      ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[10]                                                                                                                     ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[11]                                                                                                                     ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[12]                                                                                                                     ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[14]                                                                                                                     ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[15]                                                                                                                     ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[2]                                                                                                                      ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[3]                                                                                                                      ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[9]                                                                                                                      ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                     ;
; 49.590 ; 49.778       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                     ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                   ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                   ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]                                                   ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]                                                   ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]                                                   ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]                                              ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]                                              ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]                                              ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]                                              ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                   ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                   ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]                                                   ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]                                                   ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]                                                   ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[0]                                                                                                                           ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[1]                                                                                                                           ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[2]                                                                                                                           ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[3]                                                                                                                           ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[0]                                                                                                                          ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[1]                                                                                                                          ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[2]                                                                                                                          ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[3]                                                                                                                          ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                           ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                           ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                                                           ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                                                           ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                                                           ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                                                             ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                                                             ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                             ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[3]                                                                                                                                             ;
; 49.591 ; 49.779       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                                                             ;
+--------+--------------+----------------+------------------+---------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: 'FPGA_CLK'                                                                                               ;
+---------+--------------+----------------+------------------+----------+------------+----------------------------------------------------------------+
; Slack   ; Actual Width ; Required Width ; Type             ; Clock    ; Clock Edge ; Target                                                         ;
+---------+--------------+----------------+------------------+----------+------------+----------------------------------------------------------------+
; 99.796  ; 99.796       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]           ;
; 99.796  ; 99.796       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1]           ;
; 99.796  ; 99.796       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|observablevcoout ;
; 99.818  ; 99.818       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; FPGA_CLK~input|o                                               ;
; 99.850  ; 99.850       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|inclk[0]         ;
; 100.000 ; 100.000      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; FPGA_CLK~input|i                                               ;
; 100.000 ; 100.000      ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; FPGA_CLK~input|i                                               ;
; 100.149 ; 100.149      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|inclk[0]         ;
; 100.182 ; 100.182      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; FPGA_CLK~input|o                                               ;
; 100.202 ; 100.202      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]           ;
; 100.202 ; 100.202      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1]           ;
; 100.202 ; 100.202      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|observablevcoout ;
; 196.000 ; 200.000      ; 4.000          ; Port Rate        ; FPGA_CLK ; Rise       ; FPGA_CLK                                                       ;
+---------+--------------+----------------+------------------+----------+------------+----------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                                                                             ;
+---------------------+---------------------+-------+-------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+-------+-------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]         ; FPGA_CLK            ; 2.679 ; 2.858 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 2.661 ; 2.840 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 2.661 ; 2.840 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 2.661 ; 2.840 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 2.664 ; 2.843 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 2.672 ; 2.851 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 2.665 ; 2.844 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 2.664 ; 2.843 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 2.611 ; 2.789 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 2.661 ; 2.840 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 2.679 ; 2.858 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 2.675 ; 2.854 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 2.675 ; 2.854 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 2.675 ; 2.854 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 2.673 ; 2.852 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 2.673 ; 2.852 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 2.673 ; 2.852 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0             ; FPGA_CLK            ; 3.536 ; 3.731 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; altera_reserved_tdi ; altera_reserved_tck ; 3.336 ; 3.599 ; Rise       ; altera_reserved_tck                                                            ;
; altera_reserved_tms ; altera_reserved_tck ; 8.538 ; 8.656 ; Rise       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; 5.179 ; 5.617 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; 1.489 ; 1.883 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 5.075 ; 5.502 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 1.387 ; 1.783 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 5.476 ; 5.876 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 2.734 ; 3.119 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+-------+-------+------------+--------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]         ; FPGA_CLK            ; -1.737 ; -1.915 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; -1.782 ; -1.961 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; -1.782 ; -1.961 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; -1.782 ; -1.961 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; -1.785 ; -1.964 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; -1.794 ; -1.973 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; -1.786 ; -1.965 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; -1.785 ; -1.964 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; -1.737 ; -1.915 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; -1.782 ; -1.961 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; -1.801 ; -1.980 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; -1.796 ; -1.975 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; -1.796 ; -1.975 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; -1.796 ; -1.975 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; -1.795 ; -1.974 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; -1.795 ; -1.974 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; -1.795 ; -1.974 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0             ; FPGA_CLK            ; -2.566 ; -2.752 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; altera_reserved_tdi ; altera_reserved_tck ; -0.256 ; -0.449 ; Rise       ; altera_reserved_tck                                                            ;
; altera_reserved_tms ; altera_reserved_tck ; -2.224 ; -2.333 ; Rise       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; -4.380 ; -4.804 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; -0.621 ; -0.994 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; -4.280 ; -4.694 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; -0.489 ; -0.863 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; -4.388 ; -4.819 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; -1.580 ; -1.974 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                                                                     ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_A[*]          ; FPGA_CLK            ; 5.734  ; 5.981  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]         ; FPGA_CLK            ; 3.130  ; 2.917  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]         ; FPGA_CLK            ; 3.130  ; 2.917  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]         ; FPGA_CLK            ; 3.133  ; 2.920  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]         ; FPGA_CLK            ; 3.133  ; 2.920  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]         ; FPGA_CLK            ; 3.120  ; 2.907  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]         ; FPGA_CLK            ; 3.120  ; 2.907  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]         ; FPGA_CLK            ; 3.118  ; 2.905  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]         ; FPGA_CLK            ; 2.297  ; 2.223  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]         ; FPGA_CLK            ; 5.734  ; 5.981  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]         ; FPGA_CLK            ; 3.119  ; 2.906  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]        ; FPGA_CLK            ; 3.130  ; 2.917  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]        ; FPGA_CLK            ; 3.119  ; 2.906  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]         ; FPGA_CLK            ; 5.747  ; 5.994  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]        ; FPGA_CLK            ; 5.747  ; 5.994  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]        ; FPGA_CLK            ; 2.310  ; 2.236  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N         ; FPGA_CLK            ; 2.311  ; 2.237  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N          ; FPGA_CLK            ; 3.131  ; 2.918  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]         ; FPGA_CLK            ; 5.070  ; 5.494  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 3.501  ; 3.356  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 3.501  ; 3.356  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 3.501  ; 3.356  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 5.070  ; 5.494  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 5.061  ; 5.485  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 2.456  ; 2.435  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 3.318  ; 3.164  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 3.132  ; 2.919  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 3.501  ; 3.356  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 5.054  ; 5.478  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 3.487  ; 3.342  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 3.487  ; 3.342  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 3.487  ; 3.342  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 5.060  ; 5.484  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 3.488  ; 3.343  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 3.488  ; 3.343  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n        ; FPGA_CLK            ; 3.120  ; 2.907  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n        ; FPGA_CLK            ; 3.132  ; 2.919  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N         ; FPGA_CLK            ; 3.131  ; 2.918  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N          ; FPGA_CLK            ; 5.749  ; 5.996  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L             ; FPGA_CLK            ; 5.739  ; 6.129  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R             ; FPGA_CLK            ; 3.317  ; 3.226  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK              ; FPGA_CLK            ; 4.071  ; 4.041  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD              ; FPGA_CLK            ; 4.510  ; 4.489  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3             ; FPGA_CLK            ; 4.318  ; 4.378  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK           ; FPGA_CLK            ; 12.242 ;        ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK           ; FPGA_CLK            ;        ; 12.593 ; Fall       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]            ; FPGA_CLK            ; 4.914  ; 5.300  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]           ; FPGA_CLK            ; 2.298  ; 2.224  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]           ; FPGA_CLK            ; 4.914  ; 5.300  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]           ; FPGA_CLK            ; 2.297  ; 2.223  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]           ; FPGA_CLK            ; 2.300  ; 2.226  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]            ; FPGA_CLK            ; 4.916  ; 5.302  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]           ; FPGA_CLK            ; 2.299  ; 2.225  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]           ; FPGA_CLK            ; 2.299  ; 2.225  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]           ; FPGA_CLK            ; 2.299  ; 2.225  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]           ; FPGA_CLK            ; 4.916  ; 5.302  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; altera_reserved_tdo ; altera_reserved_tck ; 14.080 ; 15.118 ; Fall       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; 5.081  ; 5.091  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; 7.463  ; 7.444  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 8.241  ; 7.807  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 7.423  ; 7.434  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                                                                             ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_A[*]          ; FPGA_CLK            ; 1.569  ; 1.495  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]         ; FPGA_CLK            ; 2.369  ; 2.161  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]         ; FPGA_CLK            ; 2.369  ; 2.161  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]         ; FPGA_CLK            ; 2.372  ; 2.164  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]         ; FPGA_CLK            ; 2.372  ; 2.164  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]         ; FPGA_CLK            ; 2.360  ; 2.152  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]         ; FPGA_CLK            ; 2.360  ; 2.152  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]         ; FPGA_CLK            ; 2.357  ; 2.149  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]         ; FPGA_CLK            ; 1.569  ; 1.495  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]         ; FPGA_CLK            ; 4.974  ; 5.226  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]         ; FPGA_CLK            ; 2.359  ; 2.151  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]        ; FPGA_CLK            ; 2.369  ; 2.161  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]        ; FPGA_CLK            ; 2.359  ; 2.151  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]         ; FPGA_CLK            ; 1.581  ; 1.507  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]        ; FPGA_CLK            ; 4.986  ; 5.238  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]        ; FPGA_CLK            ; 1.581  ; 1.507  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N         ; FPGA_CLK            ; 1.582  ; 1.508  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N          ; FPGA_CLK            ; 2.370  ; 2.162  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]         ; FPGA_CLK            ; 1.727  ; 1.707  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 2.738  ; 2.600  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 2.738  ; 2.600  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 2.738  ; 2.600  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 4.341  ; 4.766  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 4.333  ; 4.758  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 1.727  ; 1.707  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 2.555  ; 2.408  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 2.371  ; 2.163  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 2.738  ; 2.600  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 4.326  ; 4.751  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 2.724  ; 2.586  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 2.724  ; 2.586  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 2.724  ; 2.586  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 4.332  ; 4.757  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 2.726  ; 2.588  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 2.726  ; 2.588  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n        ; FPGA_CLK            ; 2.360  ; 2.152  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n        ; FPGA_CLK            ; 2.371  ; 2.163  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N         ; FPGA_CLK            ; 2.370  ; 2.162  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N          ; FPGA_CLK            ; 4.988  ; 5.240  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L             ; FPGA_CLK            ; 4.895  ; 5.285  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R             ; FPGA_CLK            ; 2.464  ; 2.374  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK              ; FPGA_CLK            ; 3.188  ; 3.156  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD              ; FPGA_CLK            ; 3.610  ; 3.586  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3             ; FPGA_CLK            ; 3.422  ; 3.483  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK           ; FPGA_CLK            ; 11.452 ;        ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK           ; FPGA_CLK            ;        ; 11.804 ; Fall       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]            ; FPGA_CLK            ; 1.569  ; 1.495  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]           ; FPGA_CLK            ; 1.570  ; 1.496  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]           ; FPGA_CLK            ; 4.186  ; 4.572  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]           ; FPGA_CLK            ; 1.569  ; 1.495  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]           ; FPGA_CLK            ; 1.572  ; 1.498  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]            ; FPGA_CLK            ; 1.571  ; 1.497  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]           ; FPGA_CLK            ; 1.571  ; 1.497  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]           ; FPGA_CLK            ; 1.571  ; 1.497  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]           ; FPGA_CLK            ; 1.571  ; 1.497  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]           ; FPGA_CLK            ; 4.188  ; 4.574  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; altera_reserved_tdo ; altera_reserved_tck ; 11.696 ; 12.733 ; Fall       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; 4.493  ; 4.502  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; 6.774  ; 6.754  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 7.640  ; 7.207  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 6.734  ; 6.746  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                                                      ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 3.516 ; 3.440 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 3.958 ; 3.882 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 3.958 ; 3.882 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 3.958 ; 3.882 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 6.693 ; 7.054 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 7.443 ; 7.804 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 4.782 ; 4.696 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 4.447 ; 4.361 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 4.140 ; 3.992 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 3.871 ; 3.795 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 5.970 ; 6.331 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 3.516 ; 3.440 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 3.516 ; 3.440 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 3.516 ; 3.440 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 5.977 ; 6.338 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 3.547 ; 3.471 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 3.547 ; 3.471 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 4.116 ; 3.968 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 5.162 ; 5.086 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2       ; FPGA_CLK   ; 7.547 ; 7.461 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1        ; FPGA_CLK   ; 7.842 ; 8.203 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2        ; FPGA_CLK   ; 7.274 ; 7.188 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                                                              ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 2.672 ; 2.596 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 3.095 ; 3.019 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 3.095 ; 3.019 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 3.095 ; 3.019 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 5.819 ; 6.180 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 6.539 ; 6.900 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 3.879 ; 3.793 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 3.557 ; 3.471 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 3.227 ; 3.079 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 3.012 ; 2.936 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 5.124 ; 5.485 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 2.672 ; 2.596 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 2.672 ; 2.596 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 2.672 ; 2.596 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 5.131 ; 5.492 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 2.701 ; 2.625 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 2.701 ; 2.625 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 3.204 ; 3.056 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 4.578 ; 4.502 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2       ; FPGA_CLK   ; 6.862 ; 6.776 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1        ; FPGA_CLK   ; 7.248 ; 7.609 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2        ; FPGA_CLK   ; 6.600 ; 6.514 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                                                             ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 3.478     ; 3.554     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 3.924     ; 4.000     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 3.924     ; 4.000     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 3.924     ; 4.000     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 7.085     ; 6.724     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 7.814     ; 7.453     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 4.688     ; 4.774     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 4.375     ; 4.461     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 4.026     ; 4.174     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 3.828     ; 3.904     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 6.372     ; 6.011     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 3.478     ; 3.554     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 3.478     ; 3.554     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 3.478     ; 3.554     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 6.376     ; 6.015     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 3.509     ; 3.585     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 3.509     ; 3.585     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 4.011     ; 4.159     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 5.099     ; 5.175     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2       ; FPGA_CLK   ; 7.465     ; 7.551     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1        ; FPGA_CLK   ; 8.210     ; 7.849     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2        ; FPGA_CLK   ; 7.207     ; 7.293     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                                                     ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 2.632     ; 2.708     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 3.060     ; 3.136     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 3.060     ; 3.136     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 3.060     ; 3.136     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 6.209     ; 5.848     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 6.909     ; 6.548     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 3.786     ; 3.872     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 3.486     ; 3.572     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 3.112     ; 3.260     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 2.968     ; 3.044     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 5.525     ; 5.164     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 2.632     ; 2.708     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 2.632     ; 2.708     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 2.632     ; 2.708     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 5.529     ; 5.168     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 2.662     ; 2.738     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 2.662     ; 2.738     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 3.098     ; 3.246     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 4.515     ; 4.591     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2       ; FPGA_CLK   ; 6.779     ; 6.865     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1        ; FPGA_CLK   ; 7.616     ; 7.255     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2        ; FPGA_CLK   ; 6.532     ; 6.618     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+


----------------------------------------------
; Slow 1200mV 85C Model Metastability Report ;
----------------------------------------------
No synchronizer chains to report.


+----------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Fmax Summary                                                                                    ;
+------------+-----------------+--------------------------------------------------------------------------------+------+
; Fmax       ; Restricted Fmax ; Clock Name                                                                     ; Note ;
+------------+-----------------+--------------------------------------------------------------------------------+------+
; 47.53 MHz  ; 47.53 MHz       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;      ;
; 72.65 MHz  ; 72.65 MHz       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;      ;
; 102.94 MHz ; 102.94 MHz      ; altera_reserved_tck                                                            ;      ;
; 144.8 MHz  ; 144.8 MHz       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;      ;
; 233.1 MHz  ; 233.1 MHz       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;      ;
+------------+-----------------+--------------------------------------------------------------------------------+------+
This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods.  FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock.  Paths of different clocks, including generated clocks, are ignored.  For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.


+---------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup Summary                                                                      ;
+--------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                          ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; -3.243 ; -298.779      ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.776  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 4.440  ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 26.451 ; 0.000         ;
; altera_reserved_tck                                                            ; 45.143 ; 0.000         ;
+--------------------------------------------------------------------------------+--------+---------------+


+--------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold Summary                                                                      ;
+--------------------------------------------------------------------------------+-------+---------------+
; Clock                                                                          ; Slack ; End Point TNS ;
+--------------------------------------------------------------------------------+-------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.327 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 0.347 ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.348 ; 0.000         ;
; altera_reserved_tck                                                            ; 0.362 ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.364 ; 0.000         ;
+--------------------------------------------------------------------------------+-------+---------------+


+---------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery Summary                                                                   ;
+--------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                          ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 6.441  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.363  ; 0.000         ;
; altera_reserved_tck                                                            ; 48.606 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 63.879 ; 0.000         ;
+--------------------------------------------------------------------------------+--------+---------------+


+---------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal Summary                                                                    ;
+--------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                          ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------------------+--------+---------------+
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; -0.029 ; -0.842        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 1.296  ; 0.000         ;
; altera_reserved_tck                                                            ; 1.337  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 2.084  ; 0.000         ;
+--------------------------------------------------------------------------------+--------+---------------+


+---------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width Summary                                                        ;
+--------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                          ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 4.090  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.546  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.161 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[1]                           ; 17.424 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 32.970 ; 0.000         ;
; altera_reserved_tck                                                            ; 49.395 ; 0.000         ;
; FPGA_CLK                                                                       ; 99.779 ; 0.000         ;
+--------------------------------------------------------------------------------+--------+---------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                         ;
+--------+--------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                        ; To Node                                                                                                                 ; Launch Clock                                         ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; -3.243 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[28]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.379     ; 4.967      ;
; -3.212 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[28]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.379     ; 4.936      ;
; -3.200 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[27]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.379     ; 4.924      ;
; -3.178 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.383     ; 4.898      ;
; -3.158 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[28]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.379     ; 4.882      ;
; -3.093 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[27]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.379     ; 4.817      ;
; -3.083 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[27]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.379     ; 4.807      ;
; -3.073 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[27]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.379     ; 4.797      ;
; -3.071 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.383     ; 4.791      ;
; -3.068 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.075     ; 5.096      ;
; -3.061 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.383     ; 4.781      ;
; -3.051 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.383     ; 4.771      ;
; -3.046 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.381     ; 4.768      ;
; -3.041 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[28]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.379     ; 4.765      ;
; -3.019 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[0]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.044     ; 5.078      ;
; -3.018 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[0]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.062     ; 5.059      ;
; -3.006 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|doReg[1]    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.404     ; 4.705      ;
; -3.005 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[22]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.387     ; 4.721      ;
; -2.999 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.075     ; 5.027      ;
; -2.989 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[0]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.400     ; 4.692      ;
; -2.980 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[26]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.381     ; 4.702      ;
; -2.974 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[22]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.387     ; 4.690      ;
; -2.973 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.063     ; 5.013      ;
; -2.965 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[1]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.401     ; 4.667      ;
; -2.951 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.041     ; 5.013      ;
; -2.950 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[0]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.044     ; 5.009      ;
; -2.949 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[0]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.062     ; 4.990      ;
; -2.949 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[26]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.381     ; 4.671      ;
; -2.944 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.045     ; 5.002      ;
; -2.943 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.043     ; 5.003      ;
; -2.942 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[30]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.381     ; 4.664      ;
; -2.940 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.076     ; 4.967      ;
; -2.939 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.381     ; 4.661      ;
; -2.935 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[0]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.040     ; 4.998      ;
; -2.929 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.381     ; 4.651      ;
; -2.920 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[22]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.387     ; 4.636      ;
; -2.920 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[0]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.400     ; 4.623      ;
; -2.919 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.381     ; 4.641      ;
; -2.915 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.406     ; 4.612      ;
; -2.911 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[30]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.381     ; 4.633      ;
; -2.899 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.076     ; 4.926      ;
; -2.895 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[26]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.381     ; 4.617      ;
; -2.883 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|doReg[1]    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.404     ; 4.582      ;
; -2.866 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[0]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.040     ; 4.929      ;
; -2.859 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[24]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.381     ; 4.581      ;
; -2.857 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[30]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.381     ; 4.579      ;
; -2.850 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.063     ; 4.890      ;
; -2.848 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[23]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.387     ; 4.564      ;
; -2.846 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.406     ; 4.543      ;
; -2.842 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[1]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.401     ; 4.544      ;
; -2.836 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.407     ; 4.532      ;
; -2.828 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.041     ; 4.890      ;
; -2.828 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[24]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.381     ; 4.550      ;
; -2.821 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.045     ; 4.879      ;
; -2.820 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.043     ; 4.880      ;
; -2.803 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[22]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.387     ; 4.519      ;
; -2.797 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.002     ; 4.898      ;
; -2.778 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[26]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.381     ; 4.500      ;
; -2.776 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.076     ; 4.803      ;
; -2.775 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.031     ; 4.847      ;
; -2.774 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[24]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.381     ; 4.496      ;
; -2.768 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.477      ;
; -2.762 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[20]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.378     ; 4.487      ;
; -2.760 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.039     ; 4.824      ;
; -2.759 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[18] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.403     ; 4.459      ;
; -2.758 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.033     ; 4.828      ;
; -2.753 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[21]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.387     ; 4.469      ;
; -2.750 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_cache_reg[2]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.391     ; 4.462      ;
; -2.742 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.063     ; 4.782      ;
; -2.741 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[23]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.387     ; 4.457      ;
; -2.741 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.032     ; 4.812      ;
; -2.740 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[30]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.381     ; 4.462      ;
; -2.739 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[41] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.039     ; 4.803      ;
; -2.739 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.032     ; 4.810      ;
; -2.732 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.001     ; 4.834      ;
; -2.731 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[23]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.387     ; 4.447      ;
; -2.731 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[20]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.378     ; 4.456      ;
; -2.722 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.070     ; 4.755      ;
; -2.721 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[23]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.387     ; 4.437      ;
; -2.715 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.027     ; 4.791      ;
; -2.713 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.407     ; 4.409      ;
; -2.706 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.043     ; 4.766      ;
; -2.706 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.031     ; 4.778      ;
; -2.703 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.039     ; 4.767      ;
; -2.699 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[25]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.383     ; 4.419      ;
; -2.690 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.042     ; 4.751      ;
; -2.689 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.033     ; 4.759      ;
; -2.687 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|doReg[0]    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.402     ; 4.388      ;
; -2.677 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[20]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.378     ; 4.402      ;
; -2.676 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[1]                                                                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.402     ; 4.377      ;
; -2.675 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.001     ; 4.777      ;
; -2.666 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[6]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.407     ; 4.362      ;
; -2.664 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.001     ; 4.766      ;
; -2.663 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.001     ; 4.765      ;
; -2.657 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[24]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.381     ; 4.379      ;
; -2.655 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.002     ; 4.756      ;
; -2.654 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.002     ; 4.755      ;
; -2.646 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[21]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.387     ; 4.362      ;
; -2.646 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.027     ; 4.722      ;
; -2.639 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[18] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.403     ; 4.339      ;
+--------+--------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                                        ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                         ; To Node                                      ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.776 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.151     ; 10.600     ;
; 0.837 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.151     ; 10.539     ;
; 0.914 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.151     ; 10.462     ;
; 0.921 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.151     ; 10.455     ;
; 0.975 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.151     ; 10.401     ;
; 0.982 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.151     ; 10.394     ;
; 1.037 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.148     ; 10.342     ;
; 1.039 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.151     ; 10.337     ;
; 1.090 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.151     ; 10.286     ;
; 1.100 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.151     ; 10.276     ;
; 1.115 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.148     ; 10.264     ;
; 1.134 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.142     ; 10.251     ;
; 1.149 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.156     ; 10.222     ;
; 1.163 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.151     ; 10.213     ;
; 1.171 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[13]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.142     ; 10.214     ;
; 1.195 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.142     ; 10.190     ;
; 1.206 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.143     ; 10.178     ;
; 1.239 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.155     ; 10.133     ;
; 1.241 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.155     ; 10.131     ;
; 1.247 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_direction_reg[5]                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.168     ; 10.112     ;
; 1.279 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.143     ; 10.105     ;
; 1.281 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.156     ; 10.090     ;
; 1.287 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.156     ; 10.084     ;
; 1.294 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.156     ; 10.077     ;
; 1.300 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[8]                             ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.142     ; 10.085     ;
; 1.302 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.155     ; 10.070     ;
; 1.312 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.155     ; 10.060     ;
; 1.321 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[10]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.143     ; 10.063     ;
; 1.325 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.163     ; 10.039     ;
; 1.325 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.155     ; 10.047     ;
; 1.333 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[12]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.142     ; 10.052     ;
; 1.349 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.148     ; 10.030     ;
; 1.378 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[11]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.142     ; 10.007     ;
; 1.392 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.156     ; 9.979      ;
; 1.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.156     ; 9.969      ;
; 1.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.156     ; 9.959      ;
; 1.414 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.148     ; 9.965      ;
; 1.416 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[5]                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.168     ; 9.943      ;
; 1.449 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.156     ; 9.922      ;
; 1.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[11]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.157     ; 9.917      ;
; 1.457 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.156     ; 9.914      ;
; 1.462 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.156     ; 9.909      ;
; 1.463 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.163     ; 9.901      ;
; 1.468 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]                             ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.142     ; 9.917      ;
; 1.470 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.163     ; 9.894      ;
; 1.472 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.151     ; 9.904      ;
; 1.483 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[13]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.147     ; 9.897      ;
; 1.491 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[0]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.156     ; 9.880      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.163     ; 9.872      ;
; 1.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[8]                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.158     ; 9.873      ;
; 1.499 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.141     ; 9.887      ;
; 1.507 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.147     ; 9.873      ;
; 1.509 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_direction_reg[4]                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.142     ; 9.876      ;
; 1.512 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.148     ; 9.867      ;
; 1.518 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.148     ; 9.861      ;
; 1.526 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.153     ; 9.848      ;
; 1.551 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.160     ; 9.816      ;
; 1.556 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.155     ; 9.816      ;
; 1.559 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.153     ; 9.815      ;
; 1.561 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[9]                             ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.143     ; 9.823      ;
; 1.562 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[8]                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.151     ; 9.814      ;
; 1.578 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.163     ; 9.786      ;
; 1.588 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.163     ; 9.776      ;
; 1.590 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.148     ; 9.789      ;
; 1.612 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[8]                             ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.147     ; 9.768      ;
; 1.614 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.160     ; 9.753      ;
; 1.616 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.148     ; 9.763      ;
; 1.625 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|state[1]                        ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.542     ; 9.360      ;
; 1.629 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[0]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.156     ; 9.742      ;
; 1.630 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.163     ; 9.734      ;
; 1.633 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[10]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.148     ; 9.746      ;
; 1.636 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[0]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.156     ; 9.735      ;
; 1.637 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.160     ; 9.730      ;
; 1.637 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.163     ; 9.727      ;
; 1.645 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[12]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.147     ; 9.735      ;
; 1.646 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.151     ; 9.730      ;
; 1.651 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[14]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.141     ; 9.735      ;
; 1.659 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[13]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.154     ; 9.714      ;
; 1.661 ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.141     ; 9.725      ;
; 1.665 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.160     ; 9.702      ;
; 1.678 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.571     ; 9.278      ;
; 1.683 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.154     ; 9.690      ;
; 1.684 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[12]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.151     ; 9.692      ;
; 1.688 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.160     ; 9.679      ;
; 1.690 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[11]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.147     ; 9.690      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.155     ; 9.678      ;
; 1.706 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[18]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.155     ; 9.666      ;
; 1.707 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.151     ; 9.669      ;
; 1.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[18]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.142     ; 9.668      ;
; 1.722 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[17]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.155     ; 9.650      ;
; 1.724 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[14]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.141     ; 9.662      ;
; 1.725 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[22]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.142     ; 9.660      ;
; 1.726 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[21]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.142     ; 9.659      ;
; 1.727 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.167     ; 9.633      ;
; 1.734 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[7]                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.571     ; 9.222      ;
; 1.738 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[22]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.142     ; 9.647      ;
; 1.745 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.163     ; 9.619      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[0]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.156     ; 9.617      ;
; 1.755 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.163     ; 9.609      ;
; 1.765 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[11]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.162     ; 9.600      ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                                              ;
+-------+-------------------------+--------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node               ; To Node      ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------+--------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 4.440 ; svideo_yout_dly2[6]     ; cvbs2_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.066     ; 4.111      ;
; 4.441 ; svideo_yout_dly2[4]     ; cvbs2_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.066     ; 4.110      ;
; 4.521 ; svideo_yout_dly2[6]     ; cvbs2_out[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 4.029      ;
; 4.522 ; svideo_yout_dly2[4]     ; cvbs2_out[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 4.028      ;
; 4.710 ; svideo_yout_dly2[6]     ; cvbs2_out[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.840      ;
; 4.711 ; svideo_yout_dly2[2]     ; cvbs2_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.066     ; 3.840      ;
; 4.713 ; svideo_yout_dly2[4]     ; cvbs2_out[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.837      ;
; 4.716 ; svideo_yout_dly2[7]     ; cvbs2_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.066     ; 3.835      ;
; 4.727 ; svideo_yout_dly2[6]     ; cvbs2_out[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.823      ;
; 4.728 ; svideo_yout_dly2[4]     ; cvbs2_out[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.822      ;
; 4.732 ; svideo_yout_dly2[3]     ; cvbs2_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.066     ; 3.819      ;
; 4.740 ; svideo_yout_dly2[5]     ; cvbs2_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.066     ; 3.811      ;
; 4.750 ; svideo_yout_dly2[6]     ; cvbs2_out[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.800      ;
; 4.751 ; svideo_yout_dly2[4]     ; cvbs2_out[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.799      ;
; 4.784 ; svideo_yout_dly2[6]     ; cvbs2_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.764      ;
; 4.785 ; svideo_yout_dly2[4]     ; cvbs2_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.763      ;
; 4.792 ; svideo_yout_dly2[2]     ; cvbs2_out[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.758      ;
; 4.797 ; svideo_yout_dly2[7]     ; cvbs2_out[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.753      ;
; 4.813 ; svideo_yout_dly2[3]     ; cvbs2_out[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.737      ;
; 4.821 ; svideo_yout_dly2[5]     ; cvbs2_out[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.729      ;
; 4.981 ; svideo_yout_dly2[3]     ; cvbs2_out[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.569      ;
; 4.981 ; svideo_yout_dly2[5]     ; cvbs2_out[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.569      ;
; 4.983 ; svideo_yout_dly2[2]     ; cvbs2_out[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.567      ;
; 4.985 ; svideo_yout_dly2[6]     ; cvbs2_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.564      ;
; 4.988 ; svideo_yout_dly2[7]     ; cvbs2_out[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.562      ;
; 4.992 ; svideo_yout_dly2[4]     ; cvbs2_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.557      ;
; 4.998 ; svideo_yout_dly2[2]     ; cvbs2_out[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.552      ;
; 5.003 ; svideo_yout_dly2[7]     ; cvbs2_out[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.547      ;
; 5.004 ; svideo_yout_dly2[3]     ; cvbs2_out[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.546      ;
; 5.004 ; svideo_yout_dly2[5]     ; cvbs2_out[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.546      ;
; 5.021 ; svideo_yout_dly2[2]     ; cvbs2_out[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.529      ;
; 5.026 ; svideo_yout_dly2[7]     ; cvbs2_out[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.524      ;
; 5.042 ; svideo_yout_dly2[3]     ; cvbs2_out[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.508      ;
; 5.050 ; svideo_yout_dly2[5]     ; cvbs2_out[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.500      ;
; 5.055 ; svideo_yout_dly2[2]     ; cvbs2_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.493      ;
; 5.060 ; svideo_yout_dly2[7]     ; cvbs2_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.488      ;
; 5.072 ; svideo_yout_dly2[6]     ; cvbs2_out[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.476      ;
; 5.073 ; svideo_yout_dly2[4]     ; cvbs2_out[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.475      ;
; 5.074 ; svideo_yout_dly2[3]     ; cvbs2_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.474      ;
; 5.074 ; svideo_yout_dly2[5]     ; cvbs2_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.474      ;
; 5.256 ; svideo_yout_dly2[3]     ; cvbs2_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.293      ;
; 5.256 ; svideo_yout_dly2[5]     ; cvbs2_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.293      ;
; 5.263 ; svideo:svideo|chroma[2] ; cvbs1_out[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 3.292      ;
; 5.268 ; svideo_yout_dly2[2]     ; cvbs2_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.281      ;
; 5.273 ; svideo_yout_dly2[7]     ; cvbs2_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.276      ;
; 5.341 ; svideo_yout_dly2[0]     ; cvbs2_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.066     ; 3.210      ;
; 5.342 ; svideo_yout_dly2[1]     ; cvbs2_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.066     ; 3.209      ;
; 5.343 ; svideo_yout_dly2[2]     ; cvbs2_out[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.205      ;
; 5.348 ; svideo_yout_dly2[7]     ; cvbs2_out[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.200      ;
; 5.353 ; svideo_yout_dly2[3]     ; cvbs2_out[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.195      ;
; 5.353 ; svideo_yout_dly2[5]     ; cvbs2_out[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.195      ;
; 5.379 ; svideo:svideo|chroma[2] ; cvbs1_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 3.176      ;
; 5.408 ; svideo:svideo|chroma[2] ; cvbs1_out[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 3.147      ;
; 5.422 ; svideo_yout_dly2[0]     ; cvbs2_out[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.128      ;
; 5.437 ; svideo_yout_dly2[1]     ; cvbs2_out[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.113      ;
; 5.495 ; svideo:svideo|chroma[2] ; cvbs1_out[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 3.060      ;
; 5.524 ; svideo:svideo|chroma[2] ; cvbs1_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 3.031      ;
; 5.533 ; svideo:svideo|chroma[0] ; cvbs1_out[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 3.022      ;
; 5.563 ; svideo_yout_dly2[1]     ; cvbs2_out[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 2.987      ;
; 5.586 ; svideo_yout_dly2[1]     ; cvbs2_out[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 2.964      ;
; 5.611 ; svideo:svideo|chroma[2] ; cvbs1_out[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 2.944      ;
; 5.613 ; svideo_yout_dly2[0]     ; cvbs2_out[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 2.937      ;
; 5.628 ; svideo_yout_dly2[0]     ; cvbs2_out[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 2.922      ;
; 5.638 ; svideo_yout_dly2[1]     ; cvbs2_out[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 2.912      ;
; 5.640 ; svideo:svideo|chroma[2] ; cvbs1_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 2.915      ;
; 5.649 ; svideo:svideo|chroma[0] ; cvbs1_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 2.906      ;
; 5.651 ; svideo_yout_dly2[0]     ; cvbs2_out[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 2.899      ;
; 5.656 ; svideo_yout_dly2[1]     ; cvbs2_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 2.892      ;
; 5.661 ; svideo:svideo|chroma[1] ; cvbs1_out[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 2.894      ;
; 5.662 ; svideo:svideo|chroma[1] ; cvbs1_out[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 2.893      ;
; 5.678 ; svideo:svideo|chroma[0] ; cvbs1_out[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 2.877      ;
; 5.685 ; svideo_yout_dly2[0]     ; cvbs2_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 2.863      ;
; 5.724 ; svideo:svideo|chroma[4] ; cvbs1_out[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 2.831      ;
; 5.731 ; svideo:svideo|chroma[8] ; cvbs1_out[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 2.824      ;
; 5.765 ; svideo:svideo|chroma[0] ; cvbs1_out[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 2.790      ;
; 5.777 ; svideo:svideo|chroma[1] ; cvbs1_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 2.778      ;
; 5.778 ; svideo:svideo|chroma[1] ; cvbs1_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 2.777      ;
; 5.794 ; svideo:svideo|chroma[0] ; cvbs1_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 2.761      ;
; 5.802 ; cvbs1_out[9]            ; cvbs2_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.065     ; 2.750      ;
; 5.809 ; svideo:svideo|chroma[3] ; cvbs1_out[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 2.746      ;
; 5.812 ; svideo:svideo|chroma[3] ; cvbs1_out[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 2.743      ;
; 5.830 ; svideo:svideo|chroma[5] ; cvbs1_out[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 2.725      ;
; 5.838 ; svideo_yout_dly2[1]     ; cvbs2_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 2.711      ;
; 5.840 ; svideo:svideo|chroma[4] ; cvbs1_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 2.715      ;
; 5.852 ; svideo:svideo|chroma[6] ; cvbs1_out[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 2.703      ;
; 5.859 ; svideo:svideo|chroma[5] ; cvbs1_out[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 2.696      ;
; 5.869 ; svideo:svideo|chroma[4] ; cvbs1_out[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 2.686      ;
; 5.881 ; svideo:svideo|chroma[0] ; cvbs1_out[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 2.674      ;
; 5.883 ; cvbs1_out[4]            ; cvbs2_out[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.066     ; 2.668      ;
; 5.893 ; svideo:svideo|chroma[1] ; cvbs1_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 2.662      ;
; 5.894 ; svideo:svideo|chroma[1] ; cvbs1_out[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 2.661      ;
; 5.898 ; svideo_yout_dly2[0]     ; cvbs2_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 2.651      ;
; 5.910 ; svideo:svideo|chroma[0] ; cvbs1_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 2.645      ;
; 5.925 ; svideo:svideo|chroma[3] ; cvbs1_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 2.630      ;
; 5.928 ; svideo:svideo|chroma[3] ; cvbs1_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 2.627      ;
; 5.935 ; svideo_yout_dly2[1]     ; cvbs2_out[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 2.613      ;
; 5.940 ; cvbs1_out[2]            ; cvbs2_out[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.066     ; 2.611      ;
; 5.946 ; svideo:svideo|chroma[5] ; cvbs1_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 2.609      ;
; 5.956 ; svideo:svideo|chroma[4] ; cvbs1_out[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 2.599      ;
; 5.968 ; svideo:svideo|chroma[6] ; cvbs1_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.174     ; 2.587      ;
+-------+-------------------------+--------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                ;
+--------+-----------------------------------------------+---------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                     ; To Node                                           ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------+---------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 26.451 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.774      ;
; 26.451 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.774      ;
; 26.576 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.649      ;
; 26.576 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.649      ;
; 26.601 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.624      ;
; 26.601 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.624      ;
; 26.726 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.499      ;
; 26.726 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.499      ;
; 26.796 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.429      ;
; 26.796 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.429      ;
; 26.877 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[3]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 6.350      ;
; 26.877 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 6.350      ;
; 26.880 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 6.347      ;
; 26.894 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[5]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.100     ; 6.328      ;
; 26.894 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.100     ; 6.328      ;
; 26.917 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.308      ;
; 26.917 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.308      ;
; 26.921 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.304      ;
; 26.921 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.304      ;
; 26.922 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 6.305      ;
; 26.922 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 6.305      ;
; 26.923 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 6.304      ;
; 26.923 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[12] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 6.304      ;
; 27.027 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[3]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 6.200      ;
; 27.027 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 6.200      ;
; 27.030 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 6.197      ;
; 27.042 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.183      ;
; 27.042 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.183      ;
; 27.044 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[5]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.100     ; 6.178      ;
; 27.044 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.100     ; 6.178      ;
; 27.072 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 6.155      ;
; 27.072 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 6.155      ;
; 27.073 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 6.154      ;
; 27.073 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[12] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 6.154      ;
; 27.080 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[3]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 6.147      ;
; 27.080 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 6.147      ;
; 27.083 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 6.144      ;
; 27.097 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[5]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.100     ; 6.125      ;
; 27.097 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.100     ; 6.125      ;
; 27.125 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 6.102      ;
; 27.125 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 6.102      ;
; 27.126 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.099      ;
; 27.126 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.099      ;
; 27.126 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 6.101      ;
; 27.126 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[12] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 6.101      ;
; 27.152 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.073      ;
; 27.152 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.073      ;
; 27.172 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.053      ;
; 27.172 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 6.053      ;
; 27.179 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[10] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 6.048      ;
; 27.181 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[1]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 6.046      ;
; 27.181 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[2]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 6.046      ;
; 27.181 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[14] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 6.046      ;
; 27.182 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[7]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 6.045      ;
; 27.222 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[3]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 6.005      ;
; 27.222 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 6.005      ;
; 27.225 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 6.002      ;
; 27.239 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[5]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.100     ; 5.983      ;
; 27.239 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.100     ; 5.983      ;
; 27.251 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 5.974      ;
; 27.251 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 5.974      ;
; 27.261 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[3]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.966      ;
; 27.261 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.966      ;
; 27.264 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.963      ;
; 27.267 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.960      ;
; 27.267 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.960      ;
; 27.268 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.959      ;
; 27.268 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[12] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.959      ;
; 27.278 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[5]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.100     ; 5.944      ;
; 27.278 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.100     ; 5.944      ;
; 27.297 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 5.928      ;
; 27.297 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 5.928      ;
; 27.302 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 5.923      ;
; 27.302 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.097     ; 5.923      ;
; 27.306 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.921      ;
; 27.306 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.921      ;
; 27.307 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.920      ;
; 27.307 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[12] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.920      ;
; 27.318 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[3]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.909      ;
; 27.318 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.909      ;
; 27.321 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.906      ;
; 27.329 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[10] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.898      ;
; 27.331 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[1]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.896      ;
; 27.331 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[2]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.896      ;
; 27.331 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[14] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.896      ;
; 27.332 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[7]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.895      ;
; 27.335 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[5]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.100     ; 5.887      ;
; 27.335 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.100     ; 5.887      ;
; 27.343 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[3]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.884      ;
; 27.343 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.884      ;
; 27.346 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.881      ;
; 27.360 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[5]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.100     ; 5.862      ;
; 27.360 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.100     ; 5.862      ;
; 27.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.864      ;
; 27.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.864      ;
; 27.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.863      ;
; 27.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[12] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.863      ;
; 27.382 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[10] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.845      ;
; 27.384 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[1]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.843      ;
; 27.384 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[2]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.843      ;
+--------+-----------------------------------------------+---------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                                                                                                                                    ;
+--------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                                                                                                                                        ; To Node                                                                                                                                                             ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+--------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 45.143 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                              ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.249      ; 5.105      ;
; 45.890 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.272      ; 4.381      ;
; 45.915 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.258      ; 4.342      ;
; 46.008 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.272      ; 4.263      ;
; 46.057 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.258      ; 4.200      ;
; 46.059 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                              ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.253      ; 4.193      ;
; 46.337 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                   ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.271      ; 3.933      ;
; 46.618 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                   ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.271      ; 3.652      ;
; 46.640 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.266      ; 3.625      ;
; 46.758 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.272      ; 3.513      ;
; 46.849 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.257      ; 3.407      ;
; 47.057 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.257      ; 3.199      ;
; 47.149 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.257      ; 3.107      ;
; 47.336 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.258      ; 2.921      ;
; 47.349 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.260      ; 2.910      ;
; 47.448 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[3]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.269      ; 2.820      ;
; 47.531 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.273      ; 2.741      ;
; 47.630 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[0]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.266      ; 2.635      ;
; 47.643 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.258      ; 2.614      ;
; 47.648 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.256      ; 2.607      ;
; 47.794 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.273      ; 2.478      ;
; 48.022 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo_bypass_reg                                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.260      ; 2.237      ;
; 48.149 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|design_hash_reg[0]                                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.267      ; 2.117      ;
; 48.199 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[0]                                                                                                                               ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.260      ; 2.060      ;
; 94.382 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.072     ; 5.545      ;
; 94.382 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.072     ; 5.545      ;
; 94.382 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.072     ; 5.545      ;
; 94.382 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.072     ; 5.545      ;
; 94.382 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.072     ; 5.545      ;
; 94.382 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.072     ; 5.545      ;
; 94.382 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.072     ; 5.545      ;
; 94.382 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.072     ; 5.545      ;
; 94.382 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.072     ; 5.545      ;
; 95.215 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.084     ; 4.700      ;
; 95.215 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.084     ; 4.700      ;
; 95.215 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.084     ; 4.700      ;
; 95.215 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.084     ; 4.700      ;
; 95.215 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.084     ; 4.700      ;
; 95.215 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.084     ; 4.700      ;
; 95.215 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.084     ; 4.700      ;
; 95.215 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.084     ; 4.700      ;
; 95.330 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.602      ;
; 95.330 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.602      ;
; 95.330 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.602      ;
; 95.330 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.602      ;
; 95.330 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.602      ;
; 95.330 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.602      ;
; 95.330 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.602      ;
; 95.330 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.602      ;
; 95.330 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.602      ;
; 95.419 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.513      ;
; 95.419 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.513      ;
; 95.419 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.513      ;
; 95.419 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.513      ;
; 95.419 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.513      ;
; 95.419 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.513      ;
; 95.419 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.513      ;
; 95.419 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.513      ;
; 95.419 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.513      ;
; 95.442 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.310     ; 4.247      ;
; 95.472 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.049     ; 4.478      ;
; 95.472 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.049     ; 4.478      ;
; 95.472 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.049     ; 4.478      ;
; 95.472 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.049     ; 4.478      ;
; 95.472 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.049     ; 4.478      ;
; 95.610 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.310     ; 4.079      ;
; 95.622 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.310     ; 4.067      ;
; 95.623 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.061     ; 4.315      ;
; 95.623 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.061     ; 4.315      ;
; 95.623 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.061     ; 4.315      ;
; 95.623 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.061     ; 4.315      ;
; 95.623 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.061     ; 4.315      ;
; 95.623 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.061     ; 4.315      ;
; 95.623 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.061     ; 4.315      ;
; 95.623 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.061     ; 4.315      ;
; 95.630 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.310     ; 4.059      ;
; 95.638 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.294      ;
; 95.638 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.294      ;
; 95.638 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.294      ;
; 95.638 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.294      ;
; 95.638 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.294      ;
; 95.638 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.294      ;
; 95.638 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.294      ;
; 95.638 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.294      ;
; 95.638 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.294      ;
; 95.638 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.049     ; 4.312      ;
; 95.638 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.049     ; 4.312      ;
; 95.638 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.049     ; 4.312      ;
; 95.638 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.049     ; 4.312      ;
; 95.638 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.049     ; 4.312      ;
; 95.649 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.310     ; 4.040      ;
; 95.694 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.316     ; 3.989      ;
; 95.713 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.310     ; 3.976      ;
; 95.728 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.316     ; 3.955      ;
; 95.736 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.196      ;
; 95.736 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.196      ;
; 95.736 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.196      ;
; 95.736 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.196      ;
; 95.736 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.196      ;
; 95.736 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.196      ;
+--------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                                                              ;
+-------+---------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                 ; To Node                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.327 ; svideo:svideo|luma[8]     ; svideo:svideo|luma_1[8]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.142      ; 0.660      ;
; 0.405 ; svideo:svideo|luma_1[0]   ; svideo:svideo|luma_2[0]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.639      ;
; 0.405 ; svideo:svideo|luma_1[9]   ; svideo:svideo|luma_2[9]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.639      ;
; 0.406 ; svideo_yout_dly1[6]       ; svideo_yout_dly2[6]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.639      ;
; 0.407 ; svideo_yout_dly1[4]       ; svideo_yout_dly2[4]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.640      ;
; 0.408 ; svideo_yout_dly1[5]       ; svideo_yout_dly2[5]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.641      ;
; 0.466 ; svideo:svideo|luma[6]     ; svideo:svideo|luma_1[6]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.139      ; 0.796      ;
; 0.471 ; svideo:svideo|luma[0]     ; svideo:svideo|luma_1[0]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.142      ; 0.804      ;
; 0.476 ; svideo:svideo|luma[9]     ; svideo:svideo|luma_1[9]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.143      ; 0.810      ;
; 0.480 ; svideo:svideo|luma[5]     ; svideo:svideo|luma_1[5]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.142      ; 0.813      ;
; 0.492 ; svideo:svideo|luma[3]     ; svideo:svideo|luma_1[3]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.143      ; 0.826      ;
; 0.544 ; luma_saturated[9]         ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.777      ;
; 0.557 ; svideo_yout_dly1[3]       ; svideo_yout_dly2[3]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.790      ;
; 0.558 ; svideo_yout_dly1[0]       ; svideo_yout_dly2[0]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.791      ;
; 0.558 ; svideo:svideo|luma_acc[7] ; svideo_yout_dly1[5]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.792      ;
; 0.558 ; svideo_yout_dly1[2]       ; svideo_yout_dly2[2]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.791      ;
; 0.559 ; svideo:svideo|luma_1[2]   ; svideo:svideo|luma_2[2]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.793      ;
; 0.559 ; svideo_yout_dly1[1]       ; svideo_yout_dly2[1]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.792      ;
; 0.560 ; svideo:svideo|luma_1[8]   ; svideo:svideo|luma_2[8]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.794      ;
; 0.561 ; svideo:svideo|luma_acc[2] ; svideo_yout_dly1[0]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.795      ;
; 0.561 ; svideo_yout_dly1[7]       ; svideo_yout_dly2[7]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.794      ;
; 0.563 ; svideo:svideo|luma_1[7]   ; svideo:svideo|luma_2[7]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.797      ;
; 0.579 ; svideo:svideo|luma_1[1]   ; svideo:svideo|luma_2[1]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.813      ;
; 0.579 ; svideo:svideo|luma_1[5]   ; svideo:svideo|luma_2[5]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.813      ;
; 0.580 ; svideo:svideo|luma_1[3]   ; svideo:svideo|luma_2[3]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.814      ;
; 0.584 ; svideo:svideo|luma_acc[8] ; svideo_yout_dly1[6]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.818      ;
; 0.591 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.825      ;
; 0.591 ; svideo:svideo|luma_2[3]   ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.825      ;
; 0.592 ; svideo:svideo|luma_2[1]   ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.826      ;
; 0.593 ; svideo:svideo|luma_2[7]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.827      ;
; 0.593 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.827      ;
; 0.594 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.828      ;
; 0.596 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.830      ;
; 0.608 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.842      ;
; 0.630 ; svideo:svideo|luma[2]     ; svideo:svideo|luma_1[2]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.143      ; 0.964      ;
; 0.663 ; svideo:svideo|luma[2]     ; luma_saturated[2]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.143      ; 0.997      ;
; 0.663 ; svideo:svideo|luma[4]     ; svideo:svideo|luma_1[4]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.143      ; 0.997      ;
; 0.665 ; svideo:svideo|luma[9]     ; luma_saturated[9]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.143      ; 0.999      ;
; 0.666 ; svideo:svideo|luma[6]     ; luma_saturated[6]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.139      ; 0.996      ;
; 0.687 ; svideo:svideo|luma[0]     ; luma_saturated[0]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.142      ; 1.020      ;
; 0.702 ; svideo:svideo|luma[4]     ; luma_saturated[4]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.143      ; 1.036      ;
; 0.703 ; svideo:svideo|luma[3]     ; luma_saturated[3]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.143      ; 1.037      ;
; 0.722 ; svideo:svideo|luma_acc[9] ; svideo_yout_dly1[7]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.956      ;
; 0.722 ; svideo:svideo|luma_acc[4] ; svideo_yout_dly1[2]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.956      ;
; 0.741 ; luma_saturated[4]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.974      ;
; 0.744 ; luma_saturated[2]         ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.977      ;
; 0.753 ; luma_saturated[7]         ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.986      ;
; 0.753 ; svideo:svideo|luma_2[9]   ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.987      ;
; 0.754 ; luma_saturated[8]         ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.987      ;
; 0.755 ; svideo:svideo|luma_1[6]   ; svideo:svideo|luma_2[6]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.989      ;
; 0.756 ; luma_saturated[3]         ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.989      ;
; 0.756 ; svideo:svideo|luma_1[4]   ; svideo:svideo|luma_2[4]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.990      ;
; 0.756 ; svideo:svideo|luma_acc[3] ; svideo_yout_dly1[1]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.990      ;
; 0.756 ; svideo:svideo|luma_acc[6] ; svideo_yout_dly1[4]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.990      ;
; 0.757 ; svideo:svideo|luma_2[5]   ; svideo:svideo|luma_acc[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.059      ; 0.987      ;
; 0.757 ; svideo:svideo|luma_acc[5] ; svideo_yout_dly1[3]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.991      ;
; 0.787 ; luma_saturated[6]         ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.020      ;
; 0.789 ; luma_saturated[5]         ; cvbs1_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.022      ;
; 0.877 ; svideo:svideo|luma_2[3]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.111      ;
; 0.877 ; svideo:svideo|luma_2[1]   ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.111      ;
; 0.878 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.112      ;
; 0.879 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.113      ;
; 0.880 ; svideo:svideo|luma_2[7]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.114      ;
; 0.880 ; luma_saturated[1]         ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.113      ;
; 0.881 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.115      ;
; 0.882 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.116      ;
; 0.884 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.118      ;
; 0.890 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.124      ;
; 0.892 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.126      ;
; 0.893 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.127      ;
; 0.895 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.129      ;
; 0.923 ; svideo:svideo|luma[7]     ; luma_saturated[7]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.139      ; 1.253      ;
; 0.928 ; svideo:svideo|luma[1]     ; svideo:svideo|luma_1[1]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.139      ; 1.258      ;
; 0.950 ; svideo:svideo|luma[2]     ; luma_saturated[3]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.143      ; 1.284      ;
; 0.951 ; svideo:svideo|luma[6]     ; luma_saturated[7]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.139      ; 1.281      ;
; 0.954 ; svideo:svideo|luma_2[0]   ; svideo:svideo|luma_acc[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.064      ; 1.189      ;
; 0.961 ; svideo:svideo|luma[8]     ; luma_saturated[8]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.139      ; 1.291      ;
; 0.962 ; svideo:svideo|luma[5]     ; luma_saturated[5]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.139      ; 1.292      ;
; 0.974 ; svideo:svideo|luma[3]     ; luma_saturated[4]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.143      ; 1.308      ;
; 0.976 ; svideo:svideo|luma_2[3]   ; svideo:svideo|luma_acc[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.210      ;
; 0.976 ; svideo:svideo|luma_2[1]   ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.210      ;
; 0.977 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.211      ;
; 0.979 ; luma_saturated[1]         ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.212      ;
; 0.979 ; svideo:svideo|luma_2[7]   ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.213      ;
; 0.987 ; svideo:svideo|luma_2[3]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.221      ;
; 0.987 ; svideo:svideo|luma_2[1]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.221      ;
; 0.988 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.222      ;
; 0.989 ; svideo:svideo|luma[4]     ; luma_saturated[5]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.143      ; 1.323      ;
; 0.989 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.223      ;
; 0.990 ; luma_saturated[1]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.223      ;
; 0.991 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.225      ;
; 0.992 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.226      ;
; 0.994 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.228      ;
; 1.002 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.236      ;
; 1.003 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.237      ;
; 1.005 ; svideo:svideo|luma[3]     ; luma_saturated[5]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.143      ; 1.339      ;
; 1.005 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.239      ;
; 1.019 ; luma_saturated[2]         ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.252      ;
; 1.023 ; svideo:svideo|luma[2]     ; luma_saturated[4]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.143      ; 1.357      ;
; 1.024 ; svideo:svideo|luma[6]     ; luma_saturated[8]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.139      ; 1.354      ;
+-------+---------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                        ;
+-------+---------------------------------------------------------------------+---------------------------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                           ; To Node                                                             ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------------+---------------------------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 0.347 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.597      ;
; 0.363 ; cntr_reset[5]                                                       ; cntr_reset[5]                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; cntr_reset[6]                                                       ; cntr_reset[6]                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; cntr_reset[1]                                                       ; cntr_reset[1]                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; cntr_reset[2]                                                       ; cntr_reset[2]                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; reset_usbdrv                                                        ; reset_usbdrv                                                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[1]                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[2]                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state3                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state3                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[2]                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[2]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state4                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state4                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[0]                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[0]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[3]                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[3]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state2                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state2                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|val                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|val                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid                    ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[1]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[1]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[2]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[2]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[3]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[3]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_send_com.Idle                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_send_com.Idle                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_send_com.reset_start           ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_send_com.reset_start           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dp_previous                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dp_previous                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dm_previous                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dm_previous                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[5]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[5]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[7]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[7]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.getreport_sendpkt1_end  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.getreport_sendpkt1_end  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt1_end ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt1_end ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[7]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[7]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[4]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[4]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[5]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[5]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[6]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[6]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[3]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[3]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[2]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[2]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[1]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[1]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[0]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[0]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|val                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|val                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid                    ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.Idle                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.Idle                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.reset_start           ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.reset_start           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|send_frame                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|send_frame                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[0]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[0]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[1]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[1]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[4]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[4]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[2]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[2]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[3]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[3]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[6]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[6]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp_previous                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp_previous                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm_previous                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm_previous                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte9         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte9         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte10        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte10        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte11        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte11        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait40                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait40                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.send_getreport_ack_end  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.send_getreport_ack_end  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait20                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait20                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.start_get_data          ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.start_get_data          ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait21                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait21                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.getreport_sendpkt1_end  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.getreport_sendpkt1_end  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait30                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait30                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte2         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte2         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte3         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte3         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte4         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte4         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte5         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte5         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte6         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte6         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte7         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte7         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte8         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte8         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|set_command[0]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|set_command[0]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_configuration   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_configuration   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|set_command[1]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|set_command[1]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
+-------+---------------------------------------------------------------------+---------------------------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                              ;
+-------+----------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                  ; To Node                                                                                                                                                                                                                                  ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+----------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|state[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|state[1]                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.078      ; 0.597      ;
; 0.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|state[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|state[2]                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.078      ; 0.597      ;
; 0.356 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[6]                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 0.945      ;
; 0.357 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vscrol_raw_reg[2]                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.386      ; 0.944      ;
; 0.357 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vscrol_raw_reg[0]                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.386      ; 0.944      ;
; 0.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[3]                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.385      ; 0.945      ;
; 0.360 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[3]                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 0.949      ;
; 0.362 ; enable_divider:enable_179_clock_div_zpu_pokey|count_reg[1]                                                                 ; enable_divider:enable_179_clock_div_zpu_pokey|count_reg[1]                                                                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; enable_divider:enable_179_clock_div_zpu_pokey|count_reg[2]                                                                 ; enable_divider:enable_179_clock_div_zpu_pokey|count_reg[2]                                                                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; enable_divider:enable_179_clock_div_zpu_pokey|count_reg[3]                                                                 ; enable_divider:enable_179_clock_div_zpu_pokey|count_reg[3]                                                                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|insn.dec_insn_fetch                                                  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|insn.dec_insn_fetch                                                                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[15]                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[15]                                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[21]                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[21]                                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[20]                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[20]                                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[17]                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[17]                                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[4]                                                                            ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[4]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[1]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[1]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[0]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[0]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[2]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[2]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[3]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[3]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[4]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[4]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[7]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[7]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0] ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0]                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[3]                                                ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[3]                                                                                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[2]                                                ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[2]                                                                                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[1]                                                ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[1]                                                                                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_out_reg                                                        ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_out_reg                                                                                                                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|twotone_reg                                                           ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|twotone_reg                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[25]                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[25]                                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[28]                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[28]                                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[29]                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[29]                                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[0]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[0]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|ss_n[0]                                                     ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|ss_n[0]                                                                                                                                                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[31]                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[31]                                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[9]                                                                            ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[9]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[12]                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[12]                                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|spi_speed_reg[7]                                                                   ; zpucore:zpu|zpu_config_regs:config_regs|spi_speed_reg[7]                                                                                                                                                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_ip_framing_reg                                                 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_ip_framing_reg                                                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[23]                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[23]                                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[5]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[5]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_ip_overrun_reg                                                 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_ip_overrun_reg                                                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_load_sp2                                                    ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_load_sp2                                                                                                                                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_decode                                                      ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_decode                                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|sclk                                                        ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|sclk                                                                                                                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_cache_ready_reg                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_cache_ready_reg                                                                                                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[4]                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[4]                                                                                                                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serout_bitcount_reg[1]                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serout_bitcount_reg[1]                                                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serial_out_reg                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serial_out_reg                                                                                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[1]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[1]                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[2]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[2]                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[3]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[3]                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_clock_reg                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_clock_reg                                                                                                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pot_reset_reg                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pot_reset_reg                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[6]                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[6]                                                                                                                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serial_ip_framing_reg                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serial_ip_framing_reg                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vscrol_last_enabled_reg               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vscrol_last_enabled_reg                                                                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|first_line_of_instruction_reg         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|first_line_of_instruction_reg                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[5]                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[5]                                                                                                                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[3]                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[3]                                                                                                                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[2]                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[2]                                                                                                                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|vsync_reg                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|vsync_reg                                                                                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_bk_modify_reg[4]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_bk_modify_reg[4]                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_bk_modify_reg[5]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_bk_modify_reg[5]                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_bk_modify_reg[6]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_bk_modify_reg[6]                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_bk_modify_reg[7]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_bk_modify_reg[7]                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_bk_valid_reg[3]                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_bk_valid_reg[3]                                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_bk_modify_reg[2]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_bk_modify_reg[2]                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_bk_modify_reg[3]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_bk_modify_reg[3]                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[0]                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[0]                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p3pf_reg[2]                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p3pf_reg[2]                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m3pf_reg[2]                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m3pf_reg[2]                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pf_reg[2]                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pf_reg[2]                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pf_reg[2]                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pf_reg[2]                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pl_reg[3]                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pl_reg[3]                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pf_reg[3]                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pf_reg[3]                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pf_reg[3]                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pf_reg[3]                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m3pf_reg[3]                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m3pf_reg[3]                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p3pf_reg[3]                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p3pf_reg[3]                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pl_reg[1]                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pl_reg[1]                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_add_sp2                                                     ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_add_sp2                                                                                                                                                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_store_sp2                                                   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_store_sp2                                                                                                                                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_popped                                                      ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_popped                                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|idim_r                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|idim_r                                                                                                                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_loadb2                                                      ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_loadb2                                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[16]                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[16]                                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[22]                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[22]                                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[18]                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[18]                                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_clock_reg                                                       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_clock_reg                                                                                                                                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[2]                                                 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[2]                                                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[0]                                                 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[0]                                                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[1]                                                 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[1]                                                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[3]                                                 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[3]                                                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[1]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[1]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[6]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[6]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[5]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[5]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0] ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[0]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[0]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[3]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[3]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[1]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[1]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[2]                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[2]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
+-------+----------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                                                             ; To Node                                                                                                                                                                                                               ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 0.362 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.064      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[11]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[11]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                                                         ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                                                             ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                                                         ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo_bypass_reg                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo_bypass_reg                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.364 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                             ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.597      ;
; 0.374 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.608      ;
; 0.374 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.608      ;
; 0.374 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.608      ;
; 0.391 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|reset_ena_reg                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.625      ;
; 0.395 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.629      ;
; 0.395 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.629      ;
; 0.396 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[9]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.630      ;
; 0.402 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.636      ;
; 0.404 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.638      ;
; 0.405 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[7]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.639      ;
; 0.405 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[1]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[0]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.638      ;
; 0.405 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.639      ;
; 0.406 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[14]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.640      ;
; 0.406 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.064      ; 0.641      ;
; 0.406 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.640      ;
; 0.406 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.064      ; 0.641      ;
; 0.407 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.641      ;
; 0.407 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.640      ;
; 0.407 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.641      ;
; 0.407 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.640      ;
; 0.408 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.642      ;
; 0.408 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.642      ;
; 0.409 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.643      ;
; 0.409 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.643      ;
; 0.410 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.644      ;
; 0.410 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[2]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[3]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.644      ;
; 0.410 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.644      ;
; 0.411 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[12]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.645      ;
; 0.412 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[9]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[10]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.646      ;
; 0.412 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.646      ;
; 0.412 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.646      ;
; 0.412 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.646      ;
; 0.412 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.646      ;
; 0.412 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[3]                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[3]                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.646      ;
; 0.413 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[3]                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[2]                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.647      ;
; 0.417 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|mixer_addr_reg[4]                                                                                                                                       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|mixer_addr_reg[4]                                                                                                                                       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.650      ;
; 0.417 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[4]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[4]                                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.651      ;
; 0.419 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.653      ;
; 0.423 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.657      ;
; 0.425 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[11]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[12]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.659      ;
; 0.425 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.064      ; 0.660      ;
; 0.426 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[2]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.660      ;
; 0.427 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.660      ;
; 0.428 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.661      ;
; 0.431 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.318      ; 0.950      ;
; 0.439 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.322      ; 0.962      ;
; 0.444 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.322      ; 0.967      ;
; 0.449 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.322      ; 0.972      ;
; 0.460 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.322      ; 0.983      ;
; 0.460 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.322      ; 0.983      ;
; 0.464 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.322      ; 0.987      ;
; 0.465 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.318      ; 0.984      ;
; 0.466 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.322      ; 0.989      ;
; 0.473 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.318      ; 0.992      ;
; 0.489 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.318      ; 1.008      ;
; 0.490 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.316      ; 1.007      ;
; 0.495 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.322      ; 1.018      ;
; 0.497 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.314      ; 1.012      ;
; 0.497 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.316      ; 1.014      ;
; 0.502 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.316      ; 1.019      ;
; 0.516 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[3]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[2]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.750      ;
; 0.517 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.316      ; 1.034      ;
; 0.517 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.064      ; 0.752      ;
; 0.517 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[1]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[0]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.751      ;
; 0.518 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                                                                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.752      ;
; 0.518 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.752      ;
; 0.519 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.316      ; 1.036      ;
; 0.520 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.314      ; 1.035      ;
; 0.531 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.316      ; 1.048      ;
; 0.536 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.316      ; 1.053      ;
; 0.536 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][3]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.064      ; 0.771      ;
; 0.537 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.064      ; 0.772      ;
; 0.538 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.064      ; 0.773      ;
; 0.539 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.773      ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                ;
+-------+-----------------------------------------------------------------------------------------------------------------+-------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                       ; To Node                                               ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------+-------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.364 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                                                                      ; sdram_ctrl:sdram_controller|r_init_tmr[10]            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[0]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; sdram_ctrl:sdram_controller|r_init_fsm[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[1]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                           ; sdram_ctrl:sdram_controller|sdram_rdy                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; sdram_ctrl:sdram_controller|r_refr_act                                                                          ; sdram_ctrl:sdram_controller|r_refr_act                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; sdram_ctrl:sdram_controller|r_bst_stp[0]                                                                        ; sdram_ctrl:sdram_controller|r_bst_stp[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                                                                        ; sdram_ctrl:sdram_controller|r_rd_bctr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; sdram_ctrl:sdram_controller|r_rd_act                                                                            ; sdram_ctrl:sdram_controller|r_rd_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; sdram_ctrl:sdram_controller|r_wr_act                                                                            ; sdram_ctrl:sdram_controller|r_wr_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; sdram_request_complete_reg                                                                                      ; sdram_request_complete_reg                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.374 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[0]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.608      ;
; 0.375 ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                                                                        ; sdram_ctrl:sdram_controller|r_wr_bctr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.608      ;
; 0.410 ; sdram_ctrl:sdram_controller|r_rd_act                                                                            ; sdram_ctrl:sdram_controller|r_rd_bctr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.643      ;
; 0.567 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[17] ; ram_di_reg[1]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.142      ; 0.900      ;
; 0.568 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[18] ; ram_di_reg[2]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.142      ; 0.901      ;
; 0.569 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[19] ; ram_di_reg[3]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.142      ; 0.902      ;
; 0.569 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[31] ; ram_di_reg[15]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.142      ; 0.902      ;
; 0.571 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[23] ; ram_di_reg[7]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.142      ; 0.904      ;
; 0.580 ; seq_reg[1]                                                                                                      ; seq_reg[2]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.813      ;
; 0.587 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[8]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.821      ;
; 0.587 ; seq_reg[11]                                                                                                     ; sdram_ctrl:sdram_controller|r_init_fsm[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.821      ;
; 0.588 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[6]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.822      ;
; 0.591 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.825      ;
; 0.591 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.825      ;
; 0.592 ; seq_reg[9]                                                                                                      ; seq_reg[10]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.825      ;
; 0.592 ; sdram_ctrl:sdram_controller|r_init_tmr[9]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.826      ;
; 0.592 ; sdram_ctrl:sdram_controller|r_bst_stp[0]                                                                        ; sdram_ctrl:sdram_controller|r_rd_bctr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.825      ;
; 0.593 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.827      ;
; 0.593 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.827      ;
; 0.595 ; seq_reg[6]                                                                                                      ; seq_reg[7]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.828      ;
; 0.598 ; seq_reg[4]                                                                                                      ; seq_reg[5]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.831      ;
; 0.598 ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                                                                        ; sdram_ctrl:sdram_controller|r_rd_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.831      ;
; 0.602 ; seq_reg[3]                                                                                                      ; seq_reg[4]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.835      ;
; 0.608 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[1]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.842      ;
; 0.609 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[1]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.843      ;
; 0.611 ; seq_reg[11]                                                                                                     ; sdram_ctrl:sdram_controller|r_init_fsm[1]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.844      ;
; 0.614 ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                                                                        ; sdram_ctrl:sdram_controller|r_wr_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.847      ;
; 0.638 ; seq_reg[10]                                                                                                     ; seq_reg[11]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.871      ;
; 0.641 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[0]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.874      ;
; 0.677 ; sdram_ctrl:sdram_controller|r_refr_req                                                                          ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.911      ;
; 0.685 ; sdram_ctrl:sdram_controller|r_refr_act                                                                          ; sdram_ctrl:sdram_controller|r_rd_reg                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.918      ;
; 0.693 ; sdram_ctrl:sdram_controller|r_refr_act                                                                          ; sdram_ctrl:sdram_controller|r_wr_reg                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.926      ;
; 0.696 ; sdram_ctrl:sdram_controller|r_rd_act                                                                            ; sdram_ctrl:sdram_controller|ap1_rd_bst_act            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.930      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[21] ; ram_di_reg[5]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.142      ; 1.042      ;
; 0.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[24] ; ram_di_reg[8]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 1.041      ;
; 0.712 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[16] ; ram_di_reg[0]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 1.044      ;
; 0.733 ; seq_reg[0]                                                                                                      ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.967      ;
; 0.749 ; seq_reg[5]                                                                                                      ; seq_reg[6]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.982      ;
; 0.755 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.989      ;
; 0.776 ; seq_reg[7]                                                                                                      ; seq_reg[8]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 1.009      ;
; 0.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[30] ; ram_di_reg[14]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.142      ; 1.113      ;
; 0.781 ; seq_reg[9]                                                                                                      ; sdram_ctrl:sdram_controller|r_refr_act                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.015      ;
; 0.782 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[20] ; ram_di_reg[4]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.142      ; 1.115      ;
; 0.784 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[22] ; ram_di_reg[6]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.142      ; 1.117      ;
; 0.784 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[25] ; ram_di_reg[9]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.142      ; 1.117      ;
; 0.784 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[29] ; ram_di_reg[13]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 1.116      ;
; 0.788 ; sdram_ctrl:sdram_controller|r_psel_dly[0]                                                                       ; sdram_ctrl:sdram_controller|ap1_rd_bst_act            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.022      ;
; 0.791 ; seq_reg[10]                                                                                                     ; sdram_ctrl:sdram_controller|sdram_rdy                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 1.024      ;
; 0.806 ; seq_reg[4]                                                                                                      ; sdram_ctrl:sdram_controller|r_rd_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.061      ; 1.038      ;
; 0.842 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                                                                       ; sdram_ctrl:sdram_controller|r_refr_act                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 1.075      ;
; 0.845 ; sdram_ctrl:sdram_controller|r_wr_reg                                                                            ; sdram_ctrl:sdram_controller|r_wr_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.060      ; 1.076      ;
; 0.851 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[1]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.061      ; 1.083      ;
; 0.873 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.107      ;
; 0.873 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[11] ; ram_di_reg[11]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.142      ; 1.206      ;
; 0.873 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[9]  ; ram_di_reg[9]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.142      ; 1.206      ;
; 0.874 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                                                                      ; sdram_ctrl:sdram_controller|sdram_rdy                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 1.107      ;
; 0.874 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.108      ;
; 0.877 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.111      ;
; 0.878 ; seq_reg[11]                                                                                                     ; seq_reg[0]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.066      ; 1.115      ;
; 0.878 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.112      ;
; 0.878 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.112      ;
; 0.881 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[8]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.115      ;
; 0.881 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.115      ;
; 0.881 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.115      ;
; 0.882 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                                                                      ; sdram_ctrl:sdram_controller|r_init_fsm[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.116      ;
; 0.884 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[10]            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.061      ; 1.116      ;
; 0.888 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.122      ;
; 0.890 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                                                                      ; sdram_ctrl:sdram_controller|r_init_fsm[0]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.124      ;
; 0.892 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.126      ;
; 0.892 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.126      ;
; 0.892 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.126      ;
; 0.903 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                                                                       ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.065      ; 1.139      ;
; 0.906 ; seq_reg[11]                                                                                                     ; sdram_ctrl:sdram_controller|r_init_tmr[10]            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 1.139      ;
; 0.925 ; sdram_ctrl:sdram_controller|r_refr_req                                                                          ; sdram_ctrl:sdram_controller|r_wr_reg                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.060      ; 1.156      ;
; 0.926 ; sdram_ctrl:sdram_controller|r_refr_req                                                                          ; sdram_ctrl:sdram_controller|r_rd_reg                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.060      ; 1.157      ;
; 0.931 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[28] ; ram_di_reg[12]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.142      ; 1.264      ;
; 0.936 ; seq_reg[8]                                                                                                      ; seq_reg[9]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 1.169      ;
; 0.973 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[8]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.207      ;
; 0.977 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[6]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.211      ;
; 0.977 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.211      ;
; 0.980 ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1                                                           ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.214      ;
; 0.984 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.218      ;
; 0.987 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.221      ;
; 0.988 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.222      ;
; 0.988 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.222      ;
; 0.990 ; sdram_ctrl:sdram_controller|r_wr_act                                                                            ; sdram_ctrl:sdram_controller|r_wr_bctr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 1.223      ;
; 0.991 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[6]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.225      ;
; 0.991 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.225      ;
; 0.998 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.232      ;
+-------+-----------------------------------------------------------------------------------------------------------------+-------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                           ;
+-------+---------------------------------------+----------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                             ; To Node                                                        ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------+----------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 6.441 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[16]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.130     ; 5.068      ;
; 6.441 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[25]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.130     ; 5.068      ;
; 6.471 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[11]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.135     ; 5.033      ;
; 6.471 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[12]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.135     ; 5.033      ;
; 6.479 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[20]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.144     ; 5.016      ;
; 6.479 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[14]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.144     ; 5.016      ;
; 6.479 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[19]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.144     ; 5.016      ;
; 6.481 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.138     ; 5.020      ;
; 6.820 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.125     ; 4.694      ;
; 6.820 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[15]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.128     ; 4.691      ;
; 6.820 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[13]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.136     ; 4.683      ;
; 6.820 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[14]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.136     ; 4.683      ;
; 6.820 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[8]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.136     ; 4.683      ;
; 6.820 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[12]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.128     ; 4.691      ;
; 6.820 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[11]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.136     ; 4.683      ;
; 6.820 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[9]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.136     ; 4.683      ;
; 6.820 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[10]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.136     ; 4.683      ;
; 6.820 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[20]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.125     ; 4.694      ;
; 6.821 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[19]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.133     ; 4.685      ;
; 6.821 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[27]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.133     ; 4.685      ;
; 6.821 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[22]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.133     ; 4.685      ;
; 6.821 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[22]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.125     ; 4.693      ;
; 6.821 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[22]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.125     ; 4.693      ;
; 6.821 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[20]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.133     ; 4.685      ;
; 6.821 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[20]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.125     ; 4.693      ;
; 6.821 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[20]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.125     ; 4.693      ;
; 6.821 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[0]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.135     ; 4.683      ;
; 6.821 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[1]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.135     ; 4.683      ;
; 6.821 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[2]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.135     ; 4.683      ;
; 6.821 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[3]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.135     ; 4.683      ;
; 6.821 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[4]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.135     ; 4.683      ;
; 6.821 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[5]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.135     ; 4.683      ;
; 6.821 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[6]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.135     ; 4.683      ;
; 6.821 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[7]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.135     ; 4.683      ;
; 6.821 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[8]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.135     ; 4.683      ;
; 6.821 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[9]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.135     ; 4.683      ;
; 6.821 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[10]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.135     ; 4.683      ;
; 6.821 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[11]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.135     ; 4.683      ;
; 6.821 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[12]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.135     ; 4.683      ;
; 6.821 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[13]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.135     ; 4.683      ;
; 6.821 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[14]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.135     ; 4.683      ;
; 6.821 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[15]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.135     ; 4.683      ;
; 6.822 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[4]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.133     ; 4.684      ;
; 6.823 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.134     ; 4.682      ;
; 6.823 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[2]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.143     ; 4.673      ;
; 6.825 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[21]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.131     ; 4.683      ;
; 6.825 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[22]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.131     ; 4.683      ;
; 6.825 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[19]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.131     ; 4.683      ;
; 6.825 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[20]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.131     ; 4.683      ;
; 6.825 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[17]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.131     ; 4.683      ;
; 6.825 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[18]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.131     ; 4.683      ;
; 6.825 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[18]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.143     ; 4.671      ;
; 6.825 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[22]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.143     ; 4.671      ;
; 6.825 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[23]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.143     ; 4.671      ;
; 6.825 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[21]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.143     ; 4.671      ;
; 6.826 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[9]            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.130     ; 4.683      ;
; 6.826 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[10]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.130     ; 4.683      ;
; 6.827 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[13]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.118     ; 4.694      ;
; 6.827 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[8]            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.118     ; 4.694      ;
; 6.828 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[15]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.118     ; 4.693      ;
; 6.828 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[14]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.129     ; 4.682      ;
; 6.828 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[0]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.141     ; 4.670      ;
; 6.828 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[11]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.118     ; 4.693      ;
; 6.830 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[12]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.135     ; 4.674      ;
; 6.830 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.135     ; 4.674      ;
; 6.830 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.135     ; 4.674      ;
; 6.830 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.135     ; 4.674      ;
; 6.830 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.135     ; 4.674      ;
; 6.831 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.130     ; 4.678      ;
; 6.831 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.137     ; 4.671      ;
; 6.831 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_8BIT_WRITE_ENABLE_reg    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.137     ; 4.671      ;
; 6.831 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.130     ; 4.678      ;
; 6.831 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.137     ; 4.671      ;
; 6.831 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_READ_reg                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.137     ; 4.671      ;
; 6.831 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[1]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.136     ; 4.672      ;
; 6.832 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[22]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.130     ; 4.677      ;
; 6.832 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[2]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.137     ; 4.670      ;
; 6.832 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[0]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.137     ; 4.670      ;
; 6.832 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[3]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.137     ; 4.670      ;
; 6.832 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[1]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.137     ; 4.670      ;
; 6.832 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[16]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.137     ; 4.670      ;
; 6.832 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[17]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.137     ; 4.670      ;
; 6.833 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[0]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.135     ; 4.671      ;
; 6.833 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[6]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.135     ; 4.671      ;
; 6.833 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[1]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.135     ; 4.671      ;
; 6.833 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[6]            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.135     ; 4.671      ;
; 6.837 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[28]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.117     ; 4.685      ;
; 6.837 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[30]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.125     ; 4.677      ;
; 6.837 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[23]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.126     ; 4.676      ;
; 6.837 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[23]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.116     ; 4.686      ;
; 6.837 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[23]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.116     ; 4.686      ;
; 6.837 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[16]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.117     ; 4.685      ;
; 6.837 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[15]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.126     ; 4.676      ;
; 6.837 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[15]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.116     ; 4.686      ;
; 6.837 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[15]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.116     ; 4.686      ;
; 6.837 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[7]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.126     ; 4.676      ;
; 6.837 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[18]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.125     ; 4.677      ;
; 6.837 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[25]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.116     ; 4.686      ;
; 6.837 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[25]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.116     ; 4.686      ;
; 6.837 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[25]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.126     ; 4.676      ;
+-------+---------------------------------------+----------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                       ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node              ; To Node                                                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 8.363 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[7]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.241     ; 2.918      ;
; 8.427 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[6]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.169     ; 2.931      ;
; 8.427 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[7]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.170     ; 2.930      ;
; 8.427 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[8]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.170     ; 2.930      ;
; 8.427 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[9]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.168     ; 2.932      ;
; 8.427 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[11]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.168     ; 2.932      ;
; 8.428 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[4]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.167     ; 2.932      ;
; 8.428 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[5]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.167     ; 2.932      ;
; 8.433 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[8]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.287     ; 2.800      ;
; 8.437 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[9]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.303     ; 2.780      ;
; 8.440 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[14]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.298     ; 2.782      ;
; 8.440 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[13]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.298     ; 2.782      ;
; 8.440 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[15]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.298     ; 2.782      ;
; 8.441 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[10]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.299     ; 2.780      ;
; 8.441 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[11]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.299     ; 2.780      ;
; 8.441 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[12]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.299     ; 2.780      ;
; 8.447 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[0]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.160     ; 2.920      ;
; 8.447 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[1]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.160     ; 2.920      ;
; 8.447 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.160     ; 2.920      ;
; 8.448 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ba[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.159     ; 2.920      ;
; 8.448 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ba[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.159     ; 2.920      ;
; 8.449 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[8]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.180     ; 2.900      ;
; 8.450 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[2]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.155     ; 2.922      ;
; 8.450 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[3]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.155     ; 2.922      ;
; 8.450 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[7]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.156     ; 2.921      ;
; 8.453 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[4]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.298     ; 2.769      ;
; 8.453 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[9]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.196     ; 2.880      ;
; 8.456 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[13]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.191     ; 2.882      ;
; 8.456 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[14]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.191     ; 2.882      ;
; 8.456 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[15]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.191     ; 2.882      ;
; 8.457 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[0]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.286     ; 2.777      ;
; 8.457 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[1]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.286     ; 2.777      ;
; 8.457 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[5]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.290     ; 2.773      ;
; 8.457 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[2]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.286     ; 2.777      ;
; 8.457 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[10]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.192     ; 2.880      ;
; 8.457 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[11]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.192     ; 2.880      ;
; 8.457 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[12]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.192     ; 2.880      ;
; 8.458 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[6]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.288     ; 2.774      ;
; 8.461 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[3]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.288     ; 2.771      ;
; 8.469 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[4]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.191     ; 2.869      ;
; 8.473 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[0]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.179     ; 2.877      ;
; 8.473 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[1]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.179     ; 2.877      ;
; 8.473 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[2]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.179     ; 2.877      ;
; 8.473 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[5]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.183     ; 2.873      ;
; 8.474 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[6]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.181     ; 2.874      ;
; 8.477 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[3]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.181     ; 2.871      ;
; 8.645 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.167     ; 2.715      ;
; 8.668 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ras_n                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.156     ; 2.703      ;
; 8.668 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cas_n                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.156     ; 2.703      ;
; 8.668 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_we_n                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.156     ; 2.703      ;
; 8.668 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.156     ; 2.703      ;
; 8.668 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.156     ; 2.703      ;
; 8.905 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.148     ; 2.586      ;
; 8.908 ; sdram_reset_ctrl_n_reg ; sdram_request_reg                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.175     ; 2.556      ;
; 8.908 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_psel[0]                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.175     ; 2.556      ;
; 8.908 ; sdram_reset_ctrl_n_reg ; sdram_request_complete_reg                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.175     ; 2.556      ;
; 8.912 ; sdram_reset_ctrl_n_reg ; ram_do_reg[19]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.166     ; 2.561      ;
; 8.912 ; sdram_reset_ctrl_n_reg ; ram_do_reg[0]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.166     ; 2.561      ;
; 8.912 ; sdram_reset_ctrl_n_reg ; ram_do_reg[27]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.166     ; 2.561      ;
; 8.912 ; sdram_reset_ctrl_n_reg ; ram_do_reg[3]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.166     ; 2.561      ;
; 8.912 ; sdram_reset_ctrl_n_reg ; ram_do_reg[30]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.166     ; 2.561      ;
; 8.912 ; sdram_reset_ctrl_n_reg ; ram_do_reg[16]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.166     ; 2.561      ;
; 8.912 ; sdram_reset_ctrl_n_reg ; ram_do_reg[5]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.166     ; 2.561      ;
; 8.912 ; sdram_reset_ctrl_n_reg ; ram_do_reg[6]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.166     ; 2.561      ;
; 8.912 ; sdram_reset_ctrl_n_reg ; ram_do_reg[29]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.166     ; 2.561      ;
; 8.912 ; sdram_reset_ctrl_n_reg ; ram_do_reg[13]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.166     ; 2.561      ;
; 8.912 ; sdram_reset_ctrl_n_reg ; ram_do_reg[14]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.166     ; 2.561      ;
; 8.912 ; sdram_reset_ctrl_n_reg ; ram_do_reg[8]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.166     ; 2.561      ;
; 8.912 ; sdram_reset_ctrl_n_reg ; ram_do_reg[22]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.166     ; 2.561      ;
; 8.912 ; sdram_reset_ctrl_n_reg ; ram_do_reg[11]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.166     ; 2.561      ;
; 8.912 ; sdram_reset_ctrl_n_reg ; ram_do_reg[24]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.166     ; 2.561      ;
; 8.912 ; sdram_reset_ctrl_n_reg ; ram_do_reg[21]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.166     ; 2.561      ;
; 8.912 ; sdram_reset_ctrl_n_reg ; ram_di_reg[0]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.167     ; 2.560      ;
; 8.912 ; sdram_reset_ctrl_n_reg ; ram_di_reg[4]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.168     ; 2.559      ;
; 8.912 ; sdram_reset_ctrl_n_reg ; ram_di_reg[5]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.168     ; 2.559      ;
; 8.912 ; sdram_reset_ctrl_n_reg ; ram_di_reg[6]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.168     ; 2.559      ;
; 8.912 ; sdram_reset_ctrl_n_reg ; ram_di_reg[8]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.167     ; 2.560      ;
; 8.912 ; sdram_reset_ctrl_n_reg ; ram_di_reg[12]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.168     ; 2.559      ;
; 8.912 ; sdram_reset_ctrl_n_reg ; ram_di_reg[13]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.167     ; 2.560      ;
; 8.912 ; sdram_reset_ctrl_n_reg ; ram_di_reg[14]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.168     ; 2.559      ;
; 8.913 ; sdram_reset_ctrl_n_reg ; seq_reg[8]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 2.554      ;
; 8.913 ; sdram_reset_ctrl_n_reg ; seq_reg[9]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 2.554      ;
; 8.913 ; sdram_reset_ctrl_n_reg ; seq_reg[10]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 2.554      ;
; 8.913 ; sdram_reset_ctrl_n_reg ; seq_reg[11]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 2.554      ;
; 8.913 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 2.554      ;
; 8.913 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 2.554      ;
; 8.913 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 2.554      ;
; 8.913 ; sdram_reset_ctrl_n_reg ; ram_di_reg[2]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.169     ; 2.557      ;
; 8.913 ; sdram_reset_ctrl_n_reg ; ram_di_reg[3]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.169     ; 2.557      ;
; 8.913 ; sdram_reset_ctrl_n_reg ; ram_di_reg[10]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.169     ; 2.557      ;
; 8.913 ; sdram_reset_ctrl_n_reg ; ram_di_reg[11]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.169     ; 2.557      ;
; 8.913 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_oe                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.169     ; 2.557      ;
; 8.914 ; sdram_reset_ctrl_n_reg ; seq_reg[1]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 2.553      ;
; 8.914 ; sdram_reset_ctrl_n_reg ; seq_reg[2]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 2.553      ;
; 8.914 ; sdram_reset_ctrl_n_reg ; seq_reg[3]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 2.553      ;
; 8.914 ; sdram_reset_ctrl_n_reg ; seq_reg[4]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 2.553      ;
; 8.914 ; sdram_reset_ctrl_n_reg ; seq_reg[5]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 2.553      ;
; 8.914 ; sdram_reset_ctrl_n_reg ; seq_reg[6]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 2.553      ;
; 8.914 ; sdram_reset_ctrl_n_reg ; seq_reg[7]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 2.553      ;
; 8.914 ; sdram_reset_ctrl_n_reg ; seq_reg[0]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.169     ; 2.556      ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                            ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                        ; To Node                                                                                                                                                                        ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 48.606 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[8] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.260      ; 1.653      ;
; 97.342 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.058     ; 2.599      ;
; 97.342 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.058     ; 2.599      ;
; 97.342 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.058     ; 2.599      ;
; 97.342 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.058     ; 2.599      ;
; 97.464 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.058     ; 2.477      ;
; 97.464 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.058     ; 2.477      ;
; 97.464 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.058     ; 2.477      ;
; 97.464 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.058     ; 2.477      ;
; 97.510 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.068     ; 2.421      ;
; 97.510 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.068     ; 2.421      ;
; 97.510 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.068     ; 2.421      ;
; 97.579 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.072     ; 2.348      ;
; 97.579 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.072     ; 2.348      ;
; 97.579 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.072     ; 2.348      ;
; 97.579 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.072     ; 2.348      ;
; 97.579 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.072     ; 2.348      ;
; 97.579 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.072     ; 2.348      ;
; 97.579 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.072     ; 2.348      ;
; 97.579 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.072     ; 2.348      ;
; 97.579 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.072     ; 2.348      ;
; 97.766 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 2.171      ;
; 97.766 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 2.171      ;
; 97.809 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 2.128      ;
; 97.809 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 2.128      ;
; 97.809 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 2.128      ;
; 97.809 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 2.128      ;
; 97.929 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.060     ; 2.010      ;
; 97.959 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[3]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.060     ; 1.980      ;
; 97.959 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.060     ; 1.980      ;
; 97.959 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.060     ; 1.980      ;
; 97.959 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.060     ; 1.980      ;
; 97.959 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.060     ; 1.980      ;
; 97.984 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.050     ; 1.965      ;
; 97.984 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.050     ; 1.965      ;
; 97.984 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.050     ; 1.965      ;
; 97.984 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.050     ; 1.965      ;
; 97.984 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.050     ; 1.965      ;
; 97.984 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.050     ; 1.965      ;
; 97.984 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.050     ; 1.965      ;
; 97.984 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.050     ; 1.965      ;
; 97.984 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.050     ; 1.965      ;
; 97.984 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.050     ; 1.965      ;
; 97.984 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.050     ; 1.965      ;
; 97.984 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.050     ; 1.965      ;
; 98.000 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.937      ;
; 98.000 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.937      ;
; 98.000 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.937      ;
; 98.000 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.937      ;
; 98.122 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 1.810      ;
; 98.240 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.073     ; 1.686      ;
; 98.240 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.073     ; 1.686      ;
; 98.243 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 1.682      ;
; 98.246 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.691      ;
; 98.246 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.691      ;
; 98.246 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.691      ;
; 98.246 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.691      ;
; 98.246 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.691      ;
; 98.246 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.691      ;
; 98.246 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.691      ;
; 98.246 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.691      ;
; 98.246 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.691      ;
; 98.246 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.691      ;
; 98.254 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.061     ; 1.684      ;
; 98.254 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.061     ; 1.684      ;
; 98.254 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.061     ; 1.684      ;
; 98.254 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.061     ; 1.684      ;
; 98.254 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.061     ; 1.684      ;
; 98.254 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.061     ; 1.684      ;
; 98.254 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.061     ; 1.684      ;
; 98.254 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.061     ; 1.684      ;
; 98.254 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.061     ; 1.684      ;
; 98.262 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 1.663      ;
; 98.262 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 1.663      ;
; 98.262 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 1.663      ;
; 98.262 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 1.663      ;
; 98.262 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 1.663      ;
; 98.262 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 1.663      ;
; 98.262 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 1.663      ;
; 98.262 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 1.663      ;
; 98.262 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 1.663      ;
; 98.262 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 1.663      ;
; 98.272 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 1.652      ;
; 98.272 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 1.652      ;
; 98.272 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 1.652      ;
; 98.272 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[2]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 1.652      ;
; 98.273 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 1.667      ;
; 98.273 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 1.667      ;
; 98.273 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 1.667      ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                              ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node    ; To Node                                             ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 63.879 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.059     ; 2.717      ;
; 63.879 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.059     ; 2.717      ;
; 63.879 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.059     ; 2.717      ;
; 63.880 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.058     ; 2.717      ;
; 63.880 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.060     ; 2.715      ;
; 63.880 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.058     ; 2.717      ;
; 63.880 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.060     ; 2.715      ;
; 63.880 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.060     ; 2.715      ;
; 63.880 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.060     ; 2.715      ;
; 63.880 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.058     ; 2.717      ;
; 63.880 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.058     ; 2.717      ;
; 63.880 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.059     ; 2.716      ;
; 63.880 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.059     ; 2.716      ;
; 63.880 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.059     ; 2.716      ;
; 63.880 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.059     ; 2.716      ;
; 63.880 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.059     ; 2.716      ;
; 63.880 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.059     ; 2.716      ;
; 63.880 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.059     ; 2.716      ;
; 63.880 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.059     ; 2.716      ;
; 63.880 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.059     ; 2.716      ;
; 63.880 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.059     ; 2.716      ;
; 63.880 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.059     ; 2.716      ;
; 63.880 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.059     ; 2.716      ;
; 63.880 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.059     ; 2.716      ;
; 63.880 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.059     ; 2.716      ;
; 63.880 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.059     ; 2.716      ;
; 63.880 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.059     ; 2.716      ;
; 63.880 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.059     ; 2.716      ;
; 63.881 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.058     ; 2.716      ;
; 63.881 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.058     ; 2.716      ;
; 64.288 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 0.349      ; 2.716      ;
; 66.099 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.168      ; 2.724      ;
; 66.099 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.168      ; 2.724      ;
; 66.099 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.168      ; 2.724      ;
; 66.099 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.168      ; 2.724      ;
; 66.099 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.168      ; 2.724      ;
; 66.099 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.168      ; 2.724      ;
; 66.099 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.168      ; 2.724      ;
; 66.099 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.168      ; 2.724      ;
; 66.099 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.168      ; 2.724      ;
; 66.099 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.168      ; 2.724      ;
; 66.099 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.168      ; 2.724      ;
; 66.099 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.168      ; 2.724      ;
; 66.099 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.168      ; 2.724      ;
; 66.099 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.168      ; 2.724      ;
; 66.099 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.168      ; 2.724      ;
; 66.099 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.168      ; 2.724      ;
; 66.100 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.167      ; 2.722      ;
; 66.100 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.167      ; 2.722      ;
; 66.100 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.167      ; 2.722      ;
; 66.100 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.167      ; 2.722      ;
; 66.100 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.166      ; 2.721      ;
; 66.100 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.166      ; 2.721      ;
; 66.101 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.167      ; 2.721      ;
; 66.101 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.166      ; 2.720      ;
; 66.101 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.166      ; 2.720      ;
; 66.101 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.166      ; 2.720      ;
; 66.101 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.167      ; 2.721      ;
; 66.101 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.167      ; 2.721      ;
; 66.101 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.166      ; 2.720      ;
; 66.101 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.167      ; 2.721      ;
; 66.101 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.167      ; 2.721      ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                               ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node    ; To Node                                             ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; -0.029 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.414      ; 2.556      ;
; -0.029 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.414      ; 2.556      ;
; -0.028 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.412      ; 2.555      ;
; -0.028 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.412      ; 2.555      ;
; -0.028 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.412      ; 2.555      ;
; -0.028 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.413      ; 2.556      ;
; -0.028 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.413      ; 2.556      ;
; -0.028 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.413      ; 2.556      ;
; -0.028 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.413      ; 2.556      ;
; -0.028 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.413      ; 2.556      ;
; -0.028 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.412      ; 2.555      ;
; -0.028 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.412      ; 2.555      ;
; -0.028 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.412      ; 2.555      ;
; -0.028 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.413      ; 2.556      ;
; -0.028 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.413      ; 2.556      ;
; -0.027 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.414      ; 2.558      ;
; -0.027 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.414      ; 2.558      ;
; -0.027 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.414      ; 2.558      ;
; -0.027 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.414      ; 2.558      ;
; -0.026 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.414      ; 2.559      ;
; -0.026 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.414      ; 2.559      ;
; -0.026 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.414      ; 2.559      ;
; -0.026 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.414      ; 2.559      ;
; -0.026 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.414      ; 2.559      ;
; -0.026 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.414      ; 2.559      ;
; -0.026 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.414      ; 2.559      ;
; -0.026 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.414      ; 2.559      ;
; -0.026 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.414      ; 2.559      ;
; -0.026 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.414      ; 2.559      ;
; -0.026 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.414      ; 2.559      ;
; -0.026 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.414      ; 2.559      ;
; 1.890  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.491      ; 2.552      ;
; 2.313  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 2.552      ;
; 2.313  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 2.552      ;
; 2.313  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 2.552      ;
; 2.313  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 2.552      ;
; 2.313  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 2.552      ;
; 2.314  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.066      ; 2.551      ;
; 2.314  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.066      ; 2.551      ;
; 2.314  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.066      ; 2.551      ;
; 2.314  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.066      ; 2.551      ;
; 2.314  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 2.553      ;
; 2.314  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 2.552      ;
; 2.314  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 2.552      ;
; 2.314  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 2.552      ;
; 2.314  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 2.552      ;
; 2.314  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 2.552      ;
; 2.315  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 2.553      ;
; 2.315  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 2.553      ;
; 2.315  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 2.553      ;
; 2.315  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 2.553      ;
; 2.315  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 2.553      ;
; 2.315  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 2.553      ;
; 2.315  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 2.553      ;
; 2.315  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 2.553      ;
; 2.315  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 2.553      ;
; 2.315  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 2.553      ;
; 2.315  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 2.553      ;
; 2.315  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 2.553      ;
; 2.315  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 2.553      ;
; 2.315  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 2.553      ;
; 2.315  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 2.553      ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                           ; To Node                                                                                                                                                                                                                ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 1.296 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a5 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.808      ;
; 1.296 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a4 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.808      ;
; 1.296 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a3 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.808      ;
; 1.296 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a2 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.808      ;
; 1.296 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.808      ;
; 1.296 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 1.808      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a63  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a62  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a61  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a60  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a59  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a58  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a57  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a56  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a47  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a46  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a45  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a44  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a43  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a42  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a41  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a40  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a31  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a30  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a29  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a28  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a27  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a26  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a25  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a24  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a23  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a22  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a21  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a20  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a15  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a14  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a13  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a12  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a11  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a10  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a9   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.865      ;
; 1.526 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a55  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.043      ;
; 1.526 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a54  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.043      ;
; 1.526 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a53  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.043      ;
; 1.526 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a52  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.043      ;
; 1.526 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a51  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.043      ;
; 1.526 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a50  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.043      ;
; 1.526 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a49  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.043      ;
; 1.526 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a48  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.043      ;
; 1.526 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a39  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.043      ;
; 1.526 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a38  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.043      ;
; 1.526 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a37  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.043      ;
; 1.526 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a36  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.043      ;
; 1.526 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a35  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.043      ;
; 1.526 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a34  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.043      ;
; 1.526 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a33  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.043      ;
; 1.526 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a32  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.043      ;
; 1.526 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a19  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.043      ;
; 1.526 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a18  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.043      ;
; 1.526 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a17  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.043      ;
; 1.526 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a16  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.043      ;
; 1.526 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a7   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.043      ;
; 1.526 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a6   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.043      ;
; 1.526 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a5   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.043      ;
; 1.526 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a4   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.043      ;
; 1.526 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a3   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.043      ;
; 1.526 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a2   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.043      ;
; 1.526 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a1   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.043      ;
; 1.526 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.043      ;
; 1.591 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a6 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.103      ;
; 1.591 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a5 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.103      ;
; 1.591 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a4 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.103      ;
; 1.591 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a3 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.103      ;
; 1.591 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a2 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.103      ;
; 1.591 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.103      ;
; 1.591 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.103      ;
; 1.861 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a15   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.375      ;
; 1.861 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a14   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.375      ;
; 1.861 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a13   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.375      ;
; 1.861 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a12   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.375      ;
; 1.861 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a11   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.375      ;
; 1.861 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a10   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.375      ;
; 1.861 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a9    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.375      ;
; 1.861 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a8    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.375      ;
; 1.861 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a7    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.375      ;
; 1.861 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a6    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.375      ;
; 1.861 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a5    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.375      ;
; 1.861 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a4    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.375      ;
; 1.861 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a3    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.375      ;
; 1.861 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a2    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.375      ;
; 1.861 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a1    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.375      ;
; 1.861 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.375      ;
; 3.669 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[6]                                                                                                                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.588      ; 4.448      ;
; 3.669 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[7]                                                                                                                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.588      ; 4.448      ;
; 3.677 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[5]                                                                                                                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.589      ; 4.457      ;
; 3.677 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                                                                                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.588      ; 4.456      ;
; 4.013 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[6]                                                                                                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.497      ; 4.681      ;
; 4.046 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[3]                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.472      ; 4.689      ;
; 4.053 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[4]                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.468      ; 4.692      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                             ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                        ; To Node                                                                                                                                                                        ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 1.337  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.050      ; 1.558      ;
; 1.337  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.050      ; 1.558      ;
; 1.337  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.050      ; 1.558      ;
; 1.337  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[2]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.050      ; 1.558      ;
; 1.342  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 1.582      ;
; 1.342  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 1.582      ;
; 1.342  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 1.582      ;
; 1.350  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.051      ; 1.572      ;
; 1.350  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.051      ; 1.572      ;
; 1.350  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.051      ; 1.572      ;
; 1.350  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.051      ; 1.572      ;
; 1.350  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.051      ; 1.572      ;
; 1.350  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.051      ; 1.572      ;
; 1.350  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.051      ; 1.572      ;
; 1.350  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.051      ; 1.572      ;
; 1.350  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.051      ; 1.572      ;
; 1.350  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.051      ; 1.572      ;
; 1.363  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.600      ;
; 1.363  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.600      ;
; 1.363  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.600      ;
; 1.363  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.600      ;
; 1.363  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.600      ;
; 1.363  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.600      ;
; 1.363  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.600      ;
; 1.363  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.600      ;
; 1.363  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.600      ;
; 1.365  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.052      ; 1.588      ;
; 1.366  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 1.602      ;
; 1.366  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 1.602      ;
; 1.366  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 1.602      ;
; 1.366  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 1.602      ;
; 1.366  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 1.602      ;
; 1.366  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 1.602      ;
; 1.366  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 1.602      ;
; 1.366  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 1.602      ;
; 1.366  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 1.602      ;
; 1.366  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 1.602      ;
; 1.369  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.052      ; 1.592      ;
; 1.369  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.052      ; 1.592      ;
; 1.467  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.059      ; 1.697      ;
; 1.598  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.076      ; 1.845      ;
; 1.598  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.076      ; 1.845      ;
; 1.598  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.076      ; 1.845      ;
; 1.598  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.076      ; 1.845      ;
; 1.598  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.076      ; 1.845      ;
; 1.598  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.076      ; 1.845      ;
; 1.598  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.076      ; 1.845      ;
; 1.598  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.076      ; 1.845      ;
; 1.598  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.076      ; 1.845      ;
; 1.598  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.076      ; 1.845      ;
; 1.598  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.076      ; 1.845      ;
; 1.598  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.076      ; 1.845      ;
; 1.618  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.855      ;
; 1.618  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.855      ;
; 1.618  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.855      ;
; 1.618  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.855      ;
; 1.653  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[3]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.890      ;
; 1.653  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.890      ;
; 1.653  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.890      ;
; 1.653  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.890      ;
; 1.653  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.890      ;
; 1.674  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.067      ; 1.912      ;
; 1.783  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 2.020      ;
; 1.783  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 2.020      ;
; 1.783  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 2.020      ;
; 1.783  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 2.020      ;
; 1.814  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.064      ; 2.049      ;
; 1.814  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.064      ; 2.049      ;
; 1.974  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.081      ; 2.226      ;
; 1.974  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.081      ; 2.226      ;
; 1.974  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.081      ; 2.226      ;
; 1.974  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.081      ; 2.226      ;
; 1.974  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.081      ; 2.226      ;
; 1.974  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.081      ; 2.226      ;
; 1.974  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.081      ; 2.226      ;
; 1.974  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.081      ; 2.226      ;
; 1.974  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.081      ; 2.226      ;
; 2.025  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.085      ; 2.281      ;
; 2.025  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.085      ; 2.281      ;
; 2.025  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.085      ; 2.281      ;
; 2.037  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.067      ; 2.275      ;
; 2.037  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.067      ; 2.275      ;
; 2.037  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.067      ; 2.275      ;
; 2.037  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.067      ; 2.275      ;
; 2.214  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.067      ; 2.452      ;
; 2.214  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.067      ; 2.452      ;
; 2.214  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.067      ; 2.452      ;
; 2.214  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.067      ; 2.452      ;
; 50.986 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[8] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; -50.000      ; 0.392      ; 1.569      ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                        ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node              ; To Node                                                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 2.084 ; sdram_reset_ctrl_n_reg ; ram_do_reg[26]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.140      ; 2.415      ;
; 2.084 ; sdram_reset_ctrl_n_reg ; ram_do_reg[28]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.140      ; 2.415      ;
; 2.084 ; sdram_reset_ctrl_n_reg ; ram_do_reg[23]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.140      ; 2.415      ;
; 2.084 ; sdram_reset_ctrl_n_reg ; ram_do_reg[1]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.140      ; 2.415      ;
; 2.084 ; sdram_reset_ctrl_n_reg ; ram_do_reg[15]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.140      ; 2.415      ;
; 2.084 ; sdram_reset_ctrl_n_reg ; ram_do_reg[25]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.140      ; 2.415      ;
; 2.084 ; sdram_reset_ctrl_n_reg ; ram_do_reg[4]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.140      ; 2.415      ;
; 2.084 ; sdram_reset_ctrl_n_reg ; ram_do_reg[31]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.140      ; 2.415      ;
; 2.084 ; sdram_reset_ctrl_n_reg ; ram_do_reg[7]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.140      ; 2.415      ;
; 2.084 ; sdram_reset_ctrl_n_reg ; ram_do_reg[2]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.140      ; 2.415      ;
; 2.084 ; sdram_reset_ctrl_n_reg ; ram_do_reg[12]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.140      ; 2.415      ;
; 2.084 ; sdram_reset_ctrl_n_reg ; ram_do_reg[9]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.140      ; 2.415      ;
; 2.084 ; sdram_reset_ctrl_n_reg ; ram_do_reg[10]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.140      ; 2.415      ;
; 2.084 ; sdram_reset_ctrl_n_reg ; ram_do_reg[20]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.140      ; 2.415      ;
; 2.084 ; sdram_reset_ctrl_n_reg ; ram_do_reg[18]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.140      ; 2.415      ;
; 2.084 ; sdram_reset_ctrl_n_reg ; ram_do_reg[17]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.140      ; 2.415      ;
; 2.084 ; sdram_reset_ctrl_n_reg ; ram_di_reg[1]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.139      ; 2.414      ;
; 2.084 ; sdram_reset_ctrl_n_reg ; ram_di_reg[7]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.139      ; 2.414      ;
; 2.084 ; sdram_reset_ctrl_n_reg ; ram_di_reg[9]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.139      ; 2.414      ;
; 2.084 ; sdram_reset_ctrl_n_reg ; ram_di_reg[15]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.139      ; 2.414      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; seq_reg[1]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.131      ; 2.407      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; seq_reg[2]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.131      ; 2.407      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; seq_reg[3]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.131      ; 2.407      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; seq_reg[4]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.131      ; 2.407      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; seq_reg[5]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.131      ; 2.407      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; seq_reg[6]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.131      ; 2.407      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; seq_reg[7]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.131      ; 2.407      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; seq_reg[8]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.131      ; 2.407      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; seq_reg[9]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.131      ; 2.407      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; seq_reg[10]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.131      ; 2.407      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; seq_reg[11]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.131      ; 2.407      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; seq_reg[0]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.135      ; 2.411      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.135      ; 2.411      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.135      ; 2.411      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.135      ; 2.411      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.135      ; 2.411      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.135      ; 2.411      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.135      ; 2.411      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.135      ; 2.411      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.135      ; 2.411      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.135      ; 2.411      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.135      ; 2.411      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.131      ; 2.407      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.132      ; 2.408      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.131      ; 2.407      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.132      ; 2.408      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.131      ; 2.407      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_act                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.132      ; 2.408      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_reg                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.132      ; 2.408      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.131      ; 2.407      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_reg                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.132      ; 2.408      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_req                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.135      ; 2.411      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_oe                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.134      ; 2.410      ;
; 2.085 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.135      ; 2.411      ;
; 2.086 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.130      ; 2.407      ;
; 2.086 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.130      ; 2.407      ;
; 2.086 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.130      ; 2.407      ;
; 2.086 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.130      ; 2.407      ;
; 2.086 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.130      ; 2.407      ;
; 2.086 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.130      ; 2.407      ;
; 2.086 ; sdram_reset_ctrl_n_reg ; ram_di_reg[2]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.134      ; 2.411      ;
; 2.086 ; sdram_reset_ctrl_n_reg ; ram_di_reg[3]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.134      ; 2.411      ;
; 2.086 ; sdram_reset_ctrl_n_reg ; ram_di_reg[10]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.134      ; 2.411      ;
; 2.086 ; sdram_reset_ctrl_n_reg ; ram_di_reg[11]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.134      ; 2.411      ;
; 2.086 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[1]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.130      ; 2.407      ;
; 2.086 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[0]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.130      ; 2.407      ;
; 2.087 ; sdram_reset_ctrl_n_reg ; ram_do_reg[19]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.138      ; 2.416      ;
; 2.087 ; sdram_reset_ctrl_n_reg ; ram_do_reg[0]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.138      ; 2.416      ;
; 2.087 ; sdram_reset_ctrl_n_reg ; ram_do_reg[27]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.138      ; 2.416      ;
; 2.087 ; sdram_reset_ctrl_n_reg ; ram_do_reg[3]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.138      ; 2.416      ;
; 2.087 ; sdram_reset_ctrl_n_reg ; ram_do_reg[30]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.138      ; 2.416      ;
; 2.087 ; sdram_reset_ctrl_n_reg ; ram_do_reg[16]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.138      ; 2.416      ;
; 2.087 ; sdram_reset_ctrl_n_reg ; ram_do_reg[5]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.138      ; 2.416      ;
; 2.087 ; sdram_reset_ctrl_n_reg ; ram_do_reg[6]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.138      ; 2.416      ;
; 2.087 ; sdram_reset_ctrl_n_reg ; ram_do_reg[29]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.138      ; 2.416      ;
; 2.087 ; sdram_reset_ctrl_n_reg ; ram_do_reg[13]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.138      ; 2.416      ;
; 2.087 ; sdram_reset_ctrl_n_reg ; ram_do_reg[14]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.138      ; 2.416      ;
; 2.087 ; sdram_reset_ctrl_n_reg ; ram_do_reg[8]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.138      ; 2.416      ;
; 2.087 ; sdram_reset_ctrl_n_reg ; ram_do_reg[22]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.138      ; 2.416      ;
; 2.087 ; sdram_reset_ctrl_n_reg ; ram_do_reg[11]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.138      ; 2.416      ;
; 2.087 ; sdram_reset_ctrl_n_reg ; ram_do_reg[24]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.138      ; 2.416      ;
; 2.087 ; sdram_reset_ctrl_n_reg ; ram_do_reg[21]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.138      ; 2.416      ;
; 2.087 ; sdram_reset_ctrl_n_reg ; ram_di_reg[0]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.136      ; 2.414      ;
; 2.087 ; sdram_reset_ctrl_n_reg ; ram_di_reg[4]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.136      ; 2.414      ;
; 2.087 ; sdram_reset_ctrl_n_reg ; ram_di_reg[5]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.136      ; 2.414      ;
; 2.087 ; sdram_reset_ctrl_n_reg ; ram_di_reg[6]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.136      ; 2.414      ;
; 2.087 ; sdram_reset_ctrl_n_reg ; ram_di_reg[8]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.136      ; 2.414      ;
; 2.087 ; sdram_reset_ctrl_n_reg ; ram_di_reg[12]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.136      ; 2.414      ;
; 2.087 ; sdram_reset_ctrl_n_reg ; ram_di_reg[13]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.136      ; 2.414      ;
; 2.087 ; sdram_reset_ctrl_n_reg ; ram_di_reg[14]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.136      ; 2.414      ;
; 2.088 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.156      ; 2.435      ;
; 2.092 ; sdram_reset_ctrl_n_reg ; sdram_request_reg                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.128      ; 2.411      ;
; 2.092 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_psel[0]                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.128      ; 2.411      ;
; 2.092 ; sdram_reset_ctrl_n_reg ; sdram_request_complete_reg                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.128      ; 2.411      ;
; 2.307 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ras_n                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.129      ; 2.553      ;
; 2.307 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cas_n                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.129      ; 2.553      ;
; 2.307 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_we_n                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.129      ; 2.553      ;
; 2.307 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.129      ; 2.553      ;
; 2.307 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.129      ; 2.553      ;
; 2.330 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.118      ; 2.565      ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                         ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+---------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                                                          ; Clock Edge ; Target                    ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+---------------------------+
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[5]   ;
; 4.090 ; 4.308        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[8]   ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[2]              ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[3]              ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[4]              ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[5]              ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[6]              ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[7]              ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[8]              ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[9]              ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[0]         ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[1]         ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[2]         ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[3]         ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[4]         ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[5]         ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[6]         ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[7]         ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[8]         ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[9]         ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[0]   ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[1]   ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[2]   ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[3]   ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[4]   ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[6]   ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[7]   ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[9]   ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[0]   ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[1]   ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[2]   ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[3]   ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[4]   ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[5]   ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[6]   ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[7]   ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[8]   ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[9]   ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[0] ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[1] ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[2] ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[3] ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[4] ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[5] ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[6] ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[7] ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[8] ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[9] ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[0]       ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[1]       ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[2]       ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[3]       ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[4]       ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[5]       ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[6]       ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[7]       ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[0]       ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[1]       ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[2]       ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[3]       ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[4]       ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[5]       ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[6]       ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[7]       ;
; 4.204 ; 4.355        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[0]              ;
; 4.204 ; 4.355        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[1]              ;
; 4.204 ; 4.355        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[2]              ;
; 4.204 ; 4.355        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[3]              ;
; 4.204 ; 4.355        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[7]              ;
; 4.205 ; 4.356        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[4]              ;
; 4.205 ; 4.356        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[5]              ;
; 4.205 ; 4.356        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[6]              ;
; 4.218 ; 4.374        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[4]              ;
; 4.218 ; 4.374        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[5]              ;
; 4.218 ; 4.374        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[6]              ;
; 4.219 ; 4.375        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[0]              ;
; 4.219 ; 4.375        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[1]              ;
; 4.219 ; 4.375        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[2]              ;
; 4.219 ; 4.375        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[3]              ;
; 4.219 ; 4.375        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[7]              ;
; 4.232 ; 4.418        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[2]              ;
; 4.232 ; 4.418        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[3]              ;
; 4.232 ; 4.418        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[4]              ;
; 4.232 ; 4.418        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[5]              ;
; 4.232 ; 4.418        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[6]              ;
; 4.232 ; 4.418        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[7]              ;
; 4.232 ; 4.418        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[8]              ;
; 4.232 ; 4.418        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[9]              ;
; 4.232 ; 4.418        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[0]         ;
; 4.232 ; 4.418        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[1]         ;
; 4.232 ; 4.418        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[2]         ;
; 4.232 ; 4.418        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[3]         ;
; 4.232 ; 4.418        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[4]         ;
; 4.232 ; 4.418        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[5]         ;
; 4.232 ; 4.418        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[6]         ;
; 4.232 ; 4.418        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[7]         ;
; 4.232 ; 4.418        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[8]         ;
; 4.232 ; 4.418        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[9]         ;
; 4.232 ; 4.418        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[0]   ;
; 4.232 ; 4.418        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[1]   ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+---------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                         ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-----------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                                                          ; Clock Edge ; Target                                                    ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-----------------------------------------------------------+
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[15]                                            ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[1]                                             ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[7]                                             ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[9]                                             ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[0]                                             ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[10]                                            ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[11]                                            ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[12]                                            ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[13]                                            ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[14]                                            ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[15]                                            ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[16]                                            ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[17]                                            ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[18]                                            ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[19]                                            ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[1]                                             ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[20]                                            ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[21]                                            ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[22]                                            ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[23]                                            ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[24]                                            ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[25]                                            ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[26]                                            ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[27]                                            ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[28]                                            ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[29]                                            ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[2]                                             ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[30]                                            ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[31]                                            ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[3]                                             ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[4]                                             ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[5]                                             ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[6]                                             ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[7]                                             ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[8]                                             ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[9]                                             ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_refr_req                    ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1     ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[0]                                                ;
; 5.547 ; 5.765        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_bena_reg[0]                                           ;
; 5.547 ; 5.765        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_bena_reg[1]                                           ;
; 5.547 ; 5.765        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[0]                                             ;
; 5.547 ; 5.765        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[10]                                            ;
; 5.547 ; 5.765        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[11]                                            ;
; 5.547 ; 5.765        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[12]                                            ;
; 5.547 ; 5.765        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[13]                                            ;
; 5.547 ; 5.765        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[14]                                            ;
; 5.547 ; 5.765        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[2]                                             ;
; 5.547 ; 5.765        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[3]                                             ;
; 5.547 ; 5.765        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[4]                                             ;
; 5.547 ; 5.765        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[5]                                             ;
; 5.547 ; 5.765        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[6]                                             ;
; 5.547 ; 5.765        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[8]                                             ;
; 5.547 ; 5.765        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ;
; 5.547 ; 5.765        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ;
; 5.547 ; 5.765        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_act                      ;
; 5.547 ; 5.765        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ;
; 5.547 ; 5.765        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_act                      ;
; 5.547 ; 5.765        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ;
; 5.548 ; 5.766        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ;
; 5.548 ; 5.766        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ;
; 5.548 ; 5.766        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ;
; 5.548 ; 5.766        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ;
; 5.548 ; 5.766        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ;
; 5.548 ; 5.766        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_reg                      ;
; 5.548 ; 5.766        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_refr_act                    ;
; 5.548 ; 5.766        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_dq_oe                 ;
; 5.548 ; 5.766        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_reg                      ;
; 5.548 ; 5.766        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|sdram_rdy                     ;
; 5.548 ; 5.766        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[10]                                               ;
; 5.548 ; 5.766        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[11]                                               ;
; 5.548 ; 5.766        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[1]                                                ;
; 5.548 ; 5.766        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[2]                                                ;
; 5.548 ; 5.766        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[3]                                                ;
; 5.548 ; 5.766        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[4]                                                ;
; 5.548 ; 5.766        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[5]                                                ;
; 5.548 ; 5.766        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[6]                                                ;
; 5.548 ; 5.766        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[7]                                                ;
; 5.548 ; 5.766        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[8]                                                ;
; 5.548 ; 5.766        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[9]                                                ;
; 5.549 ; 5.767        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_psel[0]                     ;
; 5.549 ; 5.767        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ;
; 5.549 ; 5.767        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_request_complete_reg                                ;
; 5.549 ; 5.767        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_request_reg                                         ;
; 5.611 ; 5.767        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[8]                   ;
; 5.613 ; 5.769        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[13]                  ;
; 5.613 ; 5.769        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[14]                  ;
; 5.613 ; 5.769        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[15]                  ;
; 5.613 ; 5.769        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[9]                   ;
; 5.614 ; 5.770        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[0]                   ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-----------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                              ;
+--------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                                          ; Clock Edge ; Target                                                                                                                        ;
+--------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------+
; 17.161 ; 17.379       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[0]                              ;
; 17.161 ; 17.379       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[1]                              ;
; 17.161 ; 17.379       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[3]                              ;
; 17.161 ; 17.379       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[4]                              ;
; 17.161 ; 17.379       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[0]                              ;
; 17.161 ; 17.379       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[1]                              ;
; 17.161 ; 17.379       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[2]                              ;
; 17.161 ; 17.379       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[3]                              ;
; 17.161 ; 17.379       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[6]                              ;
; 17.163 ; 17.381       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[0]                              ;
; 17.163 ; 17.381       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[1]                              ;
; 17.163 ; 17.381       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[2]                              ;
; 17.163 ; 17.381       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[3]                              ;
; 17.164 ; 17.382       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]        ;
; 17.164 ; 17.382       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[0]                              ;
; 17.164 ; 17.382       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[1]                              ;
; 17.164 ; 17.382       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[2]                              ;
; 17.165 ; 17.383       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|porta_output_reg[3]                          ;
; 17.166 ; 17.384       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[5]         ;
; 17.166 ; 17.384       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|porta_output_reg[4]                          ;
; 17.166 ; 17.384       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|porta_output_reg[6]                          ;
; 17.166 ; 17.384       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[6]                          ;
; 17.166 ; 17.384       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[6]                                                                             ;
; 17.166 ; 17.384       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[7]                                                                             ;
; 17.167 ; 17.385       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29]       ;
; 17.167 ; 17.385       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38]       ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27]       ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]        ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37]       ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[0]                                                          ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[10]                                                         ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[11]                                                         ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[13]                                                         ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[15]                                                         ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[17]                                                         ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[1]                                                          ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[2]                                                          ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[3]                                                          ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[4]                                                          ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[5]                                                          ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[6]                                                          ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[8]                                                          ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[9]                                                          ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[5]                                                                             ;
; 17.169 ; 17.387       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[4]                      ;
; 17.169 ; 17.387       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                            ;
; 17.170 ; 17.388       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|state[1]    ;
; 17.170 ; 17.388       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|state[2]    ;
; 17.170 ; 17.388       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[7]                       ;
; 17.170 ; 17.388       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[15]       ;
; 17.170 ; 17.388       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[23]       ;
; 17.170 ; 17.388       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[24]       ;
; 17.170 ; 17.388       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[25]       ;
; 17.170 ; 17.388       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32]       ;
; 17.170 ; 17.388       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[33]       ;
; 17.170 ; 17.388       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36]       ;
; 17.170 ; 17.388       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]        ;
; 17.170 ; 17.388       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[7]        ;
; 17.171 ; 17.389       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[3]                      ;
; 17.171 ; 17.389       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]         ;
; 17.171 ; 17.389       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]        ;
; 17.171 ; 17.389       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35]       ;
; 17.171 ; 17.389       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]        ;
; 17.174 ; 17.392       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[10]       ;
; 17.174 ; 17.392       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[16]       ;
; 17.174 ; 17.392       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]        ;
; 17.174 ; 17.392       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[21]       ;
; 17.174 ; 17.392       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[34]       ;
; 17.177 ; 17.395       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19]       ;
; 17.177 ; 17.395       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[20]       ;
; 17.177 ; 17.395       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22]       ;
; 17.177 ; 17.395       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28]       ;
; 17.177 ; 17.395       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[30]       ;
; 17.177 ; 17.395       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39]       ;
; 17.177 ; 17.395       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]        ;
; 17.177 ; 17.395       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[41]       ;
; 17.182 ; 17.400       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|dac_out                                                                                                      ;
; 17.183 ; 17.401       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|VOLUME_OUT_R_REG[12] ;
; 17.183 ; 17.401       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|VOLUME_OUT_R_REG[13] ;
; 17.183 ; 17.401       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p1[13]                                                                                            ;
; 17.183 ; 17.401       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p1[14]                                                                                            ;
; 17.183 ; 17.401       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p1[15]                                                                                            ;
; 17.183 ; 17.401       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p1[16]                                                                                            ;
; 17.183 ; 17.401       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p1[17]                                                                                            ;
; 17.183 ; 17.401       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p1[18]                                                                                            ;
; 17.183 ; 17.401       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p1[19]                                                                                            ;
; 17.183 ; 17.401       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p1[20]                                                                                            ;
; 17.183 ; 17.401       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p1[21]                                                                                            ;
; 17.183 ; 17.401       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p1[22]                                                                                            ;
; 17.183 ; 17.401       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p1[23]                                                                                            ;
; 17.183 ; 17.401       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p2[12]                                                                                            ;
; 17.183 ; 17.401       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p2[13]                                                                                            ;
; 17.183 ; 17.401       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p2[14]                                                                                            ;
; 17.183 ; 17.401       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p2[15]                                                                                            ;
; 17.183 ; 17.401       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p2[16]                                                                                            ;
; 17.183 ; 17.401       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p2[17]                                                                                            ;
; 17.183 ; 17.401       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p2[18]                                                                                            ;
; 17.183 ; 17.401       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p2[19]                                                                                            ;
; 17.183 ; 17.401       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p2[20]                                                                                            ;
; 17.183 ; 17.401       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p2[21]                                                                                            ;
+--------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                         ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                ; Clock Edge ; Target                                                                                   ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+------------------------------------------------------------------------------------------+
; 17.424 ; 17.424       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]           ;
; 17.424 ; 17.424       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]           ;
; 17.424 ; 17.424       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]           ;
; 17.424 ; 17.424       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]           ;
; 17.424 ; 17.424       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|observablevcoout ;
; 17.435 ; 17.435       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; mcc_pll3|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl|inclk[0]               ;
; 17.435 ; 17.435       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; mcc_pll3|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl|outclk                 ;
; 17.448 ; 17.448       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]         ;
; 17.472 ; 17.472       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]         ;
; 17.484 ; 17.484       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; mcc_pll3|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl|inclk[0]               ;
; 17.484 ; 17.484       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; mcc_pll3|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl|outclk                 ;
; 17.495 ; 17.495       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]           ;
; 17.495 ; 17.495       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]           ;
; 17.495 ; 17.495       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]           ;
; 17.495 ; 17.495       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]           ;
; 17.495 ; 17.495       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|observablevcoout ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                             ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+--------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                ; Clock Edge ; Target                                                       ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+--------------------------------------------------------------+
; 32.970 ; 33.188       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dplus_buf1                  ;
; 32.993 ; 33.211       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp2_prev~_emulated          ;
; 32.993 ; 33.211       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dplus_buf2                  ;
; 32.993 ; 33.211       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyleft_out[0]              ;
; 32.993 ; 33.211       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyleft_out[1]              ;
; 32.993 ; 33.211       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyleft_out[2]              ;
; 32.993 ; 33.211       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyleft_out[3]              ;
; 32.993 ; 33.211       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyright_out[3]             ;
; 32.993 ; 33.211       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[0]       ;
; 32.993 ; 33.211       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[1]       ;
; 32.993 ; 33.211       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[2]       ;
; 32.993 ; 33.211       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[3]       ;
; 32.993 ; 33.211       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[4]       ;
; 32.993 ; 33.211       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[5]       ;
; 32.993 ; 33.211       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[6]       ;
; 32.993 ; 33.211       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[7]       ;
; 32.993 ; 33.211       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[8]       ;
; 32.993 ; 33.211       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[9]       ;
; 32.994 ; 33.212       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm1_last~_emulated          ;
; 32.994 ; 33.212       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dminus_buf1                 ;
; 32.994 ; 33.212       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dminus_buf2                 ;
; 32.994 ; 33.212       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp1_last~_emulated          ;
; 32.994 ; 33.212       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]                  ;
; 32.994 ; 33.212       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]                  ;
; 32.994 ; 33.212       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]                  ;
; 32.994 ; 33.212       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]                  ;
; 32.994 ; 33.212       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid             ;
; 32.994 ; 33.212       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[0]                 ;
; 32.994 ; 33.212       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]                 ;
; 32.994 ; 33.212       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]                 ;
; 32.994 ; 33.212       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|synch                       ;
; 32.994 ; 33.212       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1           ;
; 32.994 ; 33.212       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2           ;
; 32.994 ; 33.212       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3           ;
; 32.994 ; 33.212       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4           ;
; 32.994 ; 33.212       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|val                         ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[0]              ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[1]              ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[2]              ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[3]              ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[4]              ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[5]              ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[6]              ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[7]              ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[8]              ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]                ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]                ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]                ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]                ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]                ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]                ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]                ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]                ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[0]                ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]                ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]                ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]                ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[4]                ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[5]                ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[6]                ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[7]                ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dminus~en                   ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp_previous                 ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dplus~en                    ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rden_sig                    ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|send_frame                  ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.Idle           ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.end_send1      ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.end_send2      ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.reset_released ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.reset_start    ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send1          ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send2          ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send3          ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send_bit0      ;
; 32.995 ; 33.213       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send_complete  ;
; 32.997 ; 33.215       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[0]              ;
; 32.997 ; 33.215       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[1]              ;
; 32.997 ; 33.215       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[2]              ;
; 32.997 ; 33.215       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[3]              ;
; 32.997 ; 33.215       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[4]              ;
; 32.997 ; 33.215       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[5]              ;
; 32.997 ; 33.215       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[6]              ;
; 32.997 ; 33.215       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[7]              ;
; 32.997 ; 33.215       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[0]           ;
; 32.997 ; 33.215       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[1]           ;
; 32.997 ; 33.215       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[2]           ;
; 32.997 ; 33.215       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[3]           ;
; 32.997 ; 33.215       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[4]           ;
; 32.997 ; 33.215       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[5]           ;
; 32.997 ; 33.215       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[6]           ;
; 32.997 ; 33.215       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[7]           ;
; 32.997 ; 33.215       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[0]               ;
; 32.997 ; 33.215       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[1]               ;
; 32.997 ; 33.215       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[2]               ;
; 32.997 ; 33.215       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[3]               ;
; 32.997 ; 33.215       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[5]               ;
; 32.997 ; 33.215       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[6]               ;
; 32.997 ; 33.215       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[7]               ;
; 32.997 ; 33.215       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[8]               ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+--------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: 'altera_reserved_tck'                                                                                                                                                                                                                                                      ;
+--------+--------------+----------------+------------------+---------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock               ; Clock Edge ; Target                                                                                                                                                                                                                ;
+--------+--------------+----------------+------------------+---------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 49.395 ; 49.628       ; 0.233          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ;
; 49.395 ; 49.628       ; 0.233          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                           ;
; 49.396 ; 49.629       ; 0.233          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ;
; 49.396 ; 49.629       ; 0.233          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                           ;
; 49.397 ; 49.630       ; 0.233          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ;
; 49.398 ; 49.631       ; 0.233          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ;
; 49.471 ; 49.689       ; 0.218          ; High Pulse Width ; altera_reserved_tck ; Fall       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                   ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                   ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]                                                   ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]                                                   ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]                                                   ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[2] ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[3] ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                   ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                   ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]                                                   ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]                                                   ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]                                                   ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[2] ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[3] ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                                                                                                                                                 ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|design_hash_reg[0]                                                                                                                                      ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|design_hash_reg[1]                                                                                                                                      ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|design_hash_reg[2]                                                                                                                                      ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|design_hash_reg[3]                                                                                                                                      ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[0]                                                                                                                                    ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[1]                                                                                                                                    ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[2]                                                                                                                                    ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[3]                                                                                                                                    ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[0]                                                                                                                           ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[1]                                                                                                                           ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[2]                                                                                                                           ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[3]                                                                                                                           ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[0]                                                                                                                          ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[1]                                                                                                                          ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[2]                                                                                                                          ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[3]                                                                                                                          ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                                                             ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                                                             ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                             ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[3]                                                                                                                                             ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                                                             ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                                                          ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                                                          ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                                                          ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                                                          ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                                                          ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                                                          ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                                                          ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                                                          ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                                                          ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                                                          ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|mixer_addr_reg[0]                                                                                                                                       ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|mixer_addr_reg[1]                                                                                                                                       ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|mixer_addr_reg[2]                                                                                                                                       ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|mixer_addr_reg[3]                                                                                                                                       ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|mixer_addr_reg[4]                                                                                                                                       ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|reset_ena_reg                                                                                                                                           ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[0]                                                                                                                      ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[1]                                                                                                                      ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[2]                                                                                                                      ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[3]                                                                                                                      ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[0]                                                                                                                 ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[1]                                                                                                                 ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[2]                                                                                                                 ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[3]                                                                                                                 ;
; 49.514 ; 49.700       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[4]                                                                                                                 ;
+--------+--------------+----------------+------------------+---------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: 'FPGA_CLK'                                                                                                ;
+---------+--------------+----------------+------------------+----------+------------+----------------------------------------------------------------+
; Slack   ; Actual Width ; Required Width ; Type             ; Clock    ; Clock Edge ; Target                                                         ;
+---------+--------------+----------------+------------------+----------+------------+----------------------------------------------------------------+
; 99.779  ; 99.779       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]           ;
; 99.779  ; 99.779       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1]           ;
; 99.779  ; 99.779       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|observablevcoout ;
; 99.828  ; 99.828       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; FPGA_CLK~input|o                                               ;
; 99.857  ; 99.857       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|inclk[0]         ;
; 100.000 ; 100.000      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; FPGA_CLK~input|i                                               ;
; 100.000 ; 100.000      ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; FPGA_CLK~input|i                                               ;
; 100.142 ; 100.142      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|inclk[0]         ;
; 100.172 ; 100.172      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; FPGA_CLK~input|o                                               ;
; 100.218 ; 100.218      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]           ;
; 100.218 ; 100.218      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1]           ;
; 100.218 ; 100.218      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|observablevcoout ;
; 196.000 ; 200.000      ; 4.000          ; Port Rate        ; FPGA_CLK ; Rise       ; FPGA_CLK                                                       ;
+---------+--------------+----------------+------------------+----------+------------+----------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                                                                             ;
+---------------------+---------------------+-------+-------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+-------+-------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]         ; FPGA_CLK            ; 2.358 ; 2.529 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 2.341 ; 2.512 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 2.341 ; 2.512 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 2.341 ; 2.512 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 2.343 ; 2.514 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 2.353 ; 2.524 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 2.345 ; 2.516 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 2.343 ; 2.514 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 2.293 ; 2.463 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 2.342 ; 2.513 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 2.358 ; 2.529 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 2.354 ; 2.525 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 2.354 ; 2.525 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 2.354 ; 2.525 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 2.353 ; 2.524 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 2.353 ; 2.524 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 2.353 ; 2.524 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0             ; FPGA_CLK            ; 3.111 ; 3.334 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; altera_reserved_tdi ; altera_reserved_tck ; 3.245 ; 3.611 ; Rise       ; altera_reserved_tck                                                            ;
; altera_reserved_tms ; altera_reserved_tck ; 8.245 ; 8.483 ; Rise       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; 4.547 ; 4.861 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; 1.182 ; 1.483 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 4.455 ; 4.758 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 1.080 ; 1.372 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 4.846 ; 5.088 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 2.374 ; 2.637 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+-------+-------+------------+--------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]         ; FPGA_CLK            ; -1.518 ; -1.688 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; -1.560 ; -1.731 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; -1.560 ; -1.731 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; -1.560 ; -1.731 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; -1.563 ; -1.734 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; -1.572 ; -1.743 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; -1.565 ; -1.736 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; -1.563 ; -1.734 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; -1.518 ; -1.688 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; -1.562 ; -1.733 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; -1.579 ; -1.750 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; -1.574 ; -1.745 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; -1.574 ; -1.745 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; -1.574 ; -1.745 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; -1.573 ; -1.744 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; -1.573 ; -1.744 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; -1.573 ; -1.744 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0             ; FPGA_CLK            ; -2.252 ; -2.464 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; altera_reserved_tdi ; altera_reserved_tck ; -0.352 ; -0.609 ; Rise       ; altera_reserved_tck                                                            ;
; altera_reserved_tms ; altera_reserved_tck ; -2.302 ; -2.488 ; Rise       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; -3.838 ; -4.141 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; -0.412 ; -0.695 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; -3.750 ; -4.044 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; -0.281 ; -0.555 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; -3.857 ; -4.153 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; -1.334 ; -1.624 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                                                                     ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_A[*]          ; FPGA_CLK            ; 5.000  ; 5.175  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]         ; FPGA_CLK            ; 2.793  ; 2.643  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]         ; FPGA_CLK            ; 2.793  ; 2.643  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]         ; FPGA_CLK            ; 2.797  ; 2.647  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]         ; FPGA_CLK            ; 2.797  ; 2.647  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]         ; FPGA_CLK            ; 2.785  ; 2.635  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]         ; FPGA_CLK            ; 2.785  ; 2.635  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]         ; FPGA_CLK            ; 2.783  ; 2.633  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]         ; FPGA_CLK            ; 2.092  ; 2.035  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]         ; FPGA_CLK            ; 5.000  ; 5.175  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]         ; FPGA_CLK            ; 2.784  ; 2.634  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]        ; FPGA_CLK            ; 2.793  ; 2.643  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]        ; FPGA_CLK            ; 2.784  ; 2.634  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]         ; FPGA_CLK            ; 5.011  ; 5.186  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]        ; FPGA_CLK            ; 5.011  ; 5.186  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]        ; FPGA_CLK            ; 2.103  ; 2.046  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N         ; FPGA_CLK            ; 2.106  ; 2.049  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N          ; FPGA_CLK            ; 2.796  ; 2.646  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]         ; FPGA_CLK            ; 4.441  ; 4.774  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 3.104  ; 3.041  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 3.104  ; 3.041  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 3.104  ; 3.041  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 4.441  ; 4.774  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 4.432  ; 4.765  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 2.249  ; 2.212  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 2.973  ; 2.852  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 2.796  ; 2.646  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 3.102  ; 3.039  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 4.425  ; 4.758  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 3.090  ; 3.027  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 3.090  ; 3.027  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 3.090  ; 3.027  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 4.431  ; 4.764  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 3.091  ; 3.028  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 3.091  ; 3.028  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n        ; FPGA_CLK            ; 2.785  ; 2.635  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n        ; FPGA_CLK            ; 2.796  ; 2.646  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N         ; FPGA_CLK            ; 2.796  ; 2.646  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N          ; FPGA_CLK            ; 5.014  ; 5.189  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L             ; FPGA_CLK            ; 5.102  ; 5.335  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R             ; FPGA_CLK            ; 3.075  ; 2.947  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK              ; FPGA_CLK            ; 3.780  ; 3.670  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD              ; FPGA_CLK            ; 4.185  ; 4.089  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3             ; FPGA_CLK            ; 3.920  ; 4.072  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK           ; FPGA_CLK            ; 11.697 ;        ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK           ; FPGA_CLK            ;        ; 11.898 ; Fall       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]            ; FPGA_CLK            ; 4.310  ; 4.578  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]           ; FPGA_CLK            ; 2.093  ; 2.036  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]           ; FPGA_CLK            ; 4.310  ; 4.578  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]           ; FPGA_CLK            ; 2.092  ; 2.035  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]           ; FPGA_CLK            ; 2.095  ; 2.038  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]            ; FPGA_CLK            ; 4.312  ; 4.580  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]           ; FPGA_CLK            ; 2.094  ; 2.037  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]           ; FPGA_CLK            ; 2.094  ; 2.037  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]           ; FPGA_CLK            ; 2.094  ; 2.037  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]           ; FPGA_CLK            ; 4.312  ; 4.580  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; altera_reserved_tdo ; altera_reserved_tck ; 13.085 ; 13.984 ; Fall       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; 4.636  ; 4.627  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; 6.843  ; 6.733  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 7.257  ; 6.974  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 6.714  ; 6.817  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                                                                             ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_A[*]          ; FPGA_CLK            ; 1.451  ; 1.394  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]         ; FPGA_CLK            ; 2.124  ; 1.977  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]         ; FPGA_CLK            ; 2.124  ; 1.977  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]         ; FPGA_CLK            ; 2.129  ; 1.982  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]         ; FPGA_CLK            ; 2.129  ; 1.982  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]         ; FPGA_CLK            ; 2.117  ; 1.970  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]         ; FPGA_CLK            ; 2.117  ; 1.970  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]         ; FPGA_CLK            ; 2.115  ; 1.968  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]         ; FPGA_CLK            ; 1.451  ; 1.394  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]         ; FPGA_CLK            ; 4.332  ; 4.510  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]         ; FPGA_CLK            ; 2.116  ; 1.969  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]        ; FPGA_CLK            ; 2.124  ; 1.977  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]        ; FPGA_CLK            ; 2.116  ; 1.969  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]         ; FPGA_CLK            ; 1.462  ; 1.405  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]        ; FPGA_CLK            ; 4.343  ; 4.521  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]        ; FPGA_CLK            ; 1.462  ; 1.405  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N         ; FPGA_CLK            ; 1.465  ; 1.408  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N          ; FPGA_CLK            ; 2.128  ; 1.981  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]         ; FPGA_CLK            ; 1.608  ; 1.570  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 2.434  ; 2.373  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 2.434  ; 2.373  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 2.434  ; 2.373  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 3.800  ; 4.132  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 3.790  ; 4.122  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 1.608  ; 1.570  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 2.304  ; 2.185  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 2.128  ; 1.981  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 2.433  ; 2.372  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 3.785  ; 4.117  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 2.421  ; 2.360  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 2.421  ; 2.360  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 2.421  ; 2.360  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 3.790  ; 4.122  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 2.422  ; 2.361  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 2.422  ; 2.361  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n        ; FPGA_CLK            ; 2.117  ; 1.970  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n        ; FPGA_CLK            ; 2.128  ; 1.981  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N         ; FPGA_CLK            ; 2.128  ; 1.981  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N          ; FPGA_CLK            ; 4.346  ; 4.524  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L             ; FPGA_CLK            ; 4.338  ; 4.572  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R             ; FPGA_CLK            ; 2.304  ; 2.178  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK              ; FPGA_CLK            ; 2.980  ; 2.871  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD              ; FPGA_CLK            ; 3.368  ; 3.273  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3             ; FPGA_CLK            ; 3.111  ; 3.260  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK           ; FPGA_CLK            ; 10.984 ;        ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK           ; FPGA_CLK            ;        ; 11.186 ; Fall       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]            ; FPGA_CLK            ; 1.451  ; 1.394  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]           ; FPGA_CLK            ; 1.452  ; 1.395  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]           ; FPGA_CLK            ; 3.669  ; 3.937  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]           ; FPGA_CLK            ; 1.451  ; 1.394  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]           ; FPGA_CLK            ; 1.454  ; 1.397  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]            ; FPGA_CLK            ; 1.453  ; 1.396  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]           ; FPGA_CLK            ; 1.453  ; 1.396  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]           ; FPGA_CLK            ; 1.453  ; 1.396  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]           ; FPGA_CLK            ; 1.453  ; 1.396  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]           ; FPGA_CLK            ; 3.671  ; 3.939  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; altera_reserved_tdo ; altera_reserved_tck ; 10.741 ; 11.637 ; Fall       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; 4.098  ; 4.090  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; 6.214  ; 6.106  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 6.710  ; 6.425  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 6.088  ; 6.189  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                                                      ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 3.184 ; 3.135 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 3.594 ; 3.545 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 3.594 ; 3.545 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 3.594 ; 3.545 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 5.939 ; 6.202 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 6.655 ; 6.918 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 4.419 ; 4.309 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 4.109 ; 3.999 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 3.814 ; 3.686 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 3.519 ; 3.470 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 5.270 ; 5.533 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 3.184 ; 3.135 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 3.184 ; 3.135 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 3.184 ; 3.135 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 5.275 ; 5.538 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 3.214 ; 3.165 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 3.214 ; 3.165 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 3.798 ; 3.670 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 4.684 ; 4.635 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2       ; FPGA_CLK   ; 6.899 ; 6.789 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1        ; FPGA_CLK   ; 6.984 ; 7.247 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2        ; FPGA_CLK   ; 6.632 ; 6.522 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                                                              ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 2.438 ; 2.389 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 2.831 ; 2.782 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 2.831 ; 2.782 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 2.831 ; 2.782 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 5.164 ; 5.427 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 5.852 ; 6.115 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 3.618 ; 3.508 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 3.321 ; 3.211 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 2.997 ; 2.869 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 2.759 ; 2.710 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 4.523 ; 4.786 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 2.438 ; 2.389 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 2.438 ; 2.389 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 2.438 ; 2.389 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 4.527 ; 4.790 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 2.466 ; 2.417 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 2.466 ; 2.417 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 2.980 ; 2.852 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 4.163 ; 4.114 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2       ; FPGA_CLK   ; 6.287 ; 6.177 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1        ; FPGA_CLK   ; 6.454 ; 6.717 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2        ; FPGA_CLK   ; 6.030 ; 5.920 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                                                             ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 3.147     ; 3.196     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 3.552     ; 3.601     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 3.552     ; 3.601     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 3.552     ; 3.601     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 6.191     ; 5.928     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 6.829     ; 6.566     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 4.211     ; 4.321     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 3.928     ; 4.038     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 3.645     ; 3.773     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 3.461     ; 3.510     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 5.543     ; 5.280     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 3.147     ; 3.196     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 3.147     ; 3.196     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 3.147     ; 3.196     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 5.548     ; 5.285     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 3.175     ; 3.224     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 3.175     ; 3.224     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 3.624     ; 3.752     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 4.609     ; 4.658     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2       ; FPGA_CLK   ; 6.722     ; 6.832     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1        ; FPGA_CLK   ; 7.198     ; 6.935     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2        ; FPGA_CLK   ; 6.493     ; 6.603     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                                                     ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 2.400     ; 2.449     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 2.789     ; 2.838     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 2.789     ; 2.838     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 2.789     ; 2.838     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 5.417     ; 5.154     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 6.030     ; 5.767     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 3.414     ; 3.524     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 3.142     ; 3.252     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 2.829     ; 2.957     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 2.702     ; 2.751     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 4.795     ; 4.532     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 2.400     ; 2.449     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 2.400     ; 2.449     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 2.400     ; 2.449     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 4.800     ; 4.537     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 2.427     ; 2.476     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 2.427     ; 2.476     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 2.808     ; 2.936     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 4.089     ; 4.138     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2       ; FPGA_CLK   ; 6.113     ; 6.223     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1        ; FPGA_CLK   ; 6.670     ; 6.407     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2        ; FPGA_CLK   ; 5.892     ; 6.002     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+


---------------------------------------------
; Slow 1200mV 0C Model Metastability Report ;
---------------------------------------------
No synchronizer chains to report.


+---------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup Summary                                                                      ;
+--------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                          ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; -0.404 ; -6.061        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.697  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 6.422  ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 29.708 ; 0.000         ;
; altera_reserved_tck                                                            ; 47.533 ; 0.000         ;
+--------------------------------------------------------------------------------+--------+---------------+


+--------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold Summary                                                                      ;
+--------------------------------------------------------------------------------+-------+---------------+
; Clock                                                                          ; Slack ; End Point TNS ;
+--------------------------------------------------------------------------------+-------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.138 ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.140 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 0.179 ; 0.000         ;
; altera_reserved_tck                                                            ; 0.187 ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.188 ; 0.000         ;
+--------------------------------------------------------------------------------+-------+---------------+


+---------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery Summary                                                                   ;
+--------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                          ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.699  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 9.788  ; 0.000         ;
; altera_reserved_tck                                                            ; 49.518 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 65.054 ; 0.000         ;
+--------------------------------------------------------------------------------+--------+---------------+


+---------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal Summary                                                                    ;
+--------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                          ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------------------+--------+---------------+
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; -0.007 ; -0.162        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.690  ; 0.000         ;
; altera_reserved_tck                                                            ; 0.704  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 1.161  ; 0.000         ;
+--------------------------------------------------------------------------------+--------+---------------+


+---------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width Summary                                                        ;
+--------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                          ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 4.152  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.606  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.205 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[1]                           ; 17.437 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 33.026 ; 0.000         ;
; altera_reserved_tck                                                            ; 49.285 ; 0.000         ;
; FPGA_CLK                                                                       ; 99.418 ; 0.000         ;
+--------------------------------------------------------------------------------+--------+---------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                         ;
+--------+--------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                        ; To Node                                                                                                                 ; Launch Clock                                         ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; -0.404 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[28]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.785     ; 2.710      ;
; -0.399 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[28]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.785     ; 2.705      ;
; -0.342 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[28]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.785     ; 2.648      ;
; -0.335 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[27]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.785     ; 2.641      ;
; -0.330 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[27]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.785     ; 2.636      ;
; -0.318 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.791     ; 2.618      ;
; -0.315 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[27]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.785     ; 2.621      ;
; -0.313 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.791     ; 2.613      ;
; -0.298 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.791     ; 2.598      ;
; -0.274 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[28]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.785     ; 2.580      ;
; -0.259 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[22]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.795     ; 2.555      ;
; -0.254 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[22]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.795     ; 2.550      ;
; -0.249 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.629     ; 2.711      ;
; -0.248 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[27]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.785     ; 2.554      ;
; -0.240 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[26]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.789     ; 2.542      ;
; -0.240 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.790     ; 2.541      ;
; -0.236 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[0]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.530      ;
; -0.235 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[26]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.789     ; 2.537      ;
; -0.235 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.790     ; 2.536      ;
; -0.231 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.791     ; 2.531      ;
; -0.230 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[0]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.615     ; 2.706      ;
; -0.227 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.621     ; 2.697      ;
; -0.227 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[30]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.790     ; 2.528      ;
; -0.226 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[0]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.627     ; 2.690      ;
; -0.226 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.617     ; 2.700      ;
; -0.224 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[1]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.799     ; 2.516      ;
; -0.222 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[30]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.790     ; 2.523      ;
; -0.220 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.790     ; 2.521      ;
; -0.219 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[0]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.513      ;
; -0.213 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[0]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.615     ; 2.689      ;
; -0.209 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[0]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.627     ; 2.673      ;
; -0.204 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[0]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.619     ; 2.676      ;
; -0.197 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[22]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.795     ; 2.493      ;
; -0.193 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|doReg[1]    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.801     ; 2.483      ;
; -0.187 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[0]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.619     ; 2.659      ;
; -0.186 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.629     ; 2.648      ;
; -0.183 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.635     ; 2.639      ;
; -0.181 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.633     ; 2.639      ;
; -0.178 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[26]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.789     ; 2.480      ;
; -0.171 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[24]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.789     ; 2.473      ;
; -0.166 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[24]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.789     ; 2.468      ;
; -0.165 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[30]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.790     ; 2.466      ;
; -0.164 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.621     ; 2.634      ;
; -0.164 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.633     ; 2.622      ;
; -0.163 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.617     ; 2.637      ;
; -0.161 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[1]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.799     ; 2.453      ;
; -0.153 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.790     ; 2.454      ;
; -0.133 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[23]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.794     ; 2.430      ;
; -0.133 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_cache_reg[2]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.794     ; 2.430      ;
; -0.130 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|doReg[1]    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.801     ; 2.420      ;
; -0.129 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[20]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.786     ; 2.434      ;
; -0.129 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[22]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.795     ; 2.425      ;
; -0.128 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[23]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.794     ; 2.425      ;
; -0.124 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[20]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.786     ; 2.429      ;
; -0.120 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.629     ; 2.582      ;
; -0.119 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.616     ; 2.594      ;
; -0.115 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.796     ; 2.410      ;
; -0.113 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.804     ; 2.400      ;
; -0.113 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[23]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.794     ; 2.410      ;
; -0.110 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.621     ; 2.580      ;
; -0.110 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.802     ; 2.399      ;
; -0.110 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[26]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.789     ; 2.412      ;
; -0.109 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[24]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.789     ; 2.411      ;
; -0.100 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.601     ; 2.590      ;
; -0.097 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[30]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.790     ; 2.398      ;
; -0.093 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.802     ; 2.382      ;
; -0.083 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.635     ; 2.539      ;
; -0.072 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[21]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.795     ; 2.368      ;
; -0.067 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[20]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.786     ; 2.372      ;
; -0.067 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[21]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.795     ; 2.363      ;
; -0.065 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.619     ; 2.537      ;
; -0.064 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.614     ; 2.541      ;
; -0.062 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[18] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.800     ; 2.353      ;
; -0.052 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[21]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.795     ; 2.348      ;
; -0.050 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.804     ; 2.337      ;
; -0.047 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.621     ; 2.517      ;
; -0.047 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.614     ; 2.524      ;
; -0.046 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[23]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.794     ; 2.343      ;
; -0.043 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.602     ; 2.532      ;
; -0.042 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.609     ; 2.524      ;
; -0.041 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[24]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.789     ; 2.343      ;
; -0.040 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.616     ; 2.515      ;
; -0.035 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[25]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.791     ; 2.335      ;
; -0.034 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|doReg[0]    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.798     ; 2.327      ;
; -0.034 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.619     ; 2.506      ;
; -0.030 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[25]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.791     ; 2.330      ;
; -0.025 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.600     ; 2.516      ;
; -0.025 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.634     ; 2.482      ;
; -0.025 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[1]                                                                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.799     ; 2.317      ;
; -0.025 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.609     ; 2.507      ;
; -0.023 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.616     ; 2.498      ;
; -0.020 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.635     ; 2.476      ;
; -0.019 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[41] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.619     ; 2.491      ;
; -0.019 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.619     ; 2.491      ;
; -0.017 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|doReg[0]    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.798     ; 2.310      ;
; -0.017 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.619     ; 2.489      ;
; -0.015 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[25]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.791     ; 2.315      ;
; -0.008 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.600     ; 2.499      ;
; -0.003 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.616     ; 2.478      ;
; -0.003 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.600     ; 2.494      ;
+--------+--------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                                        ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                         ; To Node                                      ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 5.697 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.088     ; 5.794      ;
; 5.710 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.088     ; 5.781      ;
; 5.724 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.088     ; 5.767      ;
; 5.728 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.088     ; 5.763      ;
; 5.737 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.088     ; 5.754      ;
; 5.741 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.088     ; 5.750      ;
; 5.802 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.087     ; 5.690      ;
; 5.827 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.087     ; 5.665      ;
; 5.833 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.089     ; 5.657      ;
; 5.842 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.088     ; 5.649      ;
; 5.855 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.088     ; 5.636      ;
; 5.867 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.083     ; 5.629      ;
; 5.869 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.091     ; 5.619      ;
; 5.869 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.089     ; 5.621      ;
; 5.880 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.083     ; 5.616      ;
; 5.880 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.084     ; 5.615      ;
; 5.882 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.091     ; 5.606      ;
; 5.886 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.091     ; 5.602      ;
; 5.905 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.084     ; 5.590      ;
; 5.911 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.091     ; 5.577      ;
; 5.943 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.091     ; 5.545      ;
; 5.947 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[12]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.083     ; 5.549      ;
; 5.952 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.091     ; 5.536      ;
; 5.963 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.089     ; 5.527      ;
; 5.963 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[10]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.085     ; 5.531      ;
; 5.979 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_direction_reg[5]                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.102     ; 5.498      ;
; 5.979 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.091     ; 5.509      ;
; 5.983 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.091     ; 5.505      ;
; 5.984 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[13]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.083     ; 5.512      ;
; 6.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.091     ; 5.481      ;
; 6.012 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.089     ; 5.478      ;
; 6.018 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[8]                             ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.082     ; 5.479      ;
; 6.018 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.091     ; 5.470      ;
; 6.018 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.092     ; 5.469      ;
; 6.020 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[11]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.083     ; 5.476      ;
; 6.022 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.091     ; 5.466      ;
; 6.023 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.095     ; 5.461      ;
; 6.024 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.089     ; 5.466      ;
; 6.026 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.091     ; 5.462      ;
; 6.031 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 5.458      ;
; 6.043 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[11]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.094     ; 5.442      ;
; 6.044 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 5.445      ;
; 6.048 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.089     ; 5.442      ;
; 6.049 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[9]                             ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.085     ; 5.445      ;
; 6.049 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[5]                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.103     ; 5.427      ;
; 6.050 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.095     ; 5.434      ;
; 6.054 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.092     ; 5.433      ;
; 6.054 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.095     ; 5.430      ;
; 6.057 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.091     ; 5.431      ;
; 6.061 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|state[1]                        ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.288     ; 5.230      ;
; 6.081 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]                             ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.082     ; 5.416      ;
; 6.088 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[8]                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.096     ; 5.395      ;
; 6.097 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.091     ; 5.391      ;
; 6.115 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.094     ; 5.370      ;
; 6.116 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.081     ; 5.382      ;
; 6.119 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[17]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.096     ; 5.364      ;
; 6.122 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.086     ; 5.371      ;
; 6.122 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.087     ; 5.370      ;
; 6.123 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[21]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.084     ; 5.372      ;
; 6.124 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.094     ; 5.361      ;
; 6.125 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[18]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.096     ; 5.358      ;
; 6.127 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[22]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.084     ; 5.368      ;
; 6.128 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_direction_reg[4]                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.082     ; 5.369      ;
; 6.128 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.094     ; 5.357      ;
; 6.130 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[12]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.087     ; 5.362      ;
; 6.134 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[13]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.083     ; 5.362      ;
; 6.136 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[14]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.081     ; 5.362      ;
; 6.140 ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.081     ; 5.358      ;
; 6.142 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.089     ; 5.348      ;
; 6.143 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[18]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.084     ; 5.352      ;
; 6.143 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[22]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.084     ; 5.352      ;
; 6.145 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[0]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.091     ; 5.343      ;
; 6.148 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.092     ; 5.339      ;
; 6.153 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.095     ; 5.331      ;
; 6.155 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.087     ; 5.337      ;
; 6.159 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.087     ; 5.333      ;
; 6.161 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[14]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.081     ; 5.337      ;
; 6.163 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[8]                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.087     ; 5.329      ;
; 6.168 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.087     ; 5.324      ;
; 6.168 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.094     ; 5.317      ;
; 6.168 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[12]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.083     ; 5.328      ;
; 6.168 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.095     ; 5.316      ;
; 6.171 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.087     ; 5.321      ;
; 6.172 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[0]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.091     ; 5.316      ;
; 6.176 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[0]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.091     ; 5.312      ;
; 6.180 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.095     ; 5.304      ;
; 6.184 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.095     ; 5.300      ;
; 6.189 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[12]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.086     ; 5.304      ;
; 6.193 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 5.296      ;
; 6.193 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.091     ; 5.295      ;
; 6.195 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.098     ; 5.286      ;
; 6.199 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.098     ; 5.282      ;
; 6.203 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.298     ; 5.078      ;
; 6.203 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.089     ; 5.287      ;
; 6.203 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[9]                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.096     ; 5.280      ;
; 6.205 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[10]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.088     ; 5.286      ;
; 6.206 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.086     ; 5.287      ;
; 6.208 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.094     ; 5.277      ;
; 6.209 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.092     ; 5.278      ;
; 6.211 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.091     ; 5.277      ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                                              ;
+-------+-------------------------+--------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node               ; To Node      ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------+--------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 6.422 ; svideo_yout_dly2[6]     ; cvbs2_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.037     ; 2.210      ;
; 6.428 ; svideo_yout_dly2[4]     ; cvbs2_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.037     ; 2.204      ;
; 6.489 ; svideo_yout_dly2[6]     ; cvbs2_out[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 2.142      ;
; 6.495 ; svideo_yout_dly2[4]     ; cvbs2_out[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 2.136      ;
; 6.564 ; svideo_yout_dly2[2]     ; cvbs2_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.037     ; 2.068      ;
; 6.565 ; svideo_yout_dly2[7]     ; cvbs2_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.037     ; 2.067      ;
; 6.573 ; svideo_yout_dly2[3]     ; cvbs2_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.037     ; 2.059      ;
; 6.576 ; svideo_yout_dly2[5]     ; cvbs2_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.037     ; 2.056      ;
; 6.584 ; svideo_yout_dly2[6]     ; cvbs2_out[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 2.047      ;
; 6.590 ; svideo_yout_dly2[4]     ; cvbs2_out[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 2.041      ;
; 6.600 ; svideo_yout_dly2[6]     ; cvbs2_out[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 2.031      ;
; 6.606 ; svideo_yout_dly2[4]     ; cvbs2_out[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 2.025      ;
; 6.611 ; svideo_yout_dly2[6]     ; cvbs2_out[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 2.020      ;
; 6.617 ; svideo_yout_dly2[4]     ; cvbs2_out[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 2.014      ;
; 6.624 ; svideo_yout_dly2[6]     ; cvbs2_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 2.005      ;
; 6.628 ; svideo_yout_dly2[4]     ; cvbs2_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 2.001      ;
; 6.631 ; svideo_yout_dly2[2]     ; cvbs2_out[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 2.000      ;
; 6.632 ; svideo_yout_dly2[7]     ; cvbs2_out[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.999      ;
; 6.640 ; svideo_yout_dly2[3]     ; cvbs2_out[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.991      ;
; 6.643 ; svideo_yout_dly2[5]     ; cvbs2_out[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.988      ;
; 6.735 ; svideo_yout_dly2[6]     ; cvbs2_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.039     ; 1.895      ;
; 6.735 ; svideo_yout_dly2[3]     ; cvbs2_out[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.896      ;
; 6.736 ; svideo_yout_dly2[4]     ; cvbs2_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.039     ; 1.894      ;
; 6.737 ; svideo_yout_dly2[2]     ; cvbs2_out[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.894      ;
; 6.738 ; svideo_yout_dly2[5]     ; cvbs2_out[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.893      ;
; 6.738 ; svideo_yout_dly2[7]     ; cvbs2_out[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.893      ;
; 6.744 ; svideo_yout_dly2[2]     ; cvbs2_out[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.887      ;
; 6.745 ; svideo_yout_dly2[7]     ; cvbs2_out[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.886      ;
; 6.749 ; svideo_yout_dly2[2]     ; cvbs2_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.880      ;
; 6.750 ; svideo_yout_dly2[7]     ; cvbs2_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.879      ;
; 6.750 ; svideo_yout_dly2[2]     ; cvbs2_out[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.881      ;
; 6.751 ; svideo_yout_dly2[3]     ; cvbs2_out[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.880      ;
; 6.751 ; svideo_yout_dly2[7]     ; cvbs2_out[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.880      ;
; 6.754 ; svideo_yout_dly2[5]     ; cvbs2_out[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.877      ;
; 6.762 ; svideo_yout_dly2[3]     ; cvbs2_out[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.869      ;
; 6.765 ; svideo_yout_dly2[5]     ; cvbs2_out[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.866      ;
; 6.768 ; svideo_yout_dly2[3]     ; cvbs2_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.861      ;
; 6.772 ; svideo_yout_dly2[5]     ; cvbs2_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.857      ;
; 6.782 ; svideo:svideo|chroma[2] ; cvbs1_out[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.829      ;
; 6.786 ; svideo:svideo|chroma[2] ; cvbs1_out[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.825      ;
; 6.791 ; svideo_yout_dly2[6]     ; cvbs2_out[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.838      ;
; 6.792 ; svideo_yout_dly2[4]     ; cvbs2_out[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.837      ;
; 6.850 ; svideo:svideo|chroma[2] ; cvbs1_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.761      ;
; 6.854 ; svideo:svideo|chroma[2] ; cvbs1_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.757      ;
; 6.857 ; svideo_yout_dly2[2]     ; cvbs2_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.039     ; 1.773      ;
; 6.858 ; svideo_yout_dly2[7]     ; cvbs2_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.039     ; 1.772      ;
; 6.870 ; svideo_yout_dly2[1]     ; cvbs2_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.037     ; 1.762      ;
; 6.876 ; svideo_yout_dly2[3]     ; cvbs2_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.039     ; 1.754      ;
; 6.880 ; svideo_yout_dly2[5]     ; cvbs2_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.039     ; 1.750      ;
; 6.900 ; svideo_yout_dly2[0]     ; cvbs2_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.037     ; 1.732      ;
; 6.913 ; svideo_yout_dly2[2]     ; cvbs2_out[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.716      ;
; 6.914 ; svideo_yout_dly2[7]     ; cvbs2_out[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.715      ;
; 6.918 ; svideo:svideo|chroma[2] ; cvbs1_out[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.693      ;
; 6.922 ; svideo:svideo|chroma[2] ; cvbs1_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.689      ;
; 6.932 ; svideo_yout_dly2[3]     ; cvbs2_out[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.697      ;
; 6.936 ; svideo_yout_dly2[5]     ; cvbs2_out[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.693      ;
; 6.937 ; svideo_yout_dly2[1]     ; cvbs2_out[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.694      ;
; 6.941 ; svideo:svideo|chroma[1] ; cvbs1_out[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.670      ;
; 6.945 ; svideo:svideo|chroma[1] ; cvbs1_out[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.666      ;
; 6.967 ; svideo_yout_dly2[0]     ; cvbs2_out[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.664      ;
; 6.986 ; svideo:svideo|chroma[2] ; cvbs1_out[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.625      ;
; 7.009 ; svideo:svideo|chroma[1] ; cvbs1_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.602      ;
; 7.013 ; svideo:svideo|chroma[1] ; cvbs1_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.598      ;
; 7.014 ; svideo:svideo|chroma[0] ; cvbs1_out[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.597      ;
; 7.018 ; svideo:svideo|chroma[0] ; cvbs1_out[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.593      ;
; 7.032 ; svideo_yout_dly2[1]     ; cvbs2_out[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.599      ;
; 7.034 ; svideo:svideo|chroma[3] ; cvbs1_out[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.577      ;
; 7.038 ; svideo:svideo|chroma[3] ; cvbs1_out[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.573      ;
; 7.046 ; svideo:svideo|chroma[5] ; cvbs1_out[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.565      ;
; 7.048 ; svideo_yout_dly2[1]     ; cvbs2_out[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.583      ;
; 7.050 ; svideo:svideo|chroma[5] ; cvbs1_out[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.561      ;
; 7.059 ; svideo_yout_dly2[1]     ; cvbs2_out[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.572      ;
; 7.062 ; svideo_yout_dly2[0]     ; cvbs2_out[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.569      ;
; 7.072 ; svideo_yout_dly2[1]     ; cvbs2_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.557      ;
; 7.073 ; cvbs1_out[9]            ; cvbs2_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.036     ; 1.560      ;
; 7.077 ; svideo:svideo|chroma[1] ; cvbs1_out[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.534      ;
; 7.078 ; svideo_yout_dly2[0]     ; cvbs2_out[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.553      ;
; 7.081 ; svideo:svideo|chroma[1] ; cvbs1_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.530      ;
; 7.082 ; svideo:svideo|chroma[0] ; cvbs1_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.529      ;
; 7.086 ; svideo:svideo|chroma[0] ; cvbs1_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.525      ;
; 7.086 ; svideo_yout_dly2[0]     ; cvbs2_out[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.545      ;
; 7.091 ; svideo_yout_dly2[0]     ; cvbs2_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.538      ;
; 7.102 ; svideo:svideo|chroma[3] ; cvbs1_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.509      ;
; 7.106 ; svideo:svideo|chroma[3] ; cvbs1_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.505      ;
; 7.114 ; svideo:svideo|chroma[5] ; cvbs1_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.497      ;
; 7.115 ; svideo:svideo|chroma[8] ; cvbs1_out[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.496      ;
; 7.117 ; svideo:svideo|chroma[4] ; cvbs1_out[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.494      ;
; 7.118 ; svideo:svideo|chroma[5] ; cvbs1_out[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.493      ;
; 7.121 ; svideo:svideo|chroma[4] ; cvbs1_out[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.490      ;
; 7.142 ; cvbs1_out[4]            ; cvbs2_out[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.037     ; 1.490      ;
; 7.145 ; svideo:svideo|chroma[1] ; cvbs1_out[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.466      ;
; 7.149 ; svideo:svideo|chroma[1] ; cvbs1_out[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.462      ;
; 7.150 ; svideo:svideo|chroma[0] ; cvbs1_out[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.461      ;
; 7.154 ; svideo:svideo|chroma[0] ; cvbs1_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.457      ;
; 7.156 ; svideo:svideo|chroma[7] ; cvbs1_out[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.455      ;
; 7.160 ; svideo:svideo|chroma[7] ; cvbs1_out[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.451      ;
; 7.168 ; svideo:svideo|chroma[2] ; cvbs1_out[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.443      ;
; 7.170 ; svideo:svideo|chroma[3] ; cvbs1_out[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.441      ;
; 7.174 ; svideo:svideo|chroma[3] ; cvbs1_out[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.437      ;
; 7.185 ; svideo:svideo|chroma[4] ; cvbs1_out[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.106     ; 1.426      ;
+-------+-------------------------+--------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                ;
+--------+-----------------------------------------------+---------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                     ; To Node                                           ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------+---------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 29.708 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.022     ; 3.580      ;
; 29.708 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.022     ; 3.580      ;
; 29.791 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.022     ; 3.497      ;
; 29.791 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.022     ; 3.497      ;
; 29.806 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.022     ; 3.482      ;
; 29.806 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.022     ; 3.482      ;
; 29.846 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[3]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.445      ;
; 29.846 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.445      ;
; 29.849 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.442      ;
; 29.850 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.441      ;
; 29.850 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.441      ;
; 29.851 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[12] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.440      ;
; 29.852 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.439      ;
; 29.867 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[5]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.024     ; 3.419      ;
; 29.867 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.024     ; 3.419      ;
; 29.889 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.022     ; 3.399      ;
; 29.889 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.022     ; 3.399      ;
; 29.898 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.022     ; 3.390      ;
; 29.898 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.022     ; 3.390      ;
; 29.929 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[3]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.362      ;
; 29.929 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.362      ;
; 29.932 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.359      ;
; 29.933 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.358      ;
; 29.933 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.358      ;
; 29.934 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[12] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.357      ;
; 29.935 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.356      ;
; 29.950 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[5]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.024     ; 3.336      ;
; 29.950 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.024     ; 3.336      ;
; 29.965 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.022     ; 3.323      ;
; 29.965 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.022     ; 3.323      ;
; 29.971 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[3]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.320      ;
; 29.971 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.320      ;
; 29.974 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.317      ;
; 29.975 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.316      ;
; 29.975 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.316      ;
; 29.976 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[12] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.315      ;
; 29.977 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.314      ;
; 29.992 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[5]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.024     ; 3.294      ;
; 29.992 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.024     ; 3.294      ;
; 29.996 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.022     ; 3.292      ;
; 29.996 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.022     ; 3.292      ;
; 29.997 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[10] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.294      ;
; 29.999 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[1]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.292      ;
; 29.999 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[2]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.292      ;
; 30.000 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[7]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.291      ;
; 30.000 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[14] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.291      ;
; 30.011 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[3]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.280      ;
; 30.011 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.280      ;
; 30.014 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.277      ;
; 30.015 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.276      ;
; 30.015 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.276      ;
; 30.016 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[12] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.275      ;
; 30.017 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.274      ;
; 30.032 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[5]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.024     ; 3.254      ;
; 30.032 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.024     ; 3.254      ;
; 30.036 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[3]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.255      ;
; 30.036 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.255      ;
; 30.039 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.252      ;
; 30.040 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.251      ;
; 30.040 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.251      ;
; 30.041 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[12] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.250      ;
; 30.042 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.249      ;
; 30.052 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[3]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.239      ;
; 30.052 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.239      ;
; 30.055 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.236      ;
; 30.056 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.235      ;
; 30.056 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.235      ;
; 30.057 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[5]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.024     ; 3.229      ;
; 30.057 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.024     ; 3.229      ;
; 30.057 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[12] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.234      ;
; 30.058 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.233      ;
; 30.063 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.022     ; 3.225      ;
; 30.063 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.022     ; 3.225      ;
; 30.073 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[5]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.024     ; 3.213      ;
; 30.073 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.024     ; 3.213      ;
; 30.074 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.022     ; 3.214      ;
; 30.074 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.022     ; 3.214      ;
; 30.080 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[10] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.211      ;
; 30.082 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[1]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.209      ;
; 30.082 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[2]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.209      ;
; 30.083 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[7]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.208      ;
; 30.083 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[14] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.208      ;
; 30.100 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.022     ; 3.188      ;
; 30.100 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.022     ; 3.188      ;
; 30.103 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[3]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.188      ;
; 30.103 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.188      ;
; 30.106 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.185      ;
; 30.107 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.184      ;
; 30.107 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.184      ;
; 30.108 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[12] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.183      ;
; 30.109 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.182      ;
; 30.112 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.022     ; 3.176      ;
; 30.112 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.022     ; 3.176      ;
; 30.122 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[10] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.169      ;
; 30.124 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[5]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.024     ; 3.162      ;
; 30.124 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.024     ; 3.162      ;
; 30.124 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[1]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.167      ;
; 30.124 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[2]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.167      ;
; 30.125 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[7]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.166      ;
; 30.125 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[14] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.019     ; 3.166      ;
+--------+-----------------------------------------------+---------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                                                                                                                                               ;
+--------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                                                                                                                                        ; To Node                                                                                                                                                                        ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+--------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 47.533 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                              ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.442      ; 2.896      ;
; 48.035 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.457      ; 2.409      ;
; 48.070 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.448      ; 2.365      ;
; 48.118 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.448      ; 2.317      ;
; 48.122 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                              ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.442      ; 2.307      ;
; 48.134 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.457      ; 2.310      ;
; 48.298 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                   ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.456      ; 2.145      ;
; 48.455 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.451      ; 1.983      ;
; 48.461 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                   ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.456      ; 1.982      ;
; 48.538 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.457      ; 1.906      ;
; 48.573 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.446      ; 1.860      ;
; 48.701 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.446      ; 1.732      ;
; 48.743 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.446      ; 1.690      ;
; 48.841 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.449      ; 1.595      ;
; 48.846 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.447      ; 1.588      ;
; 48.879 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[3]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.455      ; 1.563      ;
; 48.962 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.458      ; 1.483      ;
; 48.975 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[0]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.451      ; 1.463      ;
; 49.038 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.448      ; 1.397      ;
; 49.055 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.445      ; 1.377      ;
; 49.083 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.458      ; 1.362      ;
; 49.229 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo_bypass_reg                                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.449      ; 1.207      ;
; 49.294 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|design_hash_reg[0]                                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.453      ; 1.146      ;
; 49.347 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[0]                                                                                                                               ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.449      ; 1.089      ;
; 96.850 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 3.095      ;
; 96.850 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 3.095      ;
; 96.850 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 3.095      ;
; 96.850 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 3.095      ;
; 96.850 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 3.095      ;
; 96.850 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 3.095      ;
; 96.850 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 3.095      ;
; 96.850 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 3.095      ;
; 96.850 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 3.095      ;
; 97.330 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 2.604      ;
; 97.330 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 2.604      ;
; 97.330 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 2.604      ;
; 97.330 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 2.604      ;
; 97.330 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 2.604      ;
; 97.330 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 2.604      ;
; 97.330 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 2.604      ;
; 97.330 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 2.604      ;
; 97.452 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.037     ; 2.498      ;
; 97.452 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.037     ; 2.498      ;
; 97.452 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.037     ; 2.498      ;
; 97.452 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.037     ; 2.498      ;
; 97.452 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.037     ; 2.498      ;
; 97.452 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.037     ; 2.498      ;
; 97.452 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.037     ; 2.498      ;
; 97.452 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.037     ; 2.498      ;
; 97.452 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.037     ; 2.498      ;
; 97.490 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.037     ; 2.460      ;
; 97.490 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.037     ; 2.460      ;
; 97.490 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.037     ; 2.460      ;
; 97.490 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.037     ; 2.460      ;
; 97.490 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.037     ; 2.460      ;
; 97.490 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.037     ; 2.460      ;
; 97.490 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.037     ; 2.460      ;
; 97.490 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.037     ; 2.460      ;
; 97.490 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.037     ; 2.460      ;
; 97.532 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 2.429      ;
; 97.532 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 2.429      ;
; 97.532 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 2.429      ;
; 97.532 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 2.429      ;
; 97.532 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 2.429      ;
; 97.581 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.037     ; 2.369      ;
; 97.581 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.037     ; 2.369      ;
; 97.581 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.037     ; 2.369      ;
; 97.581 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.037     ; 2.369      ;
; 97.581 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.037     ; 2.369      ;
; 97.581 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.037     ; 2.369      ;
; 97.581 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.037     ; 2.369      ;
; 97.581 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.037     ; 2.369      ;
; 97.581 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.037     ; 2.369      ;
; 97.602 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 2.332      ;
; 97.603 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 2.331      ;
; 97.603 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 2.351      ;
; 97.603 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 2.351      ;
; 97.603 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 2.351      ;
; 97.603 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 2.351      ;
; 97.603 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 2.351      ;
; 97.603 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 2.351      ;
; 97.603 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 2.351      ;
; 97.603 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 2.351      ;
; 97.630 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 2.304      ;
; 97.631 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 2.330      ;
; 97.631 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 2.330      ;
; 97.631 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 2.330      ;
; 97.631 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 2.330      ;
; 97.631 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 2.330      ;
; 97.678 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.050     ; 2.259      ;
; 97.678 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.050     ; 2.259      ;
; 97.678 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.050     ; 2.259      ;
; 97.678 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.050     ; 2.259      ;
; 97.678 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.050     ; 2.259      ;
; 97.678 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.050     ; 2.259      ;
; 97.678 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.050     ; 2.259      ;
; 97.678 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.050     ; 2.259      ;
; 97.678 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.050     ; 2.259      ;
; 97.699 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.176     ; 2.112      ;
; 97.706 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.040     ; 2.241      ;
+--------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                                                              ;
+-------+---------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                 ; To Node                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.138 ; svideo:svideo|luma[8]     ; svideo:svideo|luma_1[8]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.084      ; 0.326      ;
; 0.194 ; svideo:svideo|luma_1[9]   ; svideo:svideo|luma_2[9]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.314      ;
; 0.195 ; svideo_yout_dly1[6]       ; svideo_yout_dly2[6]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.314      ;
; 0.196 ; svideo:svideo|luma_1[0]   ; svideo:svideo|luma_2[0]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.315      ;
; 0.196 ; svideo_yout_dly1[4]       ; svideo_yout_dly2[4]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.315      ;
; 0.197 ; svideo_yout_dly1[5]       ; svideo_yout_dly2[5]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.316      ;
; 0.199 ; svideo:svideo|luma[6]     ; svideo:svideo|luma_1[6]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.082      ; 0.385      ;
; 0.202 ; svideo:svideo|luma[0]     ; svideo:svideo|luma_1[0]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.084      ; 0.390      ;
; 0.202 ; svideo:svideo|luma[9]     ; svideo:svideo|luma_1[9]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.085      ; 0.391      ;
; 0.208 ; svideo:svideo|luma[3]     ; svideo:svideo|luma_1[3]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.085      ; 0.397      ;
; 0.212 ; svideo:svideo|luma[5]     ; svideo:svideo|luma_1[5]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.084      ; 0.400      ;
; 0.259 ; luma_saturated[9]         ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.378      ;
; 0.262 ; svideo:svideo|luma_1[2]   ; svideo:svideo|luma_2[2]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.382      ;
; 0.263 ; svideo:svideo|luma_1[8]   ; svideo:svideo|luma_2[8]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.383      ;
; 0.263 ; svideo:svideo|luma_acc[7] ; svideo_yout_dly1[5]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.382      ;
; 0.265 ; svideo:svideo|luma_1[7]   ; svideo:svideo|luma_2[7]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.385      ;
; 0.265 ; svideo:svideo|luma_acc[2] ; svideo_yout_dly1[0]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.384      ;
; 0.267 ; svideo_yout_dly1[3]       ; svideo_yout_dly2[3]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.386      ;
; 0.268 ; svideo_yout_dly1[1]       ; svideo_yout_dly2[1]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.387      ;
; 0.268 ; svideo_yout_dly1[0]       ; svideo_yout_dly2[0]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.387      ;
; 0.268 ; svideo_yout_dly1[2]       ; svideo_yout_dly2[2]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.387      ;
; 0.271 ; svideo:svideo|luma_1[1]   ; svideo:svideo|luma_2[1]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.391      ;
; 0.271 ; svideo:svideo|luma_1[5]   ; svideo:svideo|luma_2[5]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.391      ;
; 0.271 ; svideo_yout_dly1[7]       ; svideo_yout_dly2[7]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.390      ;
; 0.272 ; svideo:svideo|luma_1[3]   ; svideo:svideo|luma_2[3]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.392      ;
; 0.273 ; svideo:svideo|luma[2]     ; svideo:svideo|luma_1[2]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.085      ; 0.462      ;
; 0.275 ; svideo:svideo|luma_acc[8] ; svideo_yout_dly1[6]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.394      ;
; 0.284 ; svideo:svideo|luma[4]     ; svideo:svideo|luma_1[4]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.085      ; 0.473      ;
; 0.297 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.416      ;
; 0.297 ; svideo:svideo|luma_2[7]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.416      ;
; 0.297 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.416      ;
; 0.297 ; svideo:svideo|luma_2[3]   ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.416      ;
; 0.298 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.417      ;
; 0.298 ; svideo:svideo|luma_2[1]   ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.417      ;
; 0.299 ; svideo:svideo|luma[2]     ; luma_saturated[2]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.085      ; 0.488      ;
; 0.299 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.418      ;
; 0.301 ; svideo:svideo|luma[9]     ; luma_saturated[9]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.085      ; 0.490      ;
; 0.301 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.420      ;
; 0.304 ; svideo:svideo|luma[6]     ; luma_saturated[6]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.082      ; 0.490      ;
; 0.315 ; svideo:svideo|luma[0]     ; luma_saturated[0]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.084      ; 0.503      ;
; 0.315 ; svideo:svideo|luma[4]     ; luma_saturated[4]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.085      ; 0.504      ;
; 0.316 ; svideo:svideo|luma[3]     ; luma_saturated[3]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.085      ; 0.505      ;
; 0.337 ; svideo:svideo|luma_acc[4] ; svideo_yout_dly1[2]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.456      ;
; 0.338 ; svideo:svideo|luma_acc[9] ; svideo_yout_dly1[7]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.457      ;
; 0.348 ; svideo:svideo|luma_1[4]   ; svideo:svideo|luma_2[4]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.468      ;
; 0.348 ; svideo:svideo|luma_1[6]   ; svideo:svideo|luma_2[6]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.468      ;
; 0.349 ; svideo:svideo|luma_acc[3] ; svideo_yout_dly1[1]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.468      ;
; 0.349 ; svideo:svideo|luma_acc[6] ; svideo_yout_dly1[4]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.468      ;
; 0.350 ; svideo:svideo|luma_acc[5] ; svideo_yout_dly1[3]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.469      ;
; 0.360 ; luma_saturated[4]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.479      ;
; 0.361 ; luma_saturated[2]         ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.480      ;
; 0.363 ; luma_saturated[8]         ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.482      ;
; 0.363 ; svideo:svideo|luma_2[9]   ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.483      ;
; 0.364 ; luma_saturated[7]         ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.483      ;
; 0.364 ; luma_saturated[3]         ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.483      ;
; 0.369 ; svideo:svideo|luma_2[5]   ; svideo:svideo|luma_acc[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.033      ; 0.486      ;
; 0.378 ; luma_saturated[6]         ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.497      ;
; 0.378 ; luma_saturated[5]         ; cvbs1_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.497      ;
; 0.427 ; svideo:svideo|luma[1]     ; svideo:svideo|luma_1[1]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.082      ; 0.613      ;
; 0.438 ; svideo:svideo|luma[7]     ; luma_saturated[7]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.082      ; 0.624      ;
; 0.445 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.564      ;
; 0.446 ; svideo:svideo|luma_2[7]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.565      ;
; 0.446 ; svideo:svideo|luma_2[3]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.565      ;
; 0.446 ; luma_saturated[1]         ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.565      ;
; 0.446 ; svideo:svideo|luma_2[1]   ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.565      ;
; 0.448 ; svideo:svideo|luma[2]     ; luma_saturated[3]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.085      ; 0.637      ;
; 0.452 ; svideo:svideo|luma[6]     ; luma_saturated[7]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.082      ; 0.638      ;
; 0.454 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.573      ;
; 0.455 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.574      ;
; 0.456 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.575      ;
; 0.457 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.576      ;
; 0.457 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.576      ;
; 0.458 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.577      ;
; 0.459 ; svideo:svideo|luma[5]     ; luma_saturated[5]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.082      ; 0.645      ;
; 0.459 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.578      ;
; 0.460 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.579      ;
; 0.462 ; svideo:svideo|luma[8]     ; luma_saturated[8]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.082      ; 0.648      ;
; 0.464 ; svideo:svideo|luma[4]     ; luma_saturated[5]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.085      ; 0.653      ;
; 0.474 ; svideo:svideo|luma[3]     ; luma_saturated[4]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.085      ; 0.663      ;
; 0.477 ; svideo:svideo|luma[3]     ; luma_saturated[5]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.085      ; 0.666      ;
; 0.478 ; svideo:svideo|luma_2[0]   ; svideo:svideo|luma_acc[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.598      ;
; 0.508 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.627      ;
; 0.509 ; svideo:svideo|luma_2[7]   ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.628      ;
; 0.509 ; luma_saturated[1]         ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.628      ;
; 0.509 ; svideo:svideo|luma_2[3]   ; svideo:svideo|luma_acc[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.628      ;
; 0.509 ; svideo:svideo|luma_2[1]   ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.628      ;
; 0.511 ; svideo:svideo|luma[2]     ; luma_saturated[4]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.085      ; 0.700      ;
; 0.511 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.630      ;
; 0.512 ; luma_saturated[3]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.631      ;
; 0.512 ; luma_saturated[7]         ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.631      ;
; 0.512 ; svideo:svideo|luma_2[3]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.631      ;
; 0.512 ; svideo:svideo|luma_2[1]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.631      ;
; 0.512 ; luma_saturated[1]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.631      ;
; 0.514 ; svideo:svideo|luma[2]     ; luma_saturated[5]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.085      ; 0.703      ;
; 0.515 ; svideo:svideo|luma[6]     ; luma_saturated[8]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.082      ; 0.701      ;
; 0.516 ; svideo:svideo|luma[7]     ; svideo:svideo|luma_1[7]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.082      ; 0.702      ;
; 0.518 ; svideo:svideo|luma[6]     ; luma_saturated[9]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.082      ; 0.704      ;
; 0.518 ; svideo:svideo|luma_2[5]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.033      ; 0.635      ;
; 0.519 ; luma_saturated[4]         ; cvbs1_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.638      ;
; 0.519 ; svideo:svideo|luma_2[8]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.033      ; 0.636      ;
+-------+---------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                                                       ; To Node                                                                                                                                                                                                                                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.140 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[6]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.467      ;
; 0.144 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[3]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.471      ;
; 0.144 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.467      ;
; 0.149 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vscrol_raw_reg[2]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.473      ;
; 0.150 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[7]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.474      ;
; 0.151 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vscrol_raw_reg[0]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.475      ;
; 0.154 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vscrol_raw_reg[3]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.478      ;
; 0.156 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[5]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.480      ;
; 0.157 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[2]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.481      ;
; 0.160 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~portb_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.487      ;
; 0.160 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[3]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.484      ;
; 0.161 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.486      ;
; 0.161 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[5]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.485      ;
; 0.163 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[1]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.487      ;
; 0.163 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[0]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.487      ;
; 0.164 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[7]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.488      ;
; 0.165 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[1]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.489      ;
; 0.165 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmien_raw_reg[6]                                                                                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.489      ;
; 0.165 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.488      ;
; 0.166 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.491      ;
; 0.168 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp2_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.493      ;
; 0.169 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmien_raw_reg[7]                                                                                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.493      ;
; 0.169 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.492      ;
; 0.169 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.493      ;
; 0.169 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[4]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.493      ;
; 0.169 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp0_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.495      ;
; 0.170 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vscrol_raw_reg[1]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.494      ;
; 0.170 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[2]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.494      ;
; 0.171 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.495      ;
; 0.172 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.496      ;
; 0.172 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.497      ;
; 0.173 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[5]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.498      ;
; 0.173 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp0_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.499      ;
; 0.173 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp0_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.499      ;
; 0.173 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp2_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.498      ;
; 0.174 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[6]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.498      ;
; 0.174 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizep1_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.497      ;
; 0.175 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.498      ;
; 0.175 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.498      ;
; 0.175 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.500      ;
; 0.175 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp2_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.500      ;
; 0.176 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm1_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.499      ;
; 0.176 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.501      ;
; 0.176 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.501      ;
; 0.176 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp2_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.501      ;
; 0.177 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.501      ;
; 0.178 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.502      ;
; 0.178 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.503      ;
; 0.179 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.502      ;
; 0.179 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp0_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.505      ;
; 0.180 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|state[1]                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|state[1]                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.043      ; 0.307      ;
; 0.180 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|state[2]                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|state[2]                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.043      ; 0.307      ;
; 0.180 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.503      ;
; 0.180 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[5]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.504      ;
; 0.181 ; svideo:svideo|ampl_U[1]                                                                                                                                                                                         ; svideo:svideo|sin_cos:tab_inst|sin_rom:sin_inst|altsyncram:altsyncram_component|altsyncram_r842:auto_generated|ram_block1a3~porta_address_reg0                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.216      ; 0.501      ;
; 0.181 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.506      ;
; 0.182 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.507      ;
; 0.183 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizep1_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.506      ;
; 0.183 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.508      ;
; 0.183 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp2_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.508      ;
; 0.184 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.508      ;
; 0.184 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.509      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp0_raw_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.511      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp0_raw_reg[5]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.511      ;
; 0.186 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serial_out_reg                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serial_out_reg                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizep2_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.218      ; 0.508      ;
; 0.186 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp2_raw_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.511      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|insn.dec_insn_fetch                                                                                                                                       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|insn.dec_insn_fetch                                                                                                                                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_add_sp2                                                                                                                                          ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_add_sp2                                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_store_sp2                                                                                                                                        ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_store_sp2                                                                                                                                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_popped                                                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_popped                                                                                                                                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|idim_r                                                                                                                                                    ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|idim_r                                                                                                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_loadb2                                                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_loadb2                                                                                                                                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[16]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[16]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[15]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[15]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[21]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[21]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[22]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[22]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[20]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[20]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[17]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[17]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[18]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[18]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[4]                                                                                                                                                                 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[4]                                                                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[1]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[1]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[1]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[1]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[0]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[0]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[2]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[2]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[3]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[3]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[6]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[6]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[4]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[4]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[5]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[5]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[7]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[7]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[0]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[0]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[3]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[3]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[1]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[1]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[2]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[2]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[4]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[4]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[5]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[5]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[6]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[6]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[7]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[7]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[1]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[1]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[0]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[0]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                        ;
+-------+---------------------------------------------------------------------+---------------------------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                           ; To Node                                                             ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------------+---------------------------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 0.179 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.044      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte9         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte9         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte10        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte10        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte11        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte11        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait40                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait40                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.send_getreport_ack_end  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.send_getreport_ack_end  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait20                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait20                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.getreport_sendpkt1_end  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.getreport_sendpkt1_end  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait30                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait30                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte3         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte3         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte4         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte4         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte5         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte5         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte6         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte6         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte7         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte7         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte8         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte8         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|set_command[0]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|set_command[0]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_configuration   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_configuration   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|set_command[1]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|set_command[1]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_address         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_address         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait4                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait4                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait1                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait1                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter2[1]                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter2[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter2[2]                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter2[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt1_end ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt1_end ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.Idle                    ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.Idle                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_for_deviceconnect  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_for_deviceconnect  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.usb_reset_state         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.usb_reset_state         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.usb_reset_1ms_start     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.usb_reset_1ms_start     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt3_end ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt3_end ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_pktin3             ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_pktin3             ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait6                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait6                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.send_ack_end            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.send_ack_end            ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_idle            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_idle            ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait2                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait2                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[2]                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|start_sendcom                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|start_sendcom                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[4]                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[4]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[5]                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[5]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[7]                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[7]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt2_end ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt2_end ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|detach_ack                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|detach_ack                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_available                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_available                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_valid                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_valid                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.getreport_sendpkt1_end  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.getreport_sendpkt1_end  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait30                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait30                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.send_getreport_ack_end  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.send_getreport_ack_end  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_pktin2             ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_pktin2             ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait6                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait6                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.send_ack_end            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.send_ack_end            ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter2[1]                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter2[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter2[2]                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter2[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait1                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait1                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt1_end ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt1_end ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait2                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait2                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt2_end ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt2_end ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.end_set_idle            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.end_set_idle            ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte6         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte6         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte7         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte7         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte8         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte8         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte9         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte9         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte10        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte10        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte11        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte11        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait40                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait40                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[2]                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.usb_reset_state         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.usb_reset_state         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt3_end ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt3_end ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.Idle                    ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.Idle                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_for_deviceconnect  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_for_deviceconnect  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|set_command[0]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|set_command[0]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.end_set_address         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.end_set_address         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|set_command[1]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|set_command[1]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.end_set_configuration   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.end_set_configuration   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.usb_reset_1ms_start     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.usb_reset_1ms_start     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|detach_ack                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|detach_ack                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|start_sendcom                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|start_sendcom                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[4]                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[4]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_valid                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_valid                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.186 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.start_get_data          ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.start_get_data          ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait21                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait21                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte2         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte2         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[0]                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[0]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[2]                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[2]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait4                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait4                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait20                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait20                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.start_get_data          ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.start_get_data          ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte2         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte2         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte3         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte3         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte4         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte4         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte5         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte5         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid_c                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid_c                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[0]                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[0]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[2]                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[2]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[5]                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[5]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[6]                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[6]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[7]                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[7]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_available                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_available                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyright_temp[3]                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyright_temp[3]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_valid_temp                    ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_valid_temp                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.187 ; cntr_reset[5]                                                       ; cntr_reset[5]                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
+-------+---------------------------------------------------------------------+---------------------------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                                                             ; To Node                                                                                                                                                                                                               ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 0.187 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                                                         ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                                                             ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                                                         ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo_bypass_reg                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo_bypass_reg                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.188 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[11]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[11]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                             ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.307      ;
; 0.194 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[7]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[1]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[0]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.180      ; 0.478      ;
; 0.194 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.314      ;
; 0.195 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[14]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.314      ;
; 0.195 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.315      ;
; 0.195 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.315      ;
; 0.196 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.316      ;
; 0.196 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.316      ;
; 0.196 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|reset_ena_reg                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.316      ;
; 0.197 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[2]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[3]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.316      ;
; 0.197 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.317      ;
; 0.197 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.317      ;
; 0.198 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.318      ;
; 0.198 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.318      ;
; 0.198 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.318      ;
; 0.198 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.180      ; 0.482      ;
; 0.199 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[9]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[10]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.318      ;
; 0.199 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.319      ;
; 0.199 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[12]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.318      ;
; 0.200 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[3]                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[3]                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.319      ;
; 0.201 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.321      ;
; 0.201 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[3]                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[2]                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.320      ;
; 0.203 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.180      ; 0.487      ;
; 0.203 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[9]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.322      ;
; 0.204 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.180      ; 0.488      ;
; 0.205 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.325      ;
; 0.206 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.325      ;
; 0.206 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.326      ;
; 0.206 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.326      ;
; 0.206 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.326      ;
; 0.206 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[2]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.325      ;
; 0.206 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.326      ;
; 0.207 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[11]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[12]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.326      ;
; 0.207 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.327      ;
; 0.207 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.327      ;
; 0.207 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.180      ; 0.491      ;
; 0.207 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.180      ; 0.491      ;
; 0.208 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.328      ;
; 0.208 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.328      ;
; 0.209 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|mixer_addr_reg[4]                                                                                                                                       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|mixer_addr_reg[4]                                                                                                                                       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.329      ;
; 0.209 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.180      ; 0.493      ;
; 0.209 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.180      ; 0.493      ;
; 0.209 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.329      ;
; 0.210 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.180      ; 0.494      ;
; 0.211 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.331      ;
; 0.211 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[4]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[4]                                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.330      ;
; 0.212 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.331      ;
; 0.213 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.180      ; 0.497      ;
; 0.214 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.334      ;
; 0.221 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.180      ; 0.505      ;
; 0.225 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.180      ; 0.509      ;
; 0.228 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.177      ; 0.509      ;
; 0.232 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.179      ; 0.515      ;
; 0.232 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.179      ; 0.515      ;
; 0.233 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.179      ; 0.516      ;
; 0.235 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.177      ; 0.516      ;
; 0.244 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.179      ; 0.527      ;
; 0.246 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.179      ; 0.529      ;
; 0.246 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.179      ; 0.529      ;
; 0.250 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.179      ; 0.533      ;
; 0.253 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[3]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[2]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.373      ;
; 0.253 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.373      ;
; 0.254 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[1]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[0]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.374      ;
; 0.255 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.375      ;
; 0.255 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                                                                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.375      ;
; 0.260 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.380      ;
; 0.261 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]                                              ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.380      ;
; 0.265 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.385      ;
; 0.265 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.385      ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                ;
+-------+-----------------------------------------------------------------------------------------------------------------+-------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                       ; To Node                                               ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------+-------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.188 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                                                                      ; sdram_ctrl:sdram_controller|r_init_tmr[10]            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[0]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sdram_ctrl:sdram_controller|r_init_fsm[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[1]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                           ; sdram_ctrl:sdram_controller|sdram_rdy                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sdram_ctrl:sdram_controller|r_refr_act                                                                          ; sdram_ctrl:sdram_controller|r_refr_act                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sdram_ctrl:sdram_controller|r_bst_stp[0]                                                                        ; sdram_ctrl:sdram_controller|r_bst_stp[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                                                                        ; sdram_ctrl:sdram_controller|r_rd_bctr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sdram_ctrl:sdram_controller|r_rd_act                                                                            ; sdram_ctrl:sdram_controller|r_rd_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sdram_ctrl:sdram_controller|r_wr_act                                                                            ; sdram_ctrl:sdram_controller|r_wr_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sdram_request_complete_reg                                                                                      ; sdram_request_complete_reg                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.195 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[0]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.314      ;
; 0.195 ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                                                                        ; sdram_ctrl:sdram_controller|r_wr_bctr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.314      ;
; 0.211 ; sdram_ctrl:sdram_controller|r_rd_act                                                                            ; sdram_ctrl:sdram_controller|r_rd_bctr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.330      ;
; 0.271 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[17] ; ram_di_reg[1]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.083      ; 0.458      ;
; 0.271 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[18] ; ram_di_reg[2]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.084      ; 0.459      ;
; 0.271 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[19] ; ram_di_reg[3]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.084      ; 0.459      ;
; 0.273 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[31] ; ram_di_reg[15]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.083      ; 0.460      ;
; 0.274 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[23] ; ram_di_reg[7]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.083      ; 0.461      ;
; 0.281 ; seq_reg[1]                                                                                                      ; seq_reg[2]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.400      ;
; 0.284 ; seq_reg[11]                                                                                                     ; sdram_ctrl:sdram_controller|r_init_fsm[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.404      ;
; 0.289 ; seq_reg[9]                                                                                                      ; seq_reg[10]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.408      ;
; 0.292 ; seq_reg[6]                                                                                                      ; seq_reg[7]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.411      ;
; 0.293 ; seq_reg[4]                                                                                                      ; seq_reg[5]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.412      ;
; 0.294 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[6]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.413      ;
; 0.294 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[8]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.413      ;
; 0.295 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.414      ;
; 0.295 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.414      ;
; 0.295 ; sdram_ctrl:sdram_controller|r_bst_stp[0]                                                                        ; sdram_ctrl:sdram_controller|r_rd_bctr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.414      ;
; 0.296 ; seq_reg[3]                                                                                                      ; seq_reg[4]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.415      ;
; 0.296 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.415      ;
; 0.296 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.415      ;
; 0.296 ; sdram_ctrl:sdram_controller|r_init_tmr[9]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.415      ;
; 0.297 ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                                                                        ; sdram_ctrl:sdram_controller|r_rd_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.416      ;
; 0.301 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[1]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.420      ;
; 0.301 ; seq_reg[11]                                                                                                     ; sdram_ctrl:sdram_controller|r_init_fsm[1]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.420      ;
; 0.301 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[1]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.420      ;
; 0.310 ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                                                                        ; sdram_ctrl:sdram_controller|r_wr_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.429      ;
; 0.320 ; seq_reg[10]                                                                                                     ; seq_reg[11]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.439      ;
; 0.322 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[0]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.441      ;
; 0.329 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[24] ; ram_di_reg[8]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.084      ; 0.517      ;
; 0.330 ; sdram_ctrl:sdram_controller|r_rd_act                                                                            ; sdram_ctrl:sdram_controller|ap1_rd_bst_act            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.450      ;
; 0.331 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[21] ; ram_di_reg[5]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.083      ; 0.518      ;
; 0.332 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[16] ; ram_di_reg[0]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.084      ; 0.520      ;
; 0.350 ; sdram_ctrl:sdram_controller|r_refr_req                                                                          ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.469      ;
; 0.351 ; sdram_ctrl:sdram_controller|r_refr_act                                                                          ; sdram_ctrl:sdram_controller|r_rd_reg                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.470      ;
; 0.358 ; seq_reg[5]                                                                                                      ; seq_reg[6]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.477      ;
; 0.360 ; sdram_ctrl:sdram_controller|r_refr_act                                                                          ; sdram_ctrl:sdram_controller|r_wr_reg                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.479      ;
; 0.364 ; seq_reg[0]                                                                                                      ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.483      ;
; 0.366 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.485      ;
; 0.367 ; seq_reg[7]                                                                                                      ; seq_reg[8]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.486      ;
; 0.371 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[20] ; ram_di_reg[4]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.083      ; 0.558      ;
; 0.371 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[29] ; ram_di_reg[13]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.084      ; 0.559      ;
; 0.371 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[30] ; ram_di_reg[14]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.083      ; 0.558      ;
; 0.373 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[22] ; ram_di_reg[6]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.083      ; 0.560      ;
; 0.373 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[25] ; ram_di_reg[9]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.083      ; 0.560      ;
; 0.379 ; seq_reg[9]                                                                                                      ; sdram_ctrl:sdram_controller|r_refr_act                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.499      ;
; 0.380 ; sdram_ctrl:sdram_controller|r_psel_dly[0]                                                                       ; sdram_ctrl:sdram_controller|ap1_rd_bst_act            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.500      ;
; 0.387 ; seq_reg[10]                                                                                                     ; sdram_ctrl:sdram_controller|sdram_rdy                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.506      ;
; 0.402 ; seq_reg[4]                                                                                                      ; sdram_ctrl:sdram_controller|r_rd_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.034      ; 0.520      ;
; 0.416 ; sdram_ctrl:sdram_controller|r_wr_reg                                                                            ; sdram_ctrl:sdram_controller|r_wr_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.033      ; 0.533      ;
; 0.422 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[1]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.034      ; 0.540      ;
; 0.424 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[11] ; ram_di_reg[11]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.084      ; 0.612      ;
; 0.425 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[9]  ; ram_di_reg[9]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.083      ; 0.612      ;
; 0.429 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                                                                      ; sdram_ctrl:sdram_controller|sdram_rdy                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.548      ;
; 0.430 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                                                                       ; sdram_ctrl:sdram_controller|r_refr_act                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.549      ;
; 0.438 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[10]            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.034      ; 0.556      ;
; 0.440 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                                                                      ; sdram_ctrl:sdram_controller|r_init_fsm[0]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.560      ;
; 0.441 ; seq_reg[11]                                                                                                     ; seq_reg[0]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.563      ;
; 0.441 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                                                                      ; sdram_ctrl:sdram_controller|r_init_fsm[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.561      ;
; 0.442 ; seq_reg[8]                                                                                                      ; seq_reg[9]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.561      ;
; 0.443 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.562      ;
; 0.443 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.562      ;
; 0.444 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.563      ;
; 0.444 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.563      ;
; 0.446 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                                                                       ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.567      ;
; 0.453 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.572      ;
; 0.454 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[8]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.573      ;
; 0.454 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.573      ;
; 0.454 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.573      ;
; 0.456 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.575      ;
; 0.457 ; seq_reg[11]                                                                                                     ; sdram_ctrl:sdram_controller|r_init_tmr[10]            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.576      ;
; 0.457 ; sdram_ctrl:sdram_controller|r_refr_req                                                                          ; sdram_ctrl:sdram_controller|r_wr_reg                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.033      ; 0.574      ;
; 0.457 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.576      ;
; 0.457 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.576      ;
; 0.457 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.576      ;
; 0.458 ; sdram_ctrl:sdram_controller|r_refr_req                                                                          ; sdram_ctrl:sdram_controller|r_rd_reg                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.033      ; 0.575      ;
; 0.460 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[28] ; ram_di_reg[12]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.083      ; 0.647      ;
; 0.484 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[14] ; ram_di_reg[14]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.083      ; 0.671      ;
; 0.494 ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1                                                           ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.613      ;
; 0.497 ; sdram_ctrl:sdram_controller|r_wr_act                                                                            ; sdram_ctrl:sdram_controller|r_wr_bctr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.616      ;
; 0.497 ; sdram_ctrl:sdram_controller|r_rd_reg                                                                            ; sdram_ctrl:sdram_controller|r_rd_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.033      ; 0.614      ;
; 0.506 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.625      ;
; 0.506 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[8]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.625      ;
; 0.507 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[6]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.626      ;
; 0.507 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.626      ;
; 0.509 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.628      ;
; 0.510 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.629      ;
; 0.510 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.629      ;
; 0.519 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.638      ;
+-------+-----------------------------------------------------------------------------------------------------------------+-------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                           ;
+-------+---------------------------------------+----------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                             ; To Node                                                        ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------+----------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 8.699 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[16]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.077     ; 2.851      ;
; 8.699 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[25]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.077     ; 2.851      ;
; 8.714 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[11]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.081     ; 2.832      ;
; 8.714 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[12]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.081     ; 2.832      ;
; 8.717 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[20]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.089     ; 2.821      ;
; 8.717 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[14]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.089     ; 2.821      ;
; 8.717 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[19]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.089     ; 2.821      ;
; 8.720 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.081     ; 2.826      ;
; 8.890 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[4]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.079     ; 2.658      ;
; 8.890 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[22]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.074     ; 2.663      ;
; 8.890 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[22]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.074     ; 2.663      ;
; 8.890 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[20]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.074     ; 2.663      ;
; 8.890 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[20]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.074     ; 2.663      ;
; 8.890 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[0]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.080     ; 2.657      ;
; 8.890 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[1]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.080     ; 2.657      ;
; 8.890 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[2]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.080     ; 2.657      ;
; 8.890 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[3]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.080     ; 2.657      ;
; 8.890 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[4]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.080     ; 2.657      ;
; 8.890 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[5]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.080     ; 2.657      ;
; 8.890 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[6]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.080     ; 2.657      ;
; 8.890 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[7]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.080     ; 2.657      ;
; 8.890 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[8]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.080     ; 2.657      ;
; 8.890 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[9]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.080     ; 2.657      ;
; 8.890 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[10]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.080     ; 2.657      ;
; 8.890 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[11]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.080     ; 2.657      ;
; 8.890 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[12]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.080     ; 2.657      ;
; 8.890 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[13]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.080     ; 2.657      ;
; 8.890 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[14]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.080     ; 2.657      ;
; 8.890 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[15]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.080     ; 2.657      ;
; 8.891 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.073     ; 2.663      ;
; 8.891 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[19]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.078     ; 2.658      ;
; 8.891 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[27]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.078     ; 2.658      ;
; 8.891 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[15]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.075     ; 2.661      ;
; 8.891 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[12]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.075     ; 2.661      ;
; 8.891 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[22]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.078     ; 2.658      ;
; 8.891 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[20]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.078     ; 2.658      ;
; 8.891 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[20]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.073     ; 2.663      ;
; 8.892 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[13]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.079     ; 2.656      ;
; 8.892 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[14]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.079     ; 2.656      ;
; 8.892 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[8]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.079     ; 2.656      ;
; 8.892 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[11]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.079     ; 2.656      ;
; 8.892 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[9]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.079     ; 2.656      ;
; 8.892 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[10]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.079     ; 2.656      ;
; 8.895 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[18]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.086     ; 2.646      ;
; 8.895 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[13]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.068     ; 2.664      ;
; 8.895 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[22]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.086     ; 2.646      ;
; 8.895 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.080     ; 2.652      ;
; 8.895 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[14]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.076     ; 2.656      ;
; 8.895 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[0]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.084     ; 2.648      ;
; 8.895 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[9]            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.075     ; 2.657      ;
; 8.895 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[8]            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.068     ; 2.664      ;
; 8.895 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[23]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.086     ; 2.646      ;
; 8.895 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[21]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.086     ; 2.646      ;
; 8.895 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[2]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.085     ; 2.647      ;
; 8.895 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[10]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.075     ; 2.657      ;
; 8.896 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[12]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.083     ; 2.648      ;
; 8.896 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[15]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.069     ; 2.662      ;
; 8.896 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.083     ; 2.648      ;
; 8.896 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[21]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.075     ; 2.656      ;
; 8.896 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[22]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.075     ; 2.656      ;
; 8.896 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[19]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.075     ; 2.656      ;
; 8.896 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[20]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.075     ; 2.656      ;
; 8.896 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[17]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.075     ; 2.656      ;
; 8.896 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[18]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.075     ; 2.656      ;
; 8.896 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.083     ; 2.648      ;
; 8.896 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.083     ; 2.648      ;
; 8.896 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[11]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.069     ; 2.662      ;
; 8.896 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.083     ; 2.648      ;
; 8.897 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[0]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.080     ; 2.650      ;
; 8.897 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[6]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.080     ; 2.650      ;
; 8.897 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[1]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.080     ; 2.650      ;
; 8.897 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[6]            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.080     ; 2.650      ;
; 8.898 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.080     ; 2.649      ;
; 8.898 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_8BIT_WRITE_ENABLE_reg    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.080     ; 2.649      ;
; 8.898 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.080     ; 2.649      ;
; 8.898 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_READ_reg                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.080     ; 2.649      ;
; 8.898 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[2]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.081     ; 2.648      ;
; 8.898 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[0]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.081     ; 2.648      ;
; 8.898 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[3]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.081     ; 2.648      ;
; 8.898 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[1]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.081     ; 2.648      ;
; 8.898 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[16]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.081     ; 2.648      ;
; 8.898 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[17]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.081     ; 2.648      ;
; 8.899 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.077     ; 2.651      ;
; 8.899 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.077     ; 2.651      ;
; 8.899 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[1]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.078     ; 2.650      ;
; 8.900 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[22]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.077     ; 2.650      ;
; 8.902 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[28]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.068     ; 2.657      ;
; 8.902 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[23]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.073     ; 2.652      ;
; 8.902 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[23]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.067     ; 2.658      ;
; 8.902 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[23]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.067     ; 2.658      ;
; 8.902 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[16]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.069     ; 2.656      ;
; 8.902 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[16]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.069     ; 2.656      ;
; 8.902 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[16]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.068     ; 2.657      ;
; 8.902 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[15]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.067     ; 2.658      ;
; 8.902 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[15]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.067     ; 2.658      ;
; 8.902 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[25]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.073     ; 2.652      ;
; 8.902 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[30]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.067     ; 2.658      ;
; 8.902 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[30]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.067     ; 2.658      ;
; 8.902 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[28]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.068     ; 2.657      ;
; 8.902 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[28]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.067     ; 2.658      ;
+-------+---------------------------------------+----------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                        ;
+--------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node              ; To Node                                                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+--------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 9.788  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[7]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.142     ; 1.647      ;
; 9.818  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[7]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.105     ; 1.656      ;
; 9.818  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[8]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.105     ; 1.656      ;
; 9.819  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[4]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.102     ; 1.658      ;
; 9.819  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[6]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.104     ; 1.656      ;
; 9.820  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[5]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.102     ; 1.657      ;
; 9.820  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[9]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.103     ; 1.656      ;
; 9.820  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[11]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.103     ; 1.656      ;
; 9.821  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[8]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.112     ; 1.647      ;
; 9.823  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[8]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.166     ; 1.589      ;
; 9.823  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[9]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.125     ; 1.632      ;
; 9.825  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[9]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.179     ; 1.574      ;
; 9.826  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[13]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.120     ; 1.634      ;
; 9.826  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[14]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.120     ; 1.634      ;
; 9.826  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[15]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.120     ; 1.634      ;
; 9.827  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[10]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.121     ; 1.632      ;
; 9.827  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[11]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.121     ; 1.632      ;
; 9.827  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[12]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.121     ; 1.632      ;
; 9.828  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[14]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.174     ; 1.576      ;
; 9.828  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[13]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.174     ; 1.576      ;
; 9.828  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[15]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.174     ; 1.576      ;
; 9.829  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[10]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.175     ; 1.574      ;
; 9.829  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[11]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.175     ; 1.574      ;
; 9.829  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[12]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.175     ; 1.574      ;
; 9.832  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ba[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.098     ; 1.649      ;
; 9.832  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ba[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.098     ; 1.649      ;
; 9.832  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[0]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.098     ; 1.649      ;
; 9.832  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[1]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.098     ; 1.649      ;
; 9.832  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[4]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.123     ; 1.625      ;
; 9.832  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.098     ; 1.649      ;
; 9.833  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[2]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.095     ; 1.651      ;
; 9.833  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[3]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.095     ; 1.651      ;
; 9.833  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[7]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.096     ; 1.650      ;
; 9.834  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[4]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.177     ; 1.567      ;
; 9.835  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[5]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.115     ; 1.630      ;
; 9.835  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[6]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.114     ; 1.631      ;
; 9.836  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[3]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.114     ; 1.630      ;
; 9.837  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[5]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.169     ; 1.572      ;
; 9.837  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[6]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.168     ; 1.573      ;
; 9.837  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[0]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.111     ; 1.632      ;
; 9.837  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[1]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.111     ; 1.632      ;
; 9.837  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[2]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.111     ; 1.632      ;
; 9.838  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[3]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.168     ; 1.572      ;
; 9.839  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[0]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.165     ; 1.574      ;
; 9.839  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[1]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.165     ; 1.574      ;
; 9.839  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[2]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.165     ; 1.574      ;
; 9.929  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.102     ; 1.548      ;
; 9.943  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ras_n                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.096     ; 1.540      ;
; 9.943  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cas_n                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.096     ; 1.540      ;
; 9.943  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_we_n                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.096     ; 1.540      ;
; 9.943  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.096     ; 1.540      ;
; 9.943  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.096     ; 1.540      ;
; 10.044 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.089     ; 1.494      ;
; 10.047 ; sdram_reset_ctrl_n_reg ; ram_do_reg[26]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.480      ;
; 10.047 ; sdram_reset_ctrl_n_reg ; ram_do_reg[28]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.480      ;
; 10.047 ; sdram_reset_ctrl_n_reg ; ram_do_reg[23]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.480      ;
; 10.047 ; sdram_reset_ctrl_n_reg ; ram_do_reg[1]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.480      ;
; 10.047 ; sdram_reset_ctrl_n_reg ; ram_do_reg[15]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.480      ;
; 10.047 ; sdram_reset_ctrl_n_reg ; ram_do_reg[25]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.480      ;
; 10.047 ; sdram_reset_ctrl_n_reg ; ram_do_reg[4]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.480      ;
; 10.047 ; sdram_reset_ctrl_n_reg ; ram_do_reg[31]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.480      ;
; 10.047 ; sdram_reset_ctrl_n_reg ; ram_do_reg[7]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.480      ;
; 10.047 ; sdram_reset_ctrl_n_reg ; ram_do_reg[2]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.480      ;
; 10.047 ; sdram_reset_ctrl_n_reg ; ram_do_reg[12]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.480      ;
; 10.047 ; sdram_reset_ctrl_n_reg ; ram_do_reg[9]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.480      ;
; 10.047 ; sdram_reset_ctrl_n_reg ; ram_do_reg[10]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.480      ;
; 10.047 ; sdram_reset_ctrl_n_reg ; sdram_request_reg                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.107     ; 1.473      ;
; 10.047 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_psel[0]                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.107     ; 1.473      ;
; 10.047 ; sdram_reset_ctrl_n_reg ; sdram_request_complete_reg                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.107     ; 1.473      ;
; 10.047 ; sdram_reset_ctrl_n_reg ; ram_do_reg[20]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.480      ;
; 10.047 ; sdram_reset_ctrl_n_reg ; ram_do_reg[18]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.480      ;
; 10.047 ; sdram_reset_ctrl_n_reg ; ram_do_reg[17]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.480      ;
; 10.048 ; sdram_reset_ctrl_n_reg ; ram_di_reg[1]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.101     ; 1.478      ;
; 10.048 ; sdram_reset_ctrl_n_reg ; ram_di_reg[7]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.101     ; 1.478      ;
; 10.048 ; sdram_reset_ctrl_n_reg ; ram_di_reg[9]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.101     ; 1.478      ;
; 10.048 ; sdram_reset_ctrl_n_reg ; ram_di_reg[15]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.101     ; 1.478      ;
; 10.049 ; sdram_reset_ctrl_n_reg ; ram_do_reg[19]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.478      ;
; 10.049 ; sdram_reset_ctrl_n_reg ; ram_do_reg[0]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.478      ;
; 10.049 ; sdram_reset_ctrl_n_reg ; ram_do_reg[27]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.478      ;
; 10.049 ; sdram_reset_ctrl_n_reg ; ram_do_reg[3]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.478      ;
; 10.049 ; sdram_reset_ctrl_n_reg ; ram_do_reg[30]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.478      ;
; 10.049 ; sdram_reset_ctrl_n_reg ; ram_do_reg[16]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.478      ;
; 10.049 ; sdram_reset_ctrl_n_reg ; ram_do_reg[5]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.478      ;
; 10.049 ; sdram_reset_ctrl_n_reg ; ram_do_reg[6]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.478      ;
; 10.049 ; sdram_reset_ctrl_n_reg ; ram_do_reg[29]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.478      ;
; 10.049 ; sdram_reset_ctrl_n_reg ; ram_do_reg[13]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.478      ;
; 10.049 ; sdram_reset_ctrl_n_reg ; ram_do_reg[14]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.478      ;
; 10.049 ; sdram_reset_ctrl_n_reg ; ram_do_reg[8]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.478      ;
; 10.049 ; sdram_reset_ctrl_n_reg ; ram_do_reg[22]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.478      ;
; 10.049 ; sdram_reset_ctrl_n_reg ; ram_do_reg[11]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.478      ;
; 10.049 ; sdram_reset_ctrl_n_reg ; ram_do_reg[24]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.478      ;
; 10.049 ; sdram_reset_ctrl_n_reg ; ram_do_reg[21]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.478      ;
; 10.049 ; sdram_reset_ctrl_n_reg ; ram_di_reg[0]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.101     ; 1.477      ;
; 10.049 ; sdram_reset_ctrl_n_reg ; ram_di_reg[4]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.102     ; 1.476      ;
; 10.049 ; sdram_reset_ctrl_n_reg ; ram_di_reg[5]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.102     ; 1.476      ;
; 10.049 ; sdram_reset_ctrl_n_reg ; ram_di_reg[6]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.102     ; 1.476      ;
; 10.049 ; sdram_reset_ctrl_n_reg ; ram_di_reg[8]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.101     ; 1.477      ;
; 10.049 ; sdram_reset_ctrl_n_reg ; ram_di_reg[12]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.102     ; 1.476      ;
; 10.049 ; sdram_reset_ctrl_n_reg ; ram_di_reg[13]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.101     ; 1.477      ;
; 10.049 ; sdram_reset_ctrl_n_reg ; ram_di_reg[14]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.102     ; 1.476      ;
+--------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                            ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                        ; To Node                                                                                                                                                                        ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 49.518 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[8] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.449      ; 0.918      ;
; 98.516 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 1.439      ;
; 98.516 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 1.439      ;
; 98.516 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 1.439      ;
; 98.516 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 1.439      ;
; 98.555 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.041     ; 1.391      ;
; 98.555 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.041     ; 1.391      ;
; 98.555 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.041     ; 1.391      ;
; 98.577 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 1.378      ;
; 98.577 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 1.378      ;
; 98.577 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 1.378      ;
; 98.577 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 1.378      ;
; 98.589 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.356      ;
; 98.589 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.356      ;
; 98.589 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.356      ;
; 98.589 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.356      ;
; 98.589 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.356      ;
; 98.589 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.356      ;
; 98.589 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.356      ;
; 98.589 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.356      ;
; 98.589 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.356      ;
; 98.724 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 1.228      ;
; 98.724 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 1.228      ;
; 98.780 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 1.174      ;
; 98.780 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 1.174      ;
; 98.780 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 1.174      ;
; 98.780 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 1.174      ;
; 98.796 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 1.159      ;
; 98.806 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 1.155      ;
; 98.806 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 1.155      ;
; 98.806 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 1.155      ;
; 98.806 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 1.155      ;
; 98.806 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 1.155      ;
; 98.806 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 1.155      ;
; 98.806 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 1.155      ;
; 98.806 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 1.155      ;
; 98.806 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 1.155      ;
; 98.806 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 1.155      ;
; 98.806 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 1.155      ;
; 98.806 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 1.155      ;
; 98.811 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[3]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 1.143      ;
; 98.811 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 1.143      ;
; 98.811 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 1.143      ;
; 98.811 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 1.143      ;
; 98.811 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 1.143      ;
; 98.880 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 1.074      ;
; 98.880 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 1.074      ;
; 98.880 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 1.074      ;
; 98.880 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 1.074      ;
; 98.918 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.040     ; 1.029      ;
; 98.988 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.043     ; 0.956      ;
; 98.988 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.043     ; 0.956      ;
; 98.990 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.043     ; 0.954      ;
; 99.000 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 0.952      ;
; 99.000 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 0.952      ;
; 99.000 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 0.952      ;
; 99.000 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 0.952      ;
; 99.000 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 0.952      ;
; 99.000 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 0.952      ;
; 99.000 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 0.952      ;
; 99.000 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 0.952      ;
; 99.000 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 0.952      ;
; 99.000 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 0.952      ;
; 99.002 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.044     ; 0.941      ;
; 99.002 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.044     ; 0.941      ;
; 99.002 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.044     ; 0.941      ;
; 99.002 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.044     ; 0.941      ;
; 99.002 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.044     ; 0.941      ;
; 99.002 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.044     ; 0.941      ;
; 99.002 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.044     ; 0.941      ;
; 99.002 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.044     ; 0.941      ;
; 99.002 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.044     ; 0.941      ;
; 99.002 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.044     ; 0.941      ;
; 99.013 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.044     ; 0.930      ;
; 99.013 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.044     ; 0.930      ;
; 99.013 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.044     ; 0.930      ;
; 99.013 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[2]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.044     ; 0.930      ;
; 99.015 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 0.939      ;
; 99.015 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 0.939      ;
; 99.015 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 0.939      ;
; 99.015 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 0.939      ;
; 99.015 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 0.939      ;
; 99.015 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 0.939      ;
; 99.015 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 0.939      ;
; 99.015 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 0.939      ;
; 99.015 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 0.939      ;
; 99.019 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.030     ; 0.938      ;
; 99.019 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.030     ; 0.938      ;
; 99.019 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.030     ; 0.938      ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                              ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node    ; To Node                                             ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 65.054 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.035     ; 1.554      ;
; 65.054 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.035     ; 1.554      ;
; 65.054 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.035     ; 1.554      ;
; 65.054 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.035     ; 1.554      ;
; 65.055 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.033     ; 1.555      ;
; 65.055 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.033     ; 1.555      ;
; 65.055 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.033     ; 1.555      ;
; 65.055 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.034     ; 1.554      ;
; 65.055 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.034     ; 1.554      ;
; 65.055 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.033     ; 1.555      ;
; 65.055 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.034     ; 1.554      ;
; 65.055 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.033     ; 1.555      ;
; 65.055 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.033     ; 1.555      ;
; 65.055 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.033     ; 1.555      ;
; 65.055 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.034     ; 1.554      ;
; 65.055 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.033     ; 1.555      ;
; 65.055 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.033     ; 1.555      ;
; 65.055 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.033     ; 1.555      ;
; 65.055 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.034     ; 1.554      ;
; 65.055 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.033     ; 1.555      ;
; 65.055 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.033     ; 1.555      ;
; 65.055 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.033     ; 1.555      ;
; 65.055 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.033     ; 1.555      ;
; 65.055 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.033     ; 1.555      ;
; 65.056 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.033     ; 1.554      ;
; 65.056 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.033     ; 1.554      ;
; 65.056 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.033     ; 1.554      ;
; 65.056 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.033     ; 1.554      ;
; 65.056 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.033     ; 1.554      ;
; 65.056 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.032     ; 1.555      ;
; 65.256 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 0.167      ; 1.554      ;
; 66.282 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.198      ; 1.559      ;
; 66.282 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.198      ; 1.559      ;
; 66.282 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.198      ; 1.559      ;
; 66.282 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.198      ; 1.559      ;
; 66.282 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.198      ; 1.559      ;
; 66.282 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.198      ; 1.559      ;
; 66.282 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.198      ; 1.559      ;
; 66.282 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.198      ; 1.559      ;
; 66.282 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.198      ; 1.559      ;
; 66.282 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.198      ; 1.559      ;
; 66.282 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.198      ; 1.559      ;
; 66.282 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.198      ; 1.559      ;
; 66.282 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.198      ; 1.559      ;
; 66.282 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.198      ; 1.559      ;
; 66.282 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.198      ; 1.559      ;
; 66.282 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.198      ; 1.559      ;
; 66.285 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.196      ; 1.554      ;
; 66.285 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.196      ; 1.554      ;
; 66.285 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.196      ; 1.554      ;
; 66.285 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.197      ; 1.555      ;
; 66.285 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.197      ; 1.555      ;
; 66.285 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.197      ; 1.555      ;
; 66.285 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.196      ; 1.554      ;
; 66.285 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.197      ; 1.555      ;
; 66.285 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.197      ; 1.555      ;
; 66.286 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.198      ; 1.555      ;
; 66.286 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.198      ; 1.555      ;
; 66.286 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.198      ; 1.555      ;
; 66.286 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.198      ; 1.555      ;
; 66.286 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.198      ; 1.555      ;
; 66.286 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.198      ; 1.555      ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                               ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node    ; To Node                                             ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; -0.007 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.340      ; 1.417      ;
; -0.007 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.340      ; 1.417      ;
; -0.007 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.340      ; 1.417      ;
; -0.007 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.340      ; 1.417      ;
; -0.007 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.340      ; 1.417      ;
; -0.007 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.340      ; 1.417      ;
; -0.007 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.339      ; 1.416      ;
; -0.007 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.339      ; 1.416      ;
; -0.006 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.338      ; 1.416      ;
; -0.006 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.338      ; 1.416      ;
; -0.006 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.338      ; 1.416      ;
; -0.006 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.339      ; 1.417      ;
; -0.006 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.338      ; 1.416      ;
; -0.006 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.339      ; 1.417      ;
; -0.006 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.339      ; 1.417      ;
; -0.004 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.340      ; 1.420      ;
; -0.004 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.340      ; 1.420      ;
; -0.004 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.340      ; 1.420      ;
; -0.004 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.340      ; 1.420      ;
; -0.004 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.340      ; 1.420      ;
; -0.004 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.340      ; 1.420      ;
; -0.004 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.340      ; 1.420      ;
; -0.004 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.340      ; 1.420      ;
; -0.004 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.340      ; 1.420      ;
; -0.004 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.340      ; 1.420      ;
; -0.004 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.340      ; 1.420      ;
; -0.004 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.340      ; 1.420      ;
; -0.004 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.340      ; 1.420      ;
; -0.004 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.340      ; 1.420      ;
; -0.004 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.340      ; 1.420      ;
; -0.004 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.340      ; 1.420      ;
; 1.085  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.246      ; 1.415      ;
; 1.293  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 1.415      ;
; 1.293  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 1.415      ;
; 1.294  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 1.416      ;
; 1.294  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 1.416      ;
; 1.294  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 1.416      ;
; 1.294  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 1.416      ;
; 1.294  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 1.415      ;
; 1.294  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 1.415      ;
; 1.294  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 1.415      ;
; 1.294  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 1.415      ;
; 1.294  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 1.415      ;
; 1.295  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 1.416      ;
; 1.295  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 1.416      ;
; 1.295  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 1.416      ;
; 1.295  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 1.415      ;
; 1.295  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 1.415      ;
; 1.295  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 1.415      ;
; 1.295  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 1.415      ;
; 1.295  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 1.416      ;
; 1.295  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 1.416      ;
; 1.295  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 1.416      ;
; 1.295  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 1.416      ;
; 1.295  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 1.416      ;
; 1.295  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 1.416      ;
; 1.295  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 1.416      ;
; 1.295  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 1.416      ;
; 1.295  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 1.416      ;
; 1.295  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 1.416      ;
; 1.295  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 1.416      ;
; 1.295  ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 1.416      ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                           ; To Node                                                                                                                                                                                                                ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.690 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a5 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.199      ; 0.979      ;
; 0.690 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a4 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.199      ; 0.979      ;
; 0.690 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a3 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.199      ; 0.979      ;
; 0.690 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a2 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.199      ; 0.979      ;
; 0.690 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.199      ; 0.979      ;
; 0.690 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.199      ; 0.979      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a63  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a62  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a61  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a60  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a59  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a58  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a57  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a56  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a47  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a46  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a45  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a44  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a43  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a42  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a41  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a40  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a31  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a30  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a29  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a28  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a27  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a26  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a25  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a24  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a23  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a22  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a21  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a20  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a15  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a14  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a13  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a12  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a11  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a10  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a9   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.717 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 1.007      ;
; 0.814 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a55  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.105      ;
; 0.814 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a54  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.105      ;
; 0.814 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a53  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.105      ;
; 0.814 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a52  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.105      ;
; 0.814 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a51  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.105      ;
; 0.814 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a50  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.105      ;
; 0.814 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a49  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.105      ;
; 0.814 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a48  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.105      ;
; 0.814 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a39  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.105      ;
; 0.814 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a38  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.105      ;
; 0.814 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a37  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.105      ;
; 0.814 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a36  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.105      ;
; 0.814 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a35  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.105      ;
; 0.814 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a34  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.105      ;
; 0.814 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a33  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.105      ;
; 0.814 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a32  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.105      ;
; 0.814 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a19  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.105      ;
; 0.814 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a18  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.105      ;
; 0.814 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a17  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.105      ;
; 0.814 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a16  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.105      ;
; 0.814 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a7   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.105      ;
; 0.814 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a6   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.105      ;
; 0.814 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a5   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.105      ;
; 0.814 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a4   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.105      ;
; 0.814 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a3   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.105      ;
; 0.814 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a2   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.105      ;
; 0.814 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a1   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.105      ;
; 0.814 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.105      ;
; 0.856 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a6 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.197      ; 1.143      ;
; 0.856 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a5 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.197      ; 1.143      ;
; 0.856 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a4 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.197      ; 1.143      ;
; 0.856 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a3 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.197      ; 1.143      ;
; 0.856 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a2 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.197      ; 1.143      ;
; 0.856 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.197      ; 1.143      ;
; 0.856 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.197      ; 1.143      ;
; 0.991 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a15   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.199      ; 1.280      ;
; 0.991 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a14   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.199      ; 1.280      ;
; 0.991 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a13   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.199      ; 1.280      ;
; 0.991 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a12   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.199      ; 1.280      ;
; 0.991 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a11   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.199      ; 1.280      ;
; 0.991 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a10   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.199      ; 1.280      ;
; 0.991 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a9    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.199      ; 1.280      ;
; 0.991 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a8    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.199      ; 1.280      ;
; 0.991 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a7    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.199      ; 1.280      ;
; 0.991 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a6    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.199      ; 1.280      ;
; 0.991 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a5    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.199      ; 1.280      ;
; 0.991 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a4    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.199      ; 1.280      ;
; 0.991 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a3    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.199      ; 1.280      ;
; 0.991 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a2    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.199      ; 1.280      ;
; 0.991 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a1    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.199      ; 1.280      ;
; 0.991 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.199      ; 1.280      ;
; 2.086 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[6]                                                                                                                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.306      ; 2.496      ;
; 2.086 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[7]                                                                                                                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.306      ; 2.496      ;
; 2.089 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[5]                                                                                                                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.309      ; 2.502      ;
; 2.089 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                                                                                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.308      ; 2.501      ;
; 2.272 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_shift_reg[9]                                                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.119      ; 2.495      ;
; 2.272 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_shift_reg[8]                                                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.119      ; 2.495      ;
; 2.272 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_shift_reg[7]                                                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.119      ; 2.495      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                             ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                        ; To Node                                                                                                                                                                        ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 0.704  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.042      ; 0.830      ;
; 0.704  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.042      ; 0.830      ;
; 0.704  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.042      ; 0.830      ;
; 0.705  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.027      ; 0.816      ;
; 0.705  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.027      ; 0.816      ;
; 0.705  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.027      ; 0.816      ;
; 0.705  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[2]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.027      ; 0.816      ;
; 0.707  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.039      ; 0.830      ;
; 0.707  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.039      ; 0.830      ;
; 0.707  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.039      ; 0.830      ;
; 0.707  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.039      ; 0.830      ;
; 0.707  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.039      ; 0.830      ;
; 0.707  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.039      ; 0.830      ;
; 0.707  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.039      ; 0.830      ;
; 0.707  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.039      ; 0.830      ;
; 0.707  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.039      ; 0.830      ;
; 0.710  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.831      ;
; 0.710  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.831      ;
; 0.710  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.831      ;
; 0.710  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.831      ;
; 0.710  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.831      ;
; 0.710  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.831      ;
; 0.710  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.831      ;
; 0.710  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.831      ;
; 0.710  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.831      ;
; 0.710  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.831      ;
; 0.713  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.028      ; 0.825      ;
; 0.713  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.028      ; 0.825      ;
; 0.713  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.028      ; 0.825      ;
; 0.713  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.028      ; 0.825      ;
; 0.713  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.028      ; 0.825      ;
; 0.713  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.028      ; 0.825      ;
; 0.713  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.028      ; 0.825      ;
; 0.713  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.028      ; 0.825      ;
; 0.713  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.028      ; 0.825      ;
; 0.713  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.028      ; 0.825      ;
; 0.721  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.028      ; 0.833      ;
; 0.721  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.029      ; 0.834      ;
; 0.721  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.029      ; 0.834      ;
; 0.755  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.032      ; 0.871      ;
; 0.833  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.039      ; 0.956      ;
; 0.833  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.039      ; 0.956      ;
; 0.833  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.039      ; 0.956      ;
; 0.833  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.039      ; 0.956      ;
; 0.843  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.045      ; 0.972      ;
; 0.843  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.045      ; 0.972      ;
; 0.843  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.045      ; 0.972      ;
; 0.843  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.045      ; 0.972      ;
; 0.843  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.045      ; 0.972      ;
; 0.843  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.045      ; 0.972      ;
; 0.843  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.045      ; 0.972      ;
; 0.843  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.045      ; 0.972      ;
; 0.843  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.045      ; 0.972      ;
; 0.843  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.045      ; 0.972      ;
; 0.843  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.045      ; 0.972      ;
; 0.843  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.045      ; 0.972      ;
; 0.872  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[3]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.039      ; 0.995      ;
; 0.872  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.039      ; 0.995      ;
; 0.872  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.039      ; 0.995      ;
; 0.872  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.039      ; 0.995      ;
; 0.872  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.039      ; 0.995      ;
; 0.879  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.040      ; 1.003      ;
; 0.918  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.039      ; 1.041      ;
; 0.918  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.039      ; 1.041      ;
; 0.918  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.039      ; 1.041      ;
; 0.918  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.039      ; 1.041      ;
; 0.958  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 1.079      ;
; 0.958  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 1.079      ;
; 1.031  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.049      ; 1.164      ;
; 1.031  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.049      ; 1.164      ;
; 1.031  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.049      ; 1.164      ;
; 1.031  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.049      ; 1.164      ;
; 1.031  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.049      ; 1.164      ;
; 1.031  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.049      ; 1.164      ;
; 1.031  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.049      ; 1.164      ;
; 1.031  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.049      ; 1.164      ;
; 1.031  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.049      ; 1.164      ;
; 1.048  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.040      ; 1.172      ;
; 1.048  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.040      ; 1.172      ;
; 1.048  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.040      ; 1.172      ;
; 1.048  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.040      ; 1.172      ;
; 1.081  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.051      ; 1.216      ;
; 1.081  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.051      ; 1.216      ;
; 1.081  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.051      ; 1.216      ;
; 1.138  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.040      ; 1.262      ;
; 1.138  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.040      ; 1.262      ;
; 1.138  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.040      ; 1.262      ;
; 1.138  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.040      ; 1.262      ;
; 50.175 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[8] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; -50.000      ; 0.528      ; 0.807      ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                        ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node              ; To Node                                                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 1.161 ; sdram_reset_ctrl_n_reg ; seq_reg[0]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.344      ;
; 1.161 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.344      ;
; 1.161 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.344      ;
; 1.161 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.344      ;
; 1.161 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.344      ;
; 1.161 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.344      ;
; 1.161 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.344      ;
; 1.161 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.344      ;
; 1.161 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.344      ;
; 1.161 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.344      ;
; 1.161 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.344      ;
; 1.161 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_req                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.344      ;
; 1.161 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.344      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; seq_reg[1]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.076      ; 1.342      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; seq_reg[2]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.076      ; 1.342      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; seq_reg[3]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.076      ; 1.342      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; seq_reg[4]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.076      ; 1.342      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; seq_reg[5]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.076      ; 1.342      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; seq_reg[6]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.076      ; 1.342      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; seq_reg[7]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.076      ; 1.342      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; seq_reg[8]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.076      ; 1.342      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; seq_reg[9]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.076      ; 1.342      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; seq_reg[10]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.076      ; 1.342      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; seq_reg[11]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.076      ; 1.342      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.076      ; 1.342      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.077      ; 1.343      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.076      ; 1.342      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.077      ; 1.343      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.076      ; 1.342      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_act                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.077      ; 1.343      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_reg                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.077      ; 1.343      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.075      ; 1.341      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.075      ; 1.341      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.075      ; 1.341      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.075      ; 1.341      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.076      ; 1.342      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_reg                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.077      ; 1.343      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.075      ; 1.341      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.075      ; 1.341      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; ram_di_reg[2]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.345      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; ram_di_reg[3]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.345      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; ram_di_reg[10]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.345      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; ram_di_reg[11]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.345      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_oe                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.345      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[1]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.075      ; 1.341      ;
; 1.162 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[0]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.075      ; 1.341      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[26]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.350      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[19]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 1.349      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[0]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 1.349      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[27]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 1.349      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[3]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 1.349      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[28]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.350      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[30]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 1.349      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[23]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.350      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[16]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 1.349      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[1]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.350      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[5]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 1.349      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[6]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 1.349      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[15]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.350      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[25]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.350      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[29]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 1.349      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[13]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 1.349      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[14]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 1.349      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[4]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.350      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[8]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 1.349      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[31]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.350      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[7]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.350      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[2]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.350      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[12]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.350      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[22]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 1.349      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[11]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 1.349      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[9]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.350      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[10]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.350      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[20]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.350      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[18]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.350      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[17]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.350      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[24]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 1.349      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_do_reg[21]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 1.349      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_di_reg[0]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.348      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_di_reg[4]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.347      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_di_reg[5]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.347      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_di_reg[6]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.347      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_di_reg[8]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.348      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_di_reg[12]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.347      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_di_reg[13]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.348      ;
; 1.164 ; sdram_reset_ctrl_n_reg ; ram_di_reg[14]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.347      ;
; 1.165 ; sdram_reset_ctrl_n_reg ; ram_di_reg[1]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.349      ;
; 1.165 ; sdram_reset_ctrl_n_reg ; ram_di_reg[7]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.349      ;
; 1.165 ; sdram_reset_ctrl_n_reg ; ram_di_reg[9]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.349      ;
; 1.165 ; sdram_reset_ctrl_n_reg ; ram_di_reg[15]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.349      ;
; 1.165 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.093      ; 1.362      ;
; 1.166 ; sdram_reset_ctrl_n_reg ; sdram_request_reg                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.074      ; 1.344      ;
; 1.166 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_psel[0]                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.074      ; 1.344      ;
; 1.166 ; sdram_reset_ctrl_n_reg ; sdram_request_complete_reg                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.074      ; 1.344      ;
; 1.269 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ras_n                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.074      ; 1.419      ;
; 1.269 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cas_n                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.074      ; 1.419      ;
; 1.269 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_we_n                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.074      ; 1.419      ;
; 1.269 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.074      ; 1.419      ;
; 1.269 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.074      ; 1.419      ;
; 1.282 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.426      ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                         ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+---------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                                                          ; Clock Edge ; Target                    ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+---------------------------+
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[2]              ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[3]              ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[4]              ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[5]              ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[6]              ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[7]              ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[8]              ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[9]              ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[0]         ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[1]         ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[2]         ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[3]         ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[4]         ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[5]         ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[6]         ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[7]         ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[8]         ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[9]         ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[0]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[1]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[2]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[3]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[4]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[6]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[7]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[9]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[0]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[1]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[2]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[3]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[4]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[5]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[6]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[7]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[8]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[9]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[0] ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[1] ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[2] ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[3] ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[4] ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[5] ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[6] ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[7] ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[8] ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[9] ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[0]       ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[1]       ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[2]       ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[3]       ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[4]       ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[5]       ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[6]       ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[7]       ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[0]       ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[1]       ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[2]       ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[3]       ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[4]       ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[5]       ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[6]       ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[7]       ;
; 4.153 ; 4.369        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[5]   ;
; 4.153 ; 4.369        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[8]   ;
; 4.175 ; 4.359        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[5]   ;
; 4.175 ; 4.359        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[8]   ;
; 4.175 ; 4.359        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[5]   ;
; 4.175 ; 4.359        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[8]   ;
; 4.175 ; 4.359        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[0]       ;
; 4.175 ; 4.359        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[1]       ;
; 4.175 ; 4.359        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[2]       ;
; 4.175 ; 4.359        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[3]       ;
; 4.175 ; 4.359        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[4]       ;
; 4.175 ; 4.359        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[5]       ;
; 4.175 ; 4.359        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[6]       ;
; 4.175 ; 4.359        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[7]       ;
; 4.175 ; 4.359        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[0]       ;
; 4.175 ; 4.359        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[1]       ;
; 4.175 ; 4.359        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[2]       ;
; 4.175 ; 4.359        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[3]       ;
; 4.175 ; 4.359        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[4]       ;
; 4.175 ; 4.359        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[5]       ;
; 4.175 ; 4.359        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[6]       ;
; 4.175 ; 4.359        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[7]       ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[2]              ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[3]              ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[4]              ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[5]              ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[6]              ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[7]              ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[8]              ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[9]              ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[0]         ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[1]         ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[2]         ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[3]         ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[4]         ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[5]         ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[6]         ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[7]         ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+---------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                     ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                                                          ; Clock Edge ; Target                                                ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-------------------------------------------------------+
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[0]                                         ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[10]                                        ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[11]                                        ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[12]                                        ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[13]                                        ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[14]                                        ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[15]                                        ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[1]                                         ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[2]                                         ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[3]                                         ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[4]                                         ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[5]                                         ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[6]                                         ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[7]                                         ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[8]                                         ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[9]                                         ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[0]                                         ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[11]                                        ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[13]                                        ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[14]                                        ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[16]                                        ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[19]                                        ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[21]                                        ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[22]                                        ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[24]                                        ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[27]                                        ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[29]                                        ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[30]                                        ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[3]                                         ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[5]                                         ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[6]                                         ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[8]                                         ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[0]             ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[1]             ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[2]             ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[3]             ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[4]             ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[6]             ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[7]             ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[8]             ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[9]             ;
; 5.606 ; 5.761        ; 0.155          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[8]               ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_refr_req                ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1 ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[0]                                            ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_bena_reg[0]                                       ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_bena_reg[1]                                       ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[10]                                        ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[12]                                        ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[15]                                        ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[17]                                        ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[18]                                        ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[1]                                         ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[20]                                        ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[23]                                        ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[25]                                        ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[26]                                        ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[28]                                        ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[2]                                         ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[31]                                        ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[4]                                         ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[7]                                         ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[9]                                         ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|ap1_rd_bst_act            ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_bst_stp[0]              ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[0]             ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[1]             ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[2]             ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[10]            ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_psel[0]                 ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_psel_dly[0]             ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_act                  ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_bctr[0]              ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_reg                  ;
; 5.607 ; 5.762        ; 0.155          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[0]               ;
; 5.607 ; 5.762        ; 0.155          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[13]              ;
; 5.607 ; 5.762        ; 0.155          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[14]              ;
; 5.607 ; 5.762        ; 0.155          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[15]              ;
; 5.607 ; 5.762        ; 0.155          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[1]               ;
; 5.607 ; 5.762        ; 0.155          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[2]               ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_refr_act                ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_dq_oe             ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_act                  ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_bctr[0]              ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_reg                  ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|sdram_rdy                 ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_request_complete_reg                            ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_request_reg                                     ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[10]                                           ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[11]                                           ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[1]                                            ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[2]                                            ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[3]                                            ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[4]                                            ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[5]                                            ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[6]                                            ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[7]                                            ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[8]                                            ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[9]                                            ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                          ;
+--------+--------------+----------------+-----------------+--------------------------------------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type            ; Clock                                                                          ; Clock Edge ; Target                                                                                                                                                                                                                                     ;
+--------+--------------+----------------+-----------------+--------------------------------------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 17.205 ; 17.435       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_address_reg0  ;
; 17.205 ; 17.435       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_address_reg0     ;
; 17.205 ; 17.435       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a0~porta_address_reg0                                                                                                                                       ;
; 17.205 ; 17.435       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a1~porta_address_reg0                                                                                                                                       ;
; 17.205 ; 17.435       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a8~porta_address_reg0                                                                                                                                       ;
; 17.205 ; 17.435       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_7_0|altsyncram:ram_block_rtl_0|altsyncram_ig41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                            ;
; 17.205 ; 17.435       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_7_0|altsyncram:ram_block_rtl_0|altsyncram_ig41:auto_generated|ram_block1a0~porta_we_reg                                                                                                                  ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0                     ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~portb_address_reg0  ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a1                     ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a2                     ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a3                     ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a4                     ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a5                     ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a6                     ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_address_reg0  ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_address_reg0    ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0                        ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~portb_address_reg0     ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a1                        ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a10                       ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a11                       ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a12                       ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a13                       ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a14                       ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a15                       ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a2                        ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a3                        ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a4                        ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a5                        ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a6                        ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a7                        ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a8                        ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a9                        ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|sin_cos:tab_inst|sin_rom:sin_inst|altsyncram:altsyncram_component|altsyncram_r842:auto_generated|ram_block1a0~porta_address_reg0                                                                                             ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|sin_cos:tab_inst|sin_rom:sin_inst|altsyncram:altsyncram_component|altsyncram_r842:auto_generated|ram_block1a3~porta_address_reg0                                                                                             ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a10~porta_address_reg0                                                                                                                                      ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a12~porta_address_reg0                                                                                                                                      ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a13~porta_address_reg0                                                                                                                                      ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a14~porta_address_reg0                                                                                                                                      ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a22~porta_address_reg0                                                                                                                                      ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a3~porta_address_reg0                                                                                                                                       ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a4~porta_address_reg0                                                                                                                                       ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a5~porta_address_reg0                                                                                                                                       ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a7~porta_address_reg0                                                                                                                                       ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a9~porta_address_reg0                                                                                                                                       ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram23_16|altsyncram:ram_block_rtl_0|altsyncram_ig41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                           ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram23_16|altsyncram:ram_block_rtl_0|altsyncram_ig41:auto_generated|ram_block1a0~porta_we_reg                                                                                                                 ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_15_8|altsyncram:ram_block_rtl_0|altsyncram_ig41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                           ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_15_8|altsyncram:ram_block_rtl_0|altsyncram_ig41:auto_generated|ram_block1a0~porta_we_reg                                                                                                                 ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_ig41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                          ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_ig41:auto_generated|ram_block1a0~porta_we_reg                                                                                                                ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|generic_ram_infer:freezer_bram|altsyncram:ram_block_rtl_0|altsyncram_sd41:auto_generated|ram_block1a0~porta_address_reg0 ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|generic_ram_infer:freezer_bram|altsyncram:ram_block_rtl_0|altsyncram_sd41:auto_generated|ram_block1a0~porta_we_reg       ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0   ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0                     ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~portb_address_reg0  ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a1                     ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a2                     ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a3                     ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a4                     ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a5                     ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0                       ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~portb_address_reg0    ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a1                       ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a16                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a17                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a18                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a19                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a2                       ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a3                       ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a32                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a33                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a34                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a35                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a36                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a37                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a38                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a39                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a4                       ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a48                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a49                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a5                       ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a50                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a51                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a52                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a53                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a54                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a55                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a6                       ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a7                       ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_address_reg0    ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|sin_cos:tab_inst|sin_rom:sin_inst|altsyncram:altsyncram_component|altsyncram_r842:auto_generated|ram_block1a0~portb_address_reg0                                                                                             ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|sin_cos:tab_inst|sin_rom:sin_inst|altsyncram:altsyncram_component|altsyncram_r842:auto_generated|ram_block1a3~portb_address_reg0                                                                                             ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a11~porta_address_reg0                                                                                                                                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a2~porta_address_reg0                                                                                                                                       ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a6~porta_address_reg0                                                                                                                                       ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_7_0|altsyncram:ram_block_rtl_0|altsyncram_ig41:auto_generated|ram_block1a0~porta_datain_reg0                                                                                                             ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_datain_reg0   ;
+--------+--------------+----------------+-----------------+--------------------------------------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                         ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                ; Clock Edge ; Target                                                                                   ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+------------------------------------------------------------------------------------------+
; 17.437 ; 17.437       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]           ;
; 17.437 ; 17.437       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]           ;
; 17.437 ; 17.437       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]           ;
; 17.437 ; 17.437       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]           ;
; 17.437 ; 17.437       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|observablevcoout ;
; 17.451 ; 17.451       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]         ;
; 17.458 ; 17.458       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; mcc_pll3|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl|inclk[0]               ;
; 17.458 ; 17.458       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; mcc_pll3|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl|outclk                 ;
; 17.462 ; 17.462       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; mcc_pll3|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl|inclk[0]               ;
; 17.462 ; 17.462       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; mcc_pll3|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl|outclk                 ;
; 17.468 ; 17.468       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]         ;
; 17.483 ; 17.483       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]           ;
; 17.483 ; 17.483       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]           ;
; 17.483 ; 17.483       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]           ;
; 17.483 ; 17.483       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]           ;
; 17.483 ; 17.483       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|observablevcoout ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                  ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                ; Clock Edge ; Target                                                                                                                                                                            ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 33.026 ; 33.256       ; 0.230          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~porta_address_reg0 ;
; 33.026 ; 33.256       ; 0.230          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~porta_re_reg       ;
; 33.045 ; 33.261       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[0]                                                                                                                                      ;
; 33.045 ; 33.261       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[1]                                                                                                                                      ;
; 33.045 ; 33.261       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[2]                                                                                                                                      ;
; 33.045 ; 33.261       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[3]                                                                                                                                      ;
; 33.045 ; 33.261       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[4]                                                                                                                                      ;
; 33.045 ; 33.261       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[5]                                                                                                                                      ;
; 33.045 ; 33.261       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[6]                                                                                                                                      ;
; 33.045 ; 33.261       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[7]                                                                                                                                      ;
; 33.045 ; 33.261       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[0]                                                                                                                                   ;
; 33.045 ; 33.261       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[1]                                                                                                                                   ;
; 33.045 ; 33.261       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[2]                                                                                                                                   ;
; 33.045 ; 33.261       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[3]                                                                                                                                   ;
; 33.045 ; 33.261       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[4]                                                                                                                                   ;
; 33.045 ; 33.261       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[5]                                                                                                                                   ;
; 33.045 ; 33.261       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[6]                                                                                                                                   ;
; 33.045 ; 33.261       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[7]                                                                                                                                   ;
; 33.045 ; 33.261       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[8]                                                                                                                                   ;
; 33.045 ; 33.261       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.getreport_sendpkt1_end                                                                                                                ;
; 33.045 ; 33.261       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.send_getreport_ack                                                                                                                    ;
; 33.045 ; 33.261       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt1_end                                                                                                               ;
; 33.045 ; 33.261       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait40                                                                                                                                ;
; 33.045 ; 33.261       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait6                                                                                                                                 ;
; 33.046 ; 33.262       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[10]                                                                                                                                 ;
; 33.046 ; 33.262       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[11]                                                                                                                                 ;
; 33.046 ; 33.262       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[12]                                                                                                                                 ;
; 33.046 ; 33.262       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[13]                                                                                                                                 ;
; 33.046 ; 33.262       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[14]                                                                                                                                 ;
; 33.046 ; 33.262       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[1]                                                                                                                                  ;
; 33.046 ; 33.262       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[2]                                                                                                                                  ;
; 33.046 ; 33.262       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[3]                                                                                                                                  ;
; 33.046 ; 33.262       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[4]                                                                                                                                  ;
; 33.046 ; 33.262       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[5]                                                                                                                                  ;
; 33.046 ; 33.262       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[6]                                                                                                                                  ;
; 33.046 ; 33.262       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[7]                                                                                                                                  ;
; 33.046 ; 33.262       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[8]                                                                                                                                  ;
; 33.046 ; 33.262       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[9]                                                                                                                                  ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[0]                                                                                                                                 ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[1]                                                                                                                                 ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[2]                                                                                                                                 ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[4]                                                                                                                                 ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[5]                                                                                                                                 ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[6]                                                                                                                                 ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[7]                                                                                                                                 ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[0]                                                                                                                                  ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[10]                                                                                                                                  ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[11]                                                                                                                                  ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[12]                                                                                                                                  ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[13]                                                                                                                                  ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[14]                                                                                                                                  ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[15]                                                                                                                                  ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[16]                                                                                                                                  ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[17]                                                                                                                                  ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[18]                                                                                                                                  ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[9]                                                                                                                                   ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_valid                                                                                                                                       ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|set_command[0]                                                                                                                                   ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|set_command[1]                                                                                                                                   ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|start_sendcom                                                                                                                                    ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.Idle                                                                                                                                  ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.end_set_address                                                                                                                       ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.end_set_configuration                                                                                                                 ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.end_set_idle                                                                                                                          ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.read_byte10                                                                                                                           ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.read_byte11                                                                                                                           ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.read_byte5                                                                                                                            ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.read_byte6                                                                                                                            ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.read_byte7                                                                                                                            ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.read_byte8                                                                                                                            ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.read_byte9                                                                                                                            ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.read_pktin2                                                                                                                           ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.read_pktin3                                                                                                                           ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.read_pktin4                                                                                                                           ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.send_ack                                                                                                                              ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.send_ack_end                                                                                                                          ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt3_end                                                                                                               ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.usb_manage2                                                                                                                           ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.usb_reset_1ms_start                                                                                                                   ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait1                                                                                                                                 ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_pktin1                                                                                                                           ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_pktin2                                                                                                                           ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_pktin3                                                                                                                           ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_pktin4                                                                                                                           ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte10                                                                                                                      ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte11                                                                                                                      ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte6                                                                                                                       ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte7                                                                                                                       ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte8                                                                                                                       ;
; 33.047 ; 33.263       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte9                                                                                                                       ;
; 33.048 ; 33.264       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter2[0]                                                                                                                                      ;
; 33.048 ; 33.264       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter2[1]                                                                                                                                      ;
; 33.048 ; 33.264       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter2[2]                                                                                                                                      ;
; 33.048 ; 33.264       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter2[3]                                                                                                                                      ;
; 33.048 ; 33.264       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_available                                                                                                                                   ;
; 33.048 ; 33.264       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_byte2[0]                                                                                                                                    ;
; 33.048 ; 33.264       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_byte2[1]                                                                                                                                    ;
; 33.048 ; 33.264       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_byte2[2]                                                                                                                                    ;
; 33.048 ; 33.264       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_byte2[3]                                                                                                                                    ;
; 33.048 ; 33.264       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_byte2[4]                                                                                                                                    ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: 'altera_reserved_tck'                                                                                                                                                                                                                                                      ;
+--------+--------------+----------------+------------------+---------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock               ; Clock Edge ; Target                                                                                                                                                                                                                ;
+--------+--------------+----------------+------------------+---------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 49.285 ; 49.515       ; 0.230          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ;
; 49.285 ; 49.515       ; 0.230          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                           ;
; 49.285 ; 49.515       ; 0.230          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ;
; 49.285 ; 49.515       ; 0.230          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                           ;
; 49.287 ; 49.517       ; 0.230          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ;
; 49.287 ; 49.517       ; 0.230          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ;
; 49.301 ; 49.517       ; 0.216          ; High Pulse Width ; altera_reserved_tck ; Fall       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                   ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                   ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]                                                   ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]                                                   ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]                                                   ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                                                          ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                                                          ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                                                          ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                                                          ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                                                          ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                                                          ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                                                          ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                                                          ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                                                          ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                                                          ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[0]                                                                                                                      ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[1]                                                                                                                      ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[2]                                                                                                                      ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[3]                                                                                                                      ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[0]                                                                                                                 ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[1]                                                                                                                 ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[2]                                                                                                                 ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[3]                                                                                                                 ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[4]                                                                                                                 ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                     ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                     ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                   ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                   ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]                                                   ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]                                                   ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]                                                   ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[2] ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[3] ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]                                              ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]                                              ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]                                              ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]                                              ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[2] ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[3] ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                                                                                                                                                 ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|design_hash_reg[0]                                                                                                                                      ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|design_hash_reg[1]                                                                                                                                      ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|design_hash_reg[2]                                                                                                                                      ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|design_hash_reg[3]                                                                                                                                      ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[0]                                                                                                                                    ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[1]                                                                                                                                    ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[2]                                                                                                                                    ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[3]                                                                                                                                    ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                                                         ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                                                         ;
+--------+--------------+----------------+------------------+---------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: 'FPGA_CLK'                                                                                                ;
+---------+--------------+----------------+------------------+----------+------------+----------------------------------------------------------------+
; Slack   ; Actual Width ; Required Width ; Type             ; Clock    ; Clock Edge ; Target                                                         ;
+---------+--------------+----------------+------------------+----------+------------+----------------------------------------------------------------+
; 99.418  ; 99.418       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]           ;
; 99.418  ; 99.418       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1]           ;
; 99.418  ; 99.418       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|observablevcoout ;
; 99.449  ; 99.449       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; FPGA_CLK~input|o                                               ;
; 99.460  ; 99.460       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|inclk[0]         ;
; 100.000 ; 100.000      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; FPGA_CLK~input|i                                               ;
; 100.000 ; 100.000      ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; FPGA_CLK~input|i                                               ;
; 100.539 ; 100.539      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|inclk[0]         ;
; 100.551 ; 100.551      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; FPGA_CLK~input|o                                               ;
; 100.580 ; 100.580      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]           ;
; 100.580 ; 100.580      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1]           ;
; 100.580 ; 100.580      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|observablevcoout ;
; 196.000 ; 200.000      ; 4.000          ; Port Rate        ; FPGA_CLK ; Rise       ; FPGA_CLK                                                       ;
+---------+--------------+----------------+------------------+----------+------------+----------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                                                                             ;
+---------------------+---------------------+-------+-------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+-------+-------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]         ; FPGA_CLK            ; 1.396 ; 1.947 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 1.382 ; 1.933 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 1.382 ; 1.933 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 1.382 ; 1.933 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 1.385 ; 1.936 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 1.394 ; 1.945 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 1.386 ; 1.937 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 1.385 ; 1.936 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 1.362 ; 1.911 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 1.383 ; 1.934 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 1.396 ; 1.947 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 1.392 ; 1.943 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 1.392 ; 1.943 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 1.392 ; 1.943 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 1.391 ; 1.942 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 1.391 ; 1.942 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 1.391 ; 1.942 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0             ; FPGA_CLK            ; 1.888 ; 2.381 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; altera_reserved_tdi ; altera_reserved_tck ; 1.515 ; 1.833 ; Rise       ; altera_reserved_tck                                                            ;
; altera_reserved_tms ; altera_reserved_tck ; 3.705 ; 3.982 ; Rise       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; 2.689 ; 3.491 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; 0.840 ; 1.570 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 2.628 ; 3.423 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 0.808 ; 1.563 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 2.786 ; 3.605 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 1.336 ; 2.135 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+-------+-------+------------+--------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]         ; FPGA_CLK            ; -0.913 ; -1.462 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; -0.932 ; -1.483 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; -0.932 ; -1.483 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; -0.932 ; -1.483 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; -0.934 ; -1.485 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; -0.944 ; -1.495 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; -0.936 ; -1.487 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; -0.934 ; -1.485 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; -0.913 ; -1.462 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; -0.933 ; -1.484 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; -0.946 ; -1.497 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; -0.941 ; -1.492 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; -0.941 ; -1.492 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; -0.941 ; -1.492 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; -0.941 ; -1.492 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; -0.941 ; -1.492 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; -0.941 ; -1.492 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0             ; FPGA_CLK            ; -1.388 ; -1.877 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; altera_reserved_tdi ; altera_reserved_tck ; 0.049  ; -0.338 ; Rise       ; altera_reserved_tck                                                            ;
; altera_reserved_tms ; altera_reserved_tck ; -0.768 ; -1.127 ; Rise       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; -2.278 ; -3.072 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; -0.397 ; -1.114 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; -2.220 ; -3.007 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; -0.350 ; -1.092 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; -2.250 ; -3.061 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; -0.761 ; -1.544 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                                                                     ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_A[*]          ; FPGA_CLK            ; 3.466  ; 3.843  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]         ; FPGA_CLK            ; 1.696  ; 1.601  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]         ; FPGA_CLK            ; 1.696  ; 1.601  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]         ; FPGA_CLK            ; 1.699  ; 1.604  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]         ; FPGA_CLK            ; 1.699  ; 1.604  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]         ; FPGA_CLK            ; 1.692  ; 1.597  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]         ; FPGA_CLK            ; 1.692  ; 1.597  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]         ; FPGA_CLK            ; 1.690  ; 1.595  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]         ; FPGA_CLK            ; 1.252  ; 1.226  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]         ; FPGA_CLK            ; 3.466  ; 3.843  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]         ; FPGA_CLK            ; 1.691  ; 1.596  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]        ; FPGA_CLK            ; 1.696  ; 1.601  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]        ; FPGA_CLK            ; 1.691  ; 1.596  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]         ; FPGA_CLK            ; 3.473  ; 3.850  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]        ; FPGA_CLK            ; 3.473  ; 3.850  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]        ; FPGA_CLK            ; 1.259  ; 1.233  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N         ; FPGA_CLK            ; 1.261  ; 1.235  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N          ; FPGA_CLK            ; 1.698  ; 1.603  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]         ; FPGA_CLK            ; 3.113  ; 3.588  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 1.942  ; 1.900  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 1.942  ; 1.900  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 1.942  ; 1.900  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 3.113  ; 3.588  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 3.103  ; 3.578  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 1.335  ; 1.396  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 1.795  ; 1.791  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 1.698  ; 1.603  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 1.941  ; 1.899  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 3.101  ; 3.576  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 1.933  ; 1.891  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 1.933  ; 1.891  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 1.933  ; 1.891  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 3.106  ; 3.581  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 1.933  ; 1.891  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 1.933  ; 1.891  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n        ; FPGA_CLK            ; 1.692  ; 1.597  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n        ; FPGA_CLK            ; 1.698  ; 1.603  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N         ; FPGA_CLK            ; 1.698  ; 1.603  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N          ; FPGA_CLK            ; 3.475  ; 3.852  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L             ; FPGA_CLK            ; 3.397  ; 3.890  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R             ; FPGA_CLK            ; 1.712  ; 1.739  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK              ; FPGA_CLK            ; 2.099  ; 2.190  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD              ; FPGA_CLK            ; 2.339  ; 2.479  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3             ; FPGA_CLK            ; 2.345  ; 2.244  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK           ; FPGA_CLK            ; 10.491 ;        ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK           ; FPGA_CLK            ;        ; 10.968 ; Fall       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]            ; FPGA_CLK            ; 3.029  ; 3.475  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]           ; FPGA_CLK            ; 1.254  ; 1.228  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]           ; FPGA_CLK            ; 3.029  ; 3.475  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]           ; FPGA_CLK            ; 1.252  ; 1.226  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]           ; FPGA_CLK            ; 1.255  ; 1.229  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]            ; FPGA_CLK            ; 3.031  ; 3.477  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]           ; FPGA_CLK            ; 1.254  ; 1.228  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]           ; FPGA_CLK            ; 1.254  ; 1.228  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]           ; FPGA_CLK            ; 1.254  ; 1.228  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]           ; FPGA_CLK            ; 3.031  ; 3.477  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; altera_reserved_tdo ; altera_reserved_tck ; 7.591  ; 8.306  ; Fall       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; 2.671  ; 2.791  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; 3.793  ; 3.937  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 5.038  ; 4.446  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 3.925  ; 3.779  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                                                                             ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_A[*]          ; FPGA_CLK            ; 0.867  ; 0.841  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]         ; FPGA_CLK            ; 1.293  ; 1.201  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]         ; FPGA_CLK            ; 1.293  ; 1.201  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]         ; FPGA_CLK            ; 1.296  ; 1.204  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]         ; FPGA_CLK            ; 1.296  ; 1.204  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]         ; FPGA_CLK            ; 1.289  ; 1.197  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]         ; FPGA_CLK            ; 1.289  ; 1.197  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]         ; FPGA_CLK            ; 1.287  ; 1.195  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]         ; FPGA_CLK            ; 0.867  ; 0.841  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]         ; FPGA_CLK            ; 3.063  ; 3.443  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]         ; FPGA_CLK            ; 1.288  ; 1.196  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]        ; FPGA_CLK            ; 1.293  ; 1.201  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]        ; FPGA_CLK            ; 1.288  ; 1.196  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]         ; FPGA_CLK            ; 0.874  ; 0.848  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]        ; FPGA_CLK            ; 3.070  ; 3.450  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]        ; FPGA_CLK            ; 0.874  ; 0.848  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N         ; FPGA_CLK            ; 0.876  ; 0.850  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N          ; FPGA_CLK            ; 1.295  ; 1.203  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]         ; FPGA_CLK            ; 0.950  ; 1.012  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 1.539  ; 1.501  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 1.539  ; 1.501  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 1.539  ; 1.501  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 2.727  ; 3.203  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 2.718  ; 3.194  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 0.950  ; 1.012  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 1.391  ; 1.391  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 1.295  ; 1.203  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 1.538  ; 1.500  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 2.716  ; 3.192  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 1.529  ; 1.491  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 1.529  ; 1.491  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 1.529  ; 1.491  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 2.721  ; 3.197  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 1.530  ; 1.492  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 1.530  ; 1.492  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n        ; FPGA_CLK            ; 1.289  ; 1.197  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n        ; FPGA_CLK            ; 1.295  ; 1.203  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N         ; FPGA_CLK            ; 1.295  ; 1.203  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N          ; FPGA_CLK            ; 3.072  ; 3.452  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L             ; FPGA_CLK            ; 2.952  ; 3.443  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R             ; FPGA_CLK            ; 1.263  ; 1.288  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK              ; FPGA_CLK            ; 1.635  ; 1.722  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD              ; FPGA_CLK            ; 1.866  ; 1.999  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3             ; FPGA_CLK            ; 1.870  ; 1.775  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK           ; FPGA_CLK            ; 10.074 ;        ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK           ; FPGA_CLK            ;        ; 10.550 ; Fall       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]            ; FPGA_CLK            ; 0.867  ; 0.841  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]           ; FPGA_CLK            ; 0.868  ; 0.842  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]           ; FPGA_CLK            ; 2.644  ; 3.090  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]           ; FPGA_CLK            ; 0.867  ; 0.841  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]           ; FPGA_CLK            ; 0.870  ; 0.844  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]            ; FPGA_CLK            ; 0.869  ; 0.843  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]           ; FPGA_CLK            ; 0.869  ; 0.843  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]           ; FPGA_CLK            ; 0.869  ; 0.843  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]           ; FPGA_CLK            ; 0.869  ; 0.843  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]           ; FPGA_CLK            ; 2.646  ; 3.092  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; altera_reserved_tdo ; altera_reserved_tck ; 6.372  ; 7.090  ; Fall       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; 2.367  ; 2.483  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; 3.438  ; 3.580  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 4.723  ; 4.135  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 3.569  ; 3.426  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                                                      ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 1.882 ; 1.881 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 2.110 ; 2.109 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 2.110 ; 2.109 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 2.110 ; 2.109 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 3.896 ; 4.343 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 4.234 ; 4.681 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 2.427 ; 2.460 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 2.266 ; 2.299 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 2.116 ; 2.061 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 2.067 ; 2.066 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 3.530 ; 3.977 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 1.882 ; 1.881 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 1.882 ; 1.881 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 1.882 ; 1.881 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 3.533 ; 3.980 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 1.903 ; 1.902 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 1.903 ; 1.902 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 2.114 ; 2.059 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 2.718 ; 2.717 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2       ; FPGA_CLK   ; 3.841 ; 3.874 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1        ; FPGA_CLK   ; 4.475 ; 4.922 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2        ; FPGA_CLK   ; 3.712 ; 3.745 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                                                              ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 1.443 ; 1.442 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 1.662 ; 1.661 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 1.662 ; 1.661 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 1.662 ; 1.661 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 3.442 ; 3.889 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 3.766 ; 4.213 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 1.961 ; 1.994 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 1.806 ; 1.839 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 1.651 ; 1.596 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 1.621 ; 1.620 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 3.090 ; 3.537 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 1.443 ; 1.442 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 1.443 ; 1.442 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 1.443 ; 1.442 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 3.094 ; 3.541 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 1.463 ; 1.462 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 1.463 ; 1.462 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 1.649 ; 1.594 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 2.417 ; 2.416 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2       ; FPGA_CLK   ; 3.489 ; 3.522 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1        ; FPGA_CLK   ; 4.168 ; 4.615 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2        ; FPGA_CLK   ; 3.365 ; 3.398 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                                                             ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 1.949     ; 1.950     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 2.215     ; 2.216     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 2.215     ; 2.216     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 2.215     ; 2.216     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 4.464     ; 4.017     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 4.850     ; 4.403     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 2.616     ; 2.583     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 2.443     ; 2.410     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 2.195     ; 2.250     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 2.155     ; 2.156     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 4.049     ; 3.602     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 1.949     ; 1.950     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 1.949     ; 1.950     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 1.949     ; 1.950     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 4.050     ; 3.603     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 1.971     ; 1.972     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 1.971     ; 1.972     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 2.174     ; 2.229     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 2.815     ; 2.816     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2       ; FPGA_CLK   ; 3.963     ; 3.930     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1        ; FPGA_CLK   ; 5.028     ; 4.581     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2        ; FPGA_CLK   ; 3.817     ; 3.784     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                                                     ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 1.507     ; 1.508     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 1.763     ; 1.764     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 1.763     ; 1.764     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 1.763     ; 1.764     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 4.005     ; 3.558     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 4.375     ; 3.928     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 2.143     ; 2.110     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 1.977     ; 1.944     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 1.725     ; 1.780     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 1.705     ; 1.706     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 3.606     ; 3.159     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 1.507     ; 1.508     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 1.507     ; 1.508     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 1.507     ; 1.508     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 3.607     ; 3.160     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 1.529     ; 1.530     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 1.529     ; 1.530     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 1.704     ; 1.759     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 2.509     ; 2.510     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2       ; FPGA_CLK   ; 3.607     ; 3.574     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1        ; FPGA_CLK   ; 4.717     ; 4.270     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2        ; FPGA_CLK   ; 3.467     ; 3.434     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+


---------------------------------------------
; Fast 1200mV 0C Model Metastability Report ;
---------------------------------------------
No synchronizer chains to report.


+-----------------------------------------------------------------------------------------------------------------------------------------------+
; Multicorner Timing Analysis Summary                                                                                                           ;
+---------------------------------------------------------------------------------+----------+-------+----------+---------+---------------------+
; Clock                                                                           ; Setup    ; Hold  ; Recovery ; Removal ; Minimum Pulse Width ;
+---------------------------------------------------------------------------------+----------+-------+----------+---------+---------------------+
; Worst-case Slack                                                                ; -3.960   ; 0.138 ; 5.876    ; -0.029  ; 4.090               ;
;  FPGA_CLK                                                                       ; N/A      ; N/A   ; N/A      ; N/A     ; 99.418              ;
;  \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.198   ; 0.188 ; 7.996    ; 1.161   ; 5.546               ;
;  \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; -3.960   ; 0.140 ; 5.876    ; 0.690   ; 17.161              ;
;  \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 4.034    ; 0.138 ; N/A      ; N/A     ; 4.090               ;
;  altera_reserved_tck                                                            ; 44.493   ; 0.187 ; 48.335   ; 0.704   ; 49.285              ;
;  mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 25.858   ; 0.179 ; 63.571   ; -0.029  ; 32.970              ;
;  mcc_pll3|altpll_component|auto_generated|pll1|clk[1]                           ; N/A      ; N/A   ; N/A      ; N/A     ; 17.424              ;
; Design-wide TNS                                                                 ; -368.175 ; 0.0   ; 0.0      ; -0.842  ; 0.0                 ;
;  FPGA_CLK                                                                       ; N/A      ; N/A   ; N/A      ; N/A     ; 0.000               ;
;  \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.300   ; 0.000 ; 0.000    ; 0.000   ; 0.000               ;
;  \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; -367.875 ; 0.000 ; 0.000    ; 0.000   ; 0.000               ;
;  \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000    ; 0.000 ; N/A      ; N/A     ; 0.000               ;
;  altera_reserved_tck                                                            ; 0.000    ; 0.000 ; 0.000    ; 0.000   ; 0.000               ;
;  mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 0.000    ; 0.000 ; 0.000    ; -0.842  ; 0.000               ;
;  mcc_pll3|altpll_component|auto_generated|pll1|clk[1]                           ; N/A      ; N/A   ; N/A      ; N/A     ; 0.000               ;
+---------------------------------------------------------------------------------+----------+-------+----------+---------+---------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                                                                             ;
+---------------------+---------------------+-------+-------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+-------+-------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]         ; FPGA_CLK            ; 2.679 ; 2.858 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 2.661 ; 2.840 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 2.661 ; 2.840 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 2.661 ; 2.840 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 2.664 ; 2.843 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 2.672 ; 2.851 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 2.665 ; 2.844 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 2.664 ; 2.843 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 2.611 ; 2.789 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 2.661 ; 2.840 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 2.679 ; 2.858 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 2.675 ; 2.854 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 2.675 ; 2.854 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 2.675 ; 2.854 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 2.673 ; 2.852 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 2.673 ; 2.852 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 2.673 ; 2.852 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0             ; FPGA_CLK            ; 3.536 ; 3.731 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; altera_reserved_tdi ; altera_reserved_tck ; 3.336 ; 3.611 ; Rise       ; altera_reserved_tck                                                            ;
; altera_reserved_tms ; altera_reserved_tck ; 8.538 ; 8.656 ; Rise       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; 5.179 ; 5.617 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; 1.489 ; 1.883 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 5.075 ; 5.502 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 1.387 ; 1.783 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 5.476 ; 5.876 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 2.734 ; 3.119 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+-------+-------+------------+--------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]         ; FPGA_CLK            ; -0.913 ; -1.462 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; -0.932 ; -1.483 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; -0.932 ; -1.483 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; -0.932 ; -1.483 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; -0.934 ; -1.485 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; -0.944 ; -1.495 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; -0.936 ; -1.487 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; -0.934 ; -1.485 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; -0.913 ; -1.462 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; -0.933 ; -1.484 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; -0.946 ; -1.497 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; -0.941 ; -1.492 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; -0.941 ; -1.492 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; -0.941 ; -1.492 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; -0.941 ; -1.492 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; -0.941 ; -1.492 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; -0.941 ; -1.492 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0             ; FPGA_CLK            ; -1.388 ; -1.877 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; altera_reserved_tdi ; altera_reserved_tck ; 0.049  ; -0.338 ; Rise       ; altera_reserved_tck                                                            ;
; altera_reserved_tms ; altera_reserved_tck ; -0.768 ; -1.127 ; Rise       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; -2.278 ; -3.072 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; -0.397 ; -0.695 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; -2.220 ; -3.007 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; -0.281 ; -0.555 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; -2.250 ; -3.061 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; -0.761 ; -1.544 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                                                                     ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_A[*]          ; FPGA_CLK            ; 5.734  ; 5.981  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]         ; FPGA_CLK            ; 3.130  ; 2.917  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]         ; FPGA_CLK            ; 3.130  ; 2.917  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]         ; FPGA_CLK            ; 3.133  ; 2.920  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]         ; FPGA_CLK            ; 3.133  ; 2.920  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]         ; FPGA_CLK            ; 3.120  ; 2.907  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]         ; FPGA_CLK            ; 3.120  ; 2.907  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]         ; FPGA_CLK            ; 3.118  ; 2.905  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]         ; FPGA_CLK            ; 2.297  ; 2.223  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]         ; FPGA_CLK            ; 5.734  ; 5.981  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]         ; FPGA_CLK            ; 3.119  ; 2.906  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]        ; FPGA_CLK            ; 3.130  ; 2.917  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]        ; FPGA_CLK            ; 3.119  ; 2.906  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]         ; FPGA_CLK            ; 5.747  ; 5.994  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]        ; FPGA_CLK            ; 5.747  ; 5.994  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]        ; FPGA_CLK            ; 2.310  ; 2.236  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N         ; FPGA_CLK            ; 2.311  ; 2.237  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N          ; FPGA_CLK            ; 3.131  ; 2.918  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]         ; FPGA_CLK            ; 5.070  ; 5.494  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 3.501  ; 3.356  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 3.501  ; 3.356  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 3.501  ; 3.356  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 5.070  ; 5.494  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 5.061  ; 5.485  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 2.456  ; 2.435  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 3.318  ; 3.164  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 3.132  ; 2.919  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 3.501  ; 3.356  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 5.054  ; 5.478  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 3.487  ; 3.342  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 3.487  ; 3.342  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 3.487  ; 3.342  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 5.060  ; 5.484  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 3.488  ; 3.343  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 3.488  ; 3.343  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n        ; FPGA_CLK            ; 3.120  ; 2.907  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n        ; FPGA_CLK            ; 3.132  ; 2.919  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N         ; FPGA_CLK            ; 3.131  ; 2.918  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N          ; FPGA_CLK            ; 5.749  ; 5.996  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L             ; FPGA_CLK            ; 5.739  ; 6.129  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R             ; FPGA_CLK            ; 3.317  ; 3.226  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK              ; FPGA_CLK            ; 4.071  ; 4.041  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD              ; FPGA_CLK            ; 4.510  ; 4.489  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3             ; FPGA_CLK            ; 4.318  ; 4.378  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK           ; FPGA_CLK            ; 12.242 ;        ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK           ; FPGA_CLK            ;        ; 12.593 ; Fall       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]            ; FPGA_CLK            ; 4.914  ; 5.300  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]           ; FPGA_CLK            ; 2.298  ; 2.224  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]           ; FPGA_CLK            ; 4.914  ; 5.300  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]           ; FPGA_CLK            ; 2.297  ; 2.223  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]           ; FPGA_CLK            ; 2.300  ; 2.226  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]            ; FPGA_CLK            ; 4.916  ; 5.302  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]           ; FPGA_CLK            ; 2.299  ; 2.225  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]           ; FPGA_CLK            ; 2.299  ; 2.225  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]           ; FPGA_CLK            ; 2.299  ; 2.225  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]           ; FPGA_CLK            ; 4.916  ; 5.302  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; altera_reserved_tdo ; altera_reserved_tck ; 14.080 ; 15.118 ; Fall       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; 5.081  ; 5.091  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; 7.463  ; 7.444  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 8.241  ; 7.807  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 7.423  ; 7.434  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                                                                             ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_A[*]          ; FPGA_CLK            ; 0.867  ; 0.841  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]         ; FPGA_CLK            ; 1.293  ; 1.201  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]         ; FPGA_CLK            ; 1.293  ; 1.201  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]         ; FPGA_CLK            ; 1.296  ; 1.204  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]         ; FPGA_CLK            ; 1.296  ; 1.204  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]         ; FPGA_CLK            ; 1.289  ; 1.197  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]         ; FPGA_CLK            ; 1.289  ; 1.197  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]         ; FPGA_CLK            ; 1.287  ; 1.195  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]         ; FPGA_CLK            ; 0.867  ; 0.841  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]         ; FPGA_CLK            ; 3.063  ; 3.443  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]         ; FPGA_CLK            ; 1.288  ; 1.196  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]        ; FPGA_CLK            ; 1.293  ; 1.201  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]        ; FPGA_CLK            ; 1.288  ; 1.196  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]         ; FPGA_CLK            ; 0.874  ; 0.848  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]        ; FPGA_CLK            ; 3.070  ; 3.450  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]        ; FPGA_CLK            ; 0.874  ; 0.848  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N         ; FPGA_CLK            ; 0.876  ; 0.850  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N          ; FPGA_CLK            ; 1.295  ; 1.203  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]         ; FPGA_CLK            ; 0.950  ; 1.012  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 1.539  ; 1.501  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 1.539  ; 1.501  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 1.539  ; 1.501  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 2.727  ; 3.203  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 2.718  ; 3.194  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 0.950  ; 1.012  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 1.391  ; 1.391  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 1.295  ; 1.203  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 1.538  ; 1.500  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 2.716  ; 3.192  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 1.529  ; 1.491  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 1.529  ; 1.491  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 1.529  ; 1.491  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 2.721  ; 3.197  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 1.530  ; 1.492  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 1.530  ; 1.492  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n        ; FPGA_CLK            ; 1.289  ; 1.197  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n        ; FPGA_CLK            ; 1.295  ; 1.203  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N         ; FPGA_CLK            ; 1.295  ; 1.203  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N          ; FPGA_CLK            ; 3.072  ; 3.452  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L             ; FPGA_CLK            ; 2.952  ; 3.443  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R             ; FPGA_CLK            ; 1.263  ; 1.288  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK              ; FPGA_CLK            ; 1.635  ; 1.722  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD              ; FPGA_CLK            ; 1.866  ; 1.999  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3             ; FPGA_CLK            ; 1.870  ; 1.775  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK           ; FPGA_CLK            ; 10.074 ;        ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK           ; FPGA_CLK            ;        ; 10.550 ; Fall       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]            ; FPGA_CLK            ; 0.867  ; 0.841  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]           ; FPGA_CLK            ; 0.868  ; 0.842  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]           ; FPGA_CLK            ; 2.644  ; 3.090  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]           ; FPGA_CLK            ; 0.867  ; 0.841  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]           ; FPGA_CLK            ; 0.870  ; 0.844  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]            ; FPGA_CLK            ; 0.869  ; 0.843  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]           ; FPGA_CLK            ; 0.869  ; 0.843  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]           ; FPGA_CLK            ; 0.869  ; 0.843  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]           ; FPGA_CLK            ; 0.869  ; 0.843  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]           ; FPGA_CLK            ; 2.646  ; 3.092  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; altera_reserved_tdo ; altera_reserved_tck ; 6.372  ; 7.090  ; Fall       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; 2.367  ; 2.483  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; 3.438  ; 3.580  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 4.723  ; 4.135  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 3.569  ; 3.426  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Board Trace Model Assignments                                                                                                                                                                                                                                                                                                                                                                                          ;
+---------------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
; Pin                 ; I/O Standard ; Near Tline Length ; Near Tline L per Length ; Near Tline C per Length ; Near Series R ; Near Differential R ; Near Pull-up R ; Near Pull-down R ; Near C ; Far Tline Length ; Far Tline L per Length ; Far Tline C per Length ; Far Series R ; Far Pull-up R ; Far Pull-down R ; Far C ; Termination Voltage ; Far Differential R ; EBD File Name ; EBD Signal Name ; EBD Far-end ;
+---------------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
; VGA_B[0]            ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_B[1]            ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_B[2]            ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_B[3]            ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_G[0]            ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_G[1]            ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_G[2]            ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_G[3]            ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; AUDIO_L             ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; AUDIO_R             ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_BA[0]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_BA[1]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_CS_N          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_RAS_N         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_CAS_N         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_WE_N          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQMH_n        ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQML_n        ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_CLK           ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_CKE           ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[0]          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[1]          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[2]          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[3]          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[4]          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[5]          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[6]          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[7]          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[8]          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[9]          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[10]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[11]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[12]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SD_CLK              ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SD_CMD              ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SD_DAT3             ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; CFG_CLK             ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; CFG_CS_n            ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; CFG_DOUT            ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; dplus1              ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; dminus1             ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; dplus2              ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; dminus2             ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[0]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[1]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[2]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[3]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[4]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[5]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[6]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[7]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[8]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[9]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[10]        ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[11]        ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[12]        ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[13]        ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[14]        ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[15]        ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; altera_reserved_tdo ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
+---------------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+


+------------------------------------------------------------------------+
; Input Transition Times                                                 ;
+---------------------+--------------+-----------------+-----------------+
; Pin                 ; I/O Standard ; 10-90 Rise Time ; 90-10 Fall Time ;
+---------------------+--------------+-----------------+-----------------+
; CFG_DIN             ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; dplus1              ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; dminus1             ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; dplus2              ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; dminus2             ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[0]         ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[1]         ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[2]         ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[3]         ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[4]         ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[5]         ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[6]         ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[7]         ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[8]         ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[9]         ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[10]        ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[11]        ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[12]        ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[13]        ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[14]        ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[15]        ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; FPGA_CLK            ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SD_DAT0             ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; altera_reserved_tms ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; altera_reserved_tck ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; altera_reserved_tdi ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
+---------------------+--------------+-----------------+-----------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Signal Integrity Metrics (Slow 1200mv 0c Model)                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  ;
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; Pin                 ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; VGA_B[0]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; VGA_B[1]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.09 V              ; -0.00419 V          ; 0.108 V                              ; 0.251 V                              ; 5.73e-09 s                  ; 5.85e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.69e-08 V                  ; 3.09 V             ; -0.00419 V         ; 0.108 V                             ; 0.251 V                             ; 5.73e-09 s                 ; 5.85e-09 s                 ; Yes                       ; Yes                       ;
; VGA_B[2]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; VGA_B[3]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; VGA_G[0]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; VGA_G[1]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; VGA_G[2]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; VGA_G[3]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.09 V              ; -0.00419 V          ; 0.108 V                              ; 0.251 V                              ; 5.73e-09 s                  ; 5.85e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.69e-08 V                  ; 3.09 V             ; -0.00419 V         ; 0.108 V                             ; 0.251 V                             ; 5.73e-09 s                 ; 5.85e-09 s                 ; Yes                       ; Yes                       ;
; AUDIO_L             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.09 V              ; -0.00419 V          ; 0.108 V                              ; 0.251 V                              ; 5.73e-09 s                  ; 5.85e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.69e-08 V                  ; 3.09 V             ; -0.00419 V         ; 0.108 V                             ; 0.251 V                             ; 5.73e-09 s                 ; 5.85e-09 s                 ; Yes                       ; Yes                       ;
; AUDIO_R             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_BA[0]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.09 V              ; -0.00419 V          ; 0.108 V                              ; 0.251 V                              ; 5.73e-09 s                  ; 5.85e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.69e-08 V                  ; 3.09 V             ; -0.00419 V         ; 0.108 V                             ; 0.251 V                             ; 5.73e-09 s                 ; 5.85e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_BA[1]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_CS_N          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_RAS_N         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_CAS_N         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_WE_N          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.09 V              ; -0.00419 V          ; 0.108 V                              ; 0.251 V                              ; 5.73e-09 s                  ; 5.85e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.69e-08 V                  ; 3.09 V             ; -0.00419 V         ; 0.108 V                             ; 0.251 V                             ; 5.73e-09 s                 ; 5.85e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQMH_n        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_DQML_n        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_CLK           ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.09 V              ; -0.00419 V          ; 0.108 V                              ; 0.251 V                              ; 5.73e-09 s                  ; 5.85e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.69e-08 V                  ; 3.09 V             ; -0.00419 V         ; 0.108 V                             ; 0.251 V                             ; 5.73e-09 s                 ; 5.85e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_CKE           ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[0]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[1]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[2]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[3]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[4]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[5]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[6]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[7]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[8]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.09 V              ; -0.00419 V          ; 0.108 V                              ; 0.251 V                              ; 5.73e-09 s                  ; 5.85e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.69e-08 V                  ; 3.09 V             ; -0.00419 V         ; 0.108 V                             ; 0.251 V                             ; 5.73e-09 s                 ; 5.85e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[9]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[10]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[11]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[12]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SD_CLK              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SD_CMD              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SD_DAT3             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; CFG_CLK             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 6.15e-09 V                   ; 3.18 V              ; -0.0303 V           ; 0.317 V                              ; 0.07 V                               ; 3.25e-10 s                  ; 3.88e-10 s                  ; No                         ; Yes                        ; 3.08 V                      ; 6.15e-09 V                  ; 3.18 V             ; -0.0303 V          ; 0.317 V                             ; 0.07 V                              ; 3.25e-10 s                 ; 3.88e-10 s                 ; No                        ; Yes                       ;
; CFG_CS_n            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.76e-08 V                   ; 3.09 V              ; -0.0166 V           ; 0.084 V                              ; 0.289 V                              ; 2.05e-09 s                  ; 1.96e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.76e-08 V                  ; 3.09 V             ; -0.0166 V          ; 0.084 V                             ; 0.289 V                             ; 2.05e-09 s                 ; 1.96e-09 s                 ; Yes                       ; Yes                       ;
; CFG_DOUT            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.76e-08 V                   ; 3.09 V              ; -0.0166 V           ; 0.084 V                              ; 0.289 V                              ; 2.05e-09 s                  ; 1.96e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.76e-08 V                  ; 3.09 V             ; -0.0166 V          ; 0.084 V                             ; 0.289 V                             ; 2.05e-09 s                 ; 1.96e-09 s                 ; Yes                       ; Yes                       ;
; dplus1              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.09 V              ; -0.00398 V          ; 0.168 V                              ; 0.263 V                              ; 6.02e-09 s                  ; 6.14e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.09 V             ; -0.00398 V         ; 0.168 V                             ; 0.263 V                             ; 6.02e-09 s                 ; 6.14e-09 s                 ; Yes                       ; Yes                       ;
; dminus1             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; dplus2              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0307 V           ; 0.185 V                              ; 0.216 V                              ; 1.07e-09 s                  ; 1.08e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0307 V          ; 0.185 V                             ; 0.216 V                             ; 1.07e-09 s                 ; 1.08e-09 s                 ; Yes                       ; Yes                       ;
; dminus2             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0307 V           ; 0.185 V                              ; 0.216 V                              ; 1.07e-09 s                  ; 1.08e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0307 V          ; 0.185 V                             ; 0.216 V                             ; 1.07e-09 s                 ; 1.08e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[0]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[1]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[2]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[3]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.09 V              ; -0.00398 V          ; 0.168 V                              ; 0.263 V                              ; 6.02e-09 s                  ; 6.14e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.09 V             ; -0.00398 V         ; 0.168 V                             ; 0.263 V                             ; 6.02e-09 s                 ; 6.14e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[4]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.09 V              ; -0.00398 V          ; 0.168 V                              ; 0.263 V                              ; 6.02e-09 s                  ; 6.14e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.09 V             ; -0.00398 V         ; 0.168 V                             ; 0.263 V                             ; 6.02e-09 s                 ; 6.14e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[5]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0307 V           ; 0.185 V                              ; 0.216 V                              ; 1.07e-09 s                  ; 1.08e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0307 V          ; 0.185 V                             ; 0.216 V                             ; 1.07e-09 s                 ; 1.08e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[6]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0307 V           ; 0.185 V                              ; 0.216 V                              ; 1.07e-09 s                  ; 1.08e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0307 V          ; 0.185 V                             ; 0.216 V                             ; 1.07e-09 s                 ; 1.08e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[7]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_DQ[8]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[9]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.09 V              ; -0.00398 V          ; 0.168 V                              ; 0.263 V                              ; 6.02e-09 s                  ; 6.14e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.09 V             ; -0.00398 V         ; 0.168 V                             ; 0.263 V                             ; 6.02e-09 s                 ; 6.14e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[10]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[11]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[12]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[13]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.09 V              ; -0.00398 V          ; 0.168 V                              ; 0.263 V                              ; 6.02e-09 s                  ; 6.14e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.09 V             ; -0.00398 V         ; 0.168 V                             ; 0.263 V                             ; 6.02e-09 s                 ; 6.14e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[14]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[15]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; altera_reserved_tdo ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 5.09e-08 V                   ; 3.11 V              ; 5.09e-08 V          ; 0.193 V                              ; 0.27 V                               ; 1.07e-09 s                  ; 2.77e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 5.09e-08 V                  ; 3.11 V             ; 5.09e-08 V         ; 0.193 V                             ; 0.27 V                              ; 1.07e-09 s                 ; 2.77e-09 s                 ; Yes                       ; Yes                       ;
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Signal Integrity Metrics (Slow 1200mv 85c Model)                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                 ;
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; Pin                 ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; VGA_B[0]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; VGA_B[1]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.00169 V          ; 0.058 V                              ; 0.159 V                              ; 6.95e-09 s                  ; 7.33e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.00169 V         ; 0.058 V                             ; 0.159 V                             ; 6.95e-09 s                 ; 7.33e-09 s                 ; Yes                       ; Yes                       ;
; VGA_B[2]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; VGA_B[3]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; VGA_G[0]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; VGA_G[1]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; VGA_G[2]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; VGA_G[3]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.00169 V          ; 0.058 V                              ; 0.159 V                              ; 6.95e-09 s                  ; 7.33e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.00169 V         ; 0.058 V                             ; 0.159 V                             ; 6.95e-09 s                 ; 7.33e-09 s                 ; Yes                       ; Yes                       ;
; AUDIO_L             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.00169 V          ; 0.058 V                              ; 0.159 V                              ; 6.95e-09 s                  ; 7.33e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.00169 V         ; 0.058 V                             ; 0.159 V                             ; 6.95e-09 s                 ; 7.33e-09 s                 ; Yes                       ; Yes                       ;
; AUDIO_R             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_BA[0]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.00169 V          ; 0.058 V                              ; 0.159 V                              ; 6.95e-09 s                  ; 7.33e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.00169 V         ; 0.058 V                             ; 0.159 V                             ; 6.95e-09 s                 ; 7.33e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_BA[1]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_CS_N          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_RAS_N         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_CAS_N         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_WE_N          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.00169 V          ; 0.058 V                              ; 0.159 V                              ; 6.95e-09 s                  ; 7.33e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.00169 V         ; 0.058 V                             ; 0.159 V                             ; 6.95e-09 s                 ; 7.33e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQMH_n        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQML_n        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_CLK           ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.00169 V          ; 0.058 V                              ; 0.159 V                              ; 6.95e-09 s                  ; 7.33e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.00169 V         ; 0.058 V                             ; 0.159 V                             ; 6.95e-09 s                 ; 7.33e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_CKE           ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[0]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[1]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[2]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[3]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[4]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[5]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[6]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[7]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[8]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.00169 V          ; 0.058 V                              ; 0.159 V                              ; 6.95e-09 s                  ; 7.33e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.00169 V         ; 0.058 V                             ; 0.159 V                             ; 6.95e-09 s                 ; 7.33e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[9]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[10]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[11]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[12]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SD_CLK              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SD_CMD              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SD_DAT3             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; CFG_CLK             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 6.52e-07 V                   ; 3.14 V              ; -0.0428 V           ; 0.161 V                              ; 0.071 V                              ; 4.71e-10 s                  ; 4.5e-10 s                   ; Yes                        ; Yes                        ; 3.08 V                      ; 6.52e-07 V                  ; 3.14 V             ; -0.0428 V          ; 0.161 V                             ; 0.071 V                             ; 4.71e-10 s                 ; 4.5e-10 s                  ; Yes                       ; Yes                       ;
; CFG_CS_n            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.13e-06 V                   ; 3.08 V              ; -0.00721 V          ; 0.043 V                              ; 0.226 V                              ; 2.47e-09 s                  ; 2.5e-09 s                   ; Yes                        ; Yes                        ; 3.08 V                      ; 3.13e-06 V                  ; 3.08 V             ; -0.00721 V         ; 0.043 V                             ; 0.226 V                             ; 2.47e-09 s                 ; 2.5e-09 s                  ; Yes                       ; Yes                       ;
; CFG_DOUT            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.13e-06 V                   ; 3.08 V              ; -0.00721 V          ; 0.043 V                              ; 0.226 V                              ; 2.47e-09 s                  ; 2.5e-09 s                   ; Yes                        ; Yes                        ; 3.08 V                      ; 3.13e-06 V                  ; 3.08 V             ; -0.00721 V         ; 0.043 V                             ; 0.226 V                             ; 2.47e-09 s                 ; 2.5e-09 s                  ; Yes                       ; Yes                       ;
; dplus1              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.00144 V          ; 0.08 V                               ; 0.174 V                              ; 7.33e-09 s                  ; 7.73e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.00144 V         ; 0.08 V                              ; 0.174 V                             ; 7.33e-09 s                 ; 7.73e-09 s                 ; Yes                       ; Yes                       ;
; dminus1             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; dplus2              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.0139 V           ; 0.07 V                               ; 0.155 V                              ; 1.28e-09 s                  ; 1.32e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.0139 V          ; 0.07 V                              ; 0.155 V                             ; 1.28e-09 s                 ; 1.32e-09 s                 ; Yes                       ; Yes                       ;
; dminus2             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.0139 V           ; 0.07 V                               ; 0.155 V                              ; 1.28e-09 s                  ; 1.32e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.0139 V          ; 0.07 V                              ; 0.155 V                             ; 1.28e-09 s                 ; 1.32e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[0]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[1]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[2]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[3]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.00144 V          ; 0.08 V                               ; 0.174 V                              ; 7.33e-09 s                  ; 7.73e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.00144 V         ; 0.08 V                              ; 0.174 V                             ; 7.33e-09 s                 ; 7.73e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[4]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.00144 V          ; 0.08 V                               ; 0.174 V                              ; 7.33e-09 s                  ; 7.73e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.00144 V         ; 0.08 V                              ; 0.174 V                             ; 7.33e-09 s                 ; 7.73e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[5]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.0139 V           ; 0.07 V                               ; 0.155 V                              ; 1.28e-09 s                  ; 1.32e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.0139 V          ; 0.07 V                              ; 0.155 V                             ; 1.28e-09 s                 ; 1.32e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[6]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.0139 V           ; 0.07 V                               ; 0.155 V                              ; 1.28e-09 s                  ; 1.32e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.0139 V          ; 0.07 V                              ; 0.155 V                             ; 1.28e-09 s                 ; 1.32e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[7]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[8]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[9]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.00144 V          ; 0.08 V                               ; 0.174 V                              ; 7.33e-09 s                  ; 7.73e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.00144 V         ; 0.08 V                              ; 0.174 V                             ; 7.33e-09 s                 ; 7.73e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[10]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[11]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[12]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[13]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.00144 V          ; 0.08 V                               ; 0.174 V                              ; 7.33e-09 s                  ; 7.73e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.00144 V         ; 0.08 V                              ; 0.174 V                             ; 7.33e-09 s                 ; 7.73e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[14]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[15]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; altera_reserved_tdo ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 5.8e-06 V                    ; 3.09 V              ; 5.8e-06 V           ; 0.119 V                              ; 0.138 V                              ; 1.28e-09 s                  ; 3.52e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 5.8e-06 V                   ; 3.09 V             ; 5.8e-06 V          ; 0.119 V                             ; 0.138 V                             ; 1.28e-09 s                 ; 3.52e-09 s                 ; Yes                       ; Yes                       ;
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Signal Integrity Metrics (Fast 1200mv 0c Model)                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  ;
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; Pin                 ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; VGA_B[0]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; VGA_B[1]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.47 V              ; -0.00753 V          ; 0.323 V                              ; 0.336 V                              ; 4.77e-09 s                  ; 5.18e-09 s                  ; Yes                        ; No                         ; 3.46 V                      ; 3.12e-07 V                  ; 3.47 V             ; -0.00753 V         ; 0.323 V                             ; 0.336 V                             ; 4.77e-09 s                 ; 5.18e-09 s                 ; Yes                       ; No                        ;
; VGA_B[2]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; VGA_B[3]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; VGA_G[0]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; VGA_G[1]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; VGA_G[2]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; VGA_G[3]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.47 V              ; -0.00753 V          ; 0.323 V                              ; 0.336 V                              ; 4.77e-09 s                  ; 5.18e-09 s                  ; Yes                        ; No                         ; 3.46 V                      ; 3.12e-07 V                  ; 3.47 V             ; -0.00753 V         ; 0.323 V                             ; 0.336 V                             ; 4.77e-09 s                 ; 5.18e-09 s                 ; Yes                       ; No                        ;
; AUDIO_L             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.47 V              ; -0.00753 V          ; 0.323 V                              ; 0.336 V                              ; 4.77e-09 s                  ; 5.18e-09 s                  ; Yes                        ; No                         ; 3.46 V                      ; 3.12e-07 V                  ; 3.47 V             ; -0.00753 V         ; 0.323 V                             ; 0.336 V                             ; 4.77e-09 s                 ; 5.18e-09 s                 ; Yes                       ; No                        ;
; AUDIO_R             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_BA[0]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.47 V              ; -0.00753 V          ; 0.323 V                              ; 0.336 V                              ; 4.77e-09 s                  ; 5.18e-09 s                  ; Yes                        ; No                         ; 3.46 V                      ; 3.12e-07 V                  ; 3.47 V             ; -0.00753 V         ; 0.323 V                             ; 0.336 V                             ; 4.77e-09 s                 ; 5.18e-09 s                 ; Yes                       ; No                        ;
; SDRAM_BA[1]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_CS_N          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_RAS_N         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_CAS_N         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_WE_N          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.47 V              ; -0.00753 V          ; 0.323 V                              ; 0.336 V                              ; 4.77e-09 s                  ; 5.18e-09 s                  ; Yes                        ; No                         ; 3.46 V                      ; 3.12e-07 V                  ; 3.47 V             ; -0.00753 V         ; 0.323 V                             ; 0.336 V                             ; 4.77e-09 s                 ; 5.18e-09 s                 ; Yes                       ; No                        ;
; SDRAM_DQMH_n        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_DQML_n        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_CLK           ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.47 V              ; -0.00753 V          ; 0.323 V                              ; 0.336 V                              ; 4.77e-09 s                  ; 5.18e-09 s                  ; Yes                        ; No                         ; 3.46 V                      ; 3.12e-07 V                  ; 3.47 V             ; -0.00753 V         ; 0.323 V                             ; 0.336 V                             ; 4.77e-09 s                 ; 5.18e-09 s                 ; Yes                       ; No                        ;
; SDRAM_CKE           ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[0]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[1]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[2]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[3]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[4]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[5]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[6]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[7]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[8]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.47 V              ; -0.00753 V          ; 0.323 V                              ; 0.336 V                              ; 4.77e-09 s                  ; 5.18e-09 s                  ; Yes                        ; No                         ; 3.46 V                      ; 3.12e-07 V                  ; 3.47 V             ; -0.00753 V         ; 0.323 V                             ; 0.336 V                             ; 4.77e-09 s                 ; 5.18e-09 s                 ; Yes                       ; No                        ;
; SDRAM_A[9]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[10]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[11]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[12]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SD_CLK              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SD_CMD              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SD_DAT3             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; CFG_CLK             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 6.59e-08 V                   ; 3.58 V              ; -0.0703 V           ; 0.234 V                              ; 0.091 V                              ; 2.93e-10 s                  ; 3.09e-10 s                  ; Yes                        ; Yes                        ; 3.46 V                      ; 6.59e-08 V                  ; 3.58 V             ; -0.0703 V          ; 0.234 V                             ; 0.091 V                             ; 2.93e-10 s                 ; 3.09e-10 s                 ; Yes                       ; Yes                       ;
; CFG_CS_n            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.08e-07 V                   ; 3.48 V              ; -0.026 V            ; 0.261 V                              ; 0.327 V                              ; 1.74e-09 s                  ; 1.77e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 3.08e-07 V                  ; 3.48 V             ; -0.026 V           ; 0.261 V                             ; 0.327 V                             ; 1.74e-09 s                 ; 1.77e-09 s                 ; No                        ; No                        ;
; CFG_DOUT            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.08e-07 V                   ; 3.48 V              ; -0.026 V            ; 0.261 V                              ; 0.327 V                              ; 1.74e-09 s                  ; 1.77e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 3.08e-07 V                  ; 3.48 V             ; -0.026 V           ; 0.261 V                             ; 0.327 V                             ; 1.74e-09 s                 ; 1.77e-09 s                 ; No                        ; No                        ;
; dplus1              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.47 V              ; -0.00704 V          ; 0.325 V                              ; 0.344 V                              ; 5.02e-09 s                  ; 5.44e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.47 V             ; -0.00704 V         ; 0.325 V                             ; 0.344 V                             ; 5.02e-09 s                 ; 5.44e-09 s                 ; No                        ; No                        ;
; dminus1             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; dplus2              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.51 V              ; -0.0513 V           ; 0.246 V                              ; 0.327 V                              ; 8.76e-10 s                  ; 8.99e-10 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.51 V             ; -0.0513 V          ; 0.246 V                             ; 0.327 V                             ; 8.76e-10 s                 ; 8.99e-10 s                 ; No                        ; No                        ;
; dminus2             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.51 V              ; -0.0513 V           ; 0.246 V                              ; 0.327 V                              ; 8.76e-10 s                  ; 8.99e-10 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.51 V             ; -0.0513 V          ; 0.246 V                             ; 0.327 V                             ; 8.76e-10 s                 ; 8.99e-10 s                 ; No                        ; No                        ;
; SDRAM_DQ[0]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[1]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[2]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[3]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.47 V              ; -0.00704 V          ; 0.325 V                              ; 0.344 V                              ; 5.02e-09 s                  ; 5.44e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.47 V             ; -0.00704 V         ; 0.325 V                             ; 0.344 V                             ; 5.02e-09 s                 ; 5.44e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[4]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.47 V              ; -0.00704 V          ; 0.325 V                              ; 0.344 V                              ; 5.02e-09 s                  ; 5.44e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.47 V             ; -0.00704 V         ; 0.325 V                             ; 0.344 V                             ; 5.02e-09 s                 ; 5.44e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[5]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.51 V              ; -0.0513 V           ; 0.246 V                              ; 0.327 V                              ; 8.76e-10 s                  ; 8.99e-10 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.51 V             ; -0.0513 V          ; 0.246 V                             ; 0.327 V                             ; 8.76e-10 s                 ; 8.99e-10 s                 ; No                        ; No                        ;
; SDRAM_DQ[6]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.51 V              ; -0.0513 V           ; 0.246 V                              ; 0.327 V                              ; 8.76e-10 s                  ; 8.99e-10 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.51 V             ; -0.0513 V          ; 0.246 V                             ; 0.327 V                             ; 8.76e-10 s                 ; 8.99e-10 s                 ; No                        ; No                        ;
; SDRAM_DQ[7]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_DQ[8]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[9]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.47 V              ; -0.00704 V          ; 0.325 V                              ; 0.344 V                              ; 5.02e-09 s                  ; 5.44e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.47 V             ; -0.00704 V         ; 0.325 V                             ; 0.344 V                             ; 5.02e-09 s                 ; 5.44e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[10]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[11]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[12]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[13]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.47 V              ; -0.00704 V          ; 0.325 V                              ; 0.344 V                              ; 5.02e-09 s                  ; 5.44e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.47 V             ; -0.00704 V         ; 0.325 V                             ; 0.344 V                             ; 5.02e-09 s                 ; 5.44e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[14]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[15]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; altera_reserved_tdo ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 5.7e-07 V                    ; 3.51 V              ; -0.00915 V          ; 0.24 V                               ; 0.283 V                              ; 8.77e-10 s                  ; 2.48e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 5.7e-07 V                   ; 3.51 V             ; -0.00915 V         ; 0.24 V                              ; 0.283 V                             ; 8.77e-10 s                 ; 2.48e-09 s                 ; No                        ; No                        ;
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Setup Transfers                                                                                                                                                                                             ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
; From Clock                                                                     ; To Clock                                                                       ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 1892     ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 122564   ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 6516     ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 22398283 ; 0        ; 0        ; 0        ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 563      ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 117      ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 224      ; 0        ; 0        ; 0        ;
; altera_reserved_tck                                                            ; altera_reserved_tck                                                            ; 1907     ; 0        ; 35       ; 0        ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 3358     ; 140      ; 1681     ; 10372    ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Hold Transfers                                                                                                                                                                                              ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
; From Clock                                                                     ; To Clock                                                                       ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 1892     ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 122564   ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 6516     ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 22398283 ; 0        ; 0        ; 0        ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 563      ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 117      ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 224      ; 0        ; 0        ; 0        ;
; altera_reserved_tck                                                            ; altera_reserved_tck                                                            ; 1907     ; 0        ; 35       ; 0        ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 3358     ; 140      ; 1681     ; 10372    ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Recovery Transfers                                                                                                                                                                                          ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
; From Clock                                                                     ; To Clock                                                                       ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 146      ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 508      ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 1748     ; 0        ; 0        ; 0        ;
; altera_reserved_tck                                                            ; altera_reserved_tck                                                            ; 88       ; 0        ; 1        ; 0        ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 62       ; 0        ; 0        ; 0        ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Removal Transfers                                                                                                                                                                                           ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
; From Clock                                                                     ; To Clock                                                                       ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 146      ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 508      ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 1748     ; 0        ; 0        ; 0        ;
; altera_reserved_tck                                                            ; altera_reserved_tck                                                            ; 88       ; 0        ; 1        ; 0        ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 62       ; 0        ; 0        ; 0        ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


---------------
; Report TCCS ;
---------------
No dedicated SERDES Transmitter circuitry present in device or used in design


---------------
; Report RSKM ;
---------------
No dedicated SERDES Receiver circuitry present in device or used in design


+------------------------------------------------+
; Unconstrained Paths                            ;
+---------------------------------+-------+------+
; Property                        ; Setup ; Hold ;
+---------------------------------+-------+------+
; Illegal Clocks                  ; 0     ; 0    ;
; Unconstrained Clocks            ; 3     ; 3    ;
; Unconstrained Input Ports       ; 23    ; 23   ;
; Unconstrained Input Port Paths  ; 88    ; 88   ;
; Unconstrained Output Ports      ; 55    ; 55   ;
; Unconstrained Output Port Paths ; 76    ; 76   ;
+---------------------------------+-------+------+


+------------------------------------+
; TimeQuest Timing Analyzer Messages ;
+------------------------------------+
Info: *******************************************************************
Info: Running Quartus II 32-bit TimeQuest Timing Analyzer
    Info: Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
    Info: Processing started: Sat Nov  8 23:27:32 2014
Info: Command: quartus_sta atari800core -c atari800core
Info: qsta_default_script.tcl version: #1
Info (11104): Parallel Compilation has detected 4 hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use 2 of the 2 physical processors detected instead.
Info (21077): Low junction temperature is 0 degrees C
Info (21077): High junction temperature is 85 degrees C
Warning (335093): TimeQuest Timing Analyzer is analyzing 6 combinational loops as latches.
Info (332164): Evaluating HDL-embedded SDC commands
    Info (332165): Entity sld_jtag_hub
        Info (332166): create_clock -name altera_reserved_tck [get_ports {altera_reserved_tck}] -period 10MHz   
        Info (332166): set_clock_groups -asynchronous -group {altera_reserved_tck}
Info (332104): Reading SDC File: 'atari800core.sdc'
Info (332110): Deriving PLL clocks
    Info (332110): create_generated_clock -source {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]} -multiply_by 3 -duty_cycle 50.00 -name {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]} {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]}
    Info (332110): create_generated_clock -source {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]} -duty_cycle 50.00 -name {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]} {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]}
    Info (332110): create_generated_clock -source {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]} -multiply_by 3 -phase 236.25 -duty_cycle 50.00 -name {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]} {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]}
    Info (332110): create_generated_clock -source {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]} -multiply_by 4 -duty_cycle 50.00 -name {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]} {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]}
    Info (332110): create_generated_clock -source {mcc_pll3|altpll_component|auto_generated|pll1|inclk[0]} -multiply_by 3 -duty_cycle 50.00 -name {mcc_pll3|altpll_component|auto_generated|pll1|clk[0]} {mcc_pll3|altpll_component|auto_generated|pll1|clk[0]}
    Info (332110): create_generated_clock -source {mcc_pll3|altpll_component|auto_generated|pll1|inclk[0]} -divide_by 11 -multiply_by 63 -duty_cycle 50.00 -name {mcc_pll3|altpll_component|auto_generated|pll1|clk[1]} {mcc_pll3|altpll_component|auto_generated|pll1|clk[1]}
Info (332151): Clock uncertainty is not calculated until you update the timing netlist.
Warning (332060): Node: USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|reg_10bits[4] was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: reset_usbdrv was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[4] was determined to be a clock but was found without an associated clock assignment.
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
Info: Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON
Info: Analyzing Slow 1200mV 85C Model
Critical Warning (332148): Timing requirements not met
    Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer.
Info (332146): Worst-case setup slack is -3.960
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    -3.960      -367.875 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    -0.198        -0.300 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     4.034         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
    Info (332119):    25.858         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    44.493         0.000 altera_reserved_tck 
Info (332146): Worst-case hold slack is 0.346
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.346         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.353         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
    Info (332119):     0.394         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     0.413         0.000 altera_reserved_tck 
    Info (332119):     0.414         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case recovery slack is 5.876
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     5.876         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     7.996         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    48.335         0.000 altera_reserved_tck 
    Info (332119):    63.571         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case removal slack is -0.003
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    -0.003        -0.019 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     1.435         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     1.453         0.000 altera_reserved_tck 
    Info (332119):     2.322         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case minimum pulse width slack is 4.091
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.091         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
    Info (332119):     5.547         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    17.179         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    17.427         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    33.028         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    49.482         0.000 altera_reserved_tck 
    Info (332119):    99.796         0.000 FPGA_CLK 
Info: Analyzing Slow 1200mV 0C Model
Info (334003): Started post-fitting delay annotation
Info (334004): Delay annotation completed successfully
Warning (332060): Node: USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|reg_10bits[4] was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: reset_usbdrv was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[4] was determined to be a clock but was found without an associated clock assignment.
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
Critical Warning (332148): Timing requirements not met
    Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer.
Info (332146): Worst-case setup slack is -3.243
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    -3.243      -298.779 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.776         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     4.440         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
    Info (332119):    26.451         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    45.143         0.000 altera_reserved_tck 
Info (332146): Worst-case hold slack is 0.327
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.327         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
    Info (332119):     0.347         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     0.348         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.362         0.000 altera_reserved_tck 
    Info (332119):     0.364         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case recovery slack is 6.441
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     6.441         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     8.363         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    48.606         0.000 altera_reserved_tck 
    Info (332119):    63.879         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case removal slack is -0.029
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    -0.029        -0.842 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     1.296         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     1.337         0.000 altera_reserved_tck 
    Info (332119):     2.084         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case minimum pulse width slack is 4.090
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.090         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
    Info (332119):     5.546         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    17.161         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    17.424         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    32.970         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    49.395         0.000 altera_reserved_tck 
    Info (332119):    99.779         0.000 FPGA_CLK 
Info: Analyzing Fast 1200mV 0C Model
Warning (332060): Node: USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|reg_10bits[4] was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: reset_usbdrv was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[4] was determined to be a clock but was found without an associated clock assignment.
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
Critical Warning (332148): Timing requirements not met
    Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer.
Info (332146): Worst-case setup slack is -0.404
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    -0.404        -6.061 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     5.697         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     6.422         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
    Info (332119):    29.708         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    47.533         0.000 altera_reserved_tck 
Info (332146): Worst-case hold slack is 0.138
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.138         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
    Info (332119):     0.140         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.179         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     0.187         0.000 altera_reserved_tck 
    Info (332119):     0.188         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case recovery slack is 8.699
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     8.699         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     9.788         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    49.518         0.000 altera_reserved_tck 
    Info (332119):    65.054         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case removal slack is -0.007
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    -0.007        -0.162 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     0.690         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.704         0.000 altera_reserved_tck 
    Info (332119):     1.161         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case minimum pulse width slack is 4.152
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.152         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
    Info (332119):     5.606         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    17.205         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    17.437         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    33.026         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    49.285         0.000 altera_reserved_tck 
    Info (332119):    99.418         0.000 FPGA_CLK 
Info (332102): Design is not fully constrained for setup requirements
Info (332102): Design is not fully constrained for hold requirements
Info: Quartus II 32-bit TimeQuest Timing Analyzer was successful. 0 errors, 13 warnings
    Info: Peak virtual memory: 525 megabytes
    Info: Processing ended: Sat Nov  8 23:28:20 2014
    Info: Elapsed time: 00:00:48
    Info: Total CPU time (on all processors): 00:00:35


