Analysis & Synthesis report for atari800core
Sat Nov  8 23:12:34 2014
Quartus II 32-bit Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Analysis & Synthesis Summary
  3. Analysis & Synthesis Settings
  4. Parallel Compilation
  5. Analysis & Synthesis Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2013 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+--------------------------------------------------------------------------------------+
; Analysis & Synthesis Summary                                                         ;
+------------------------------------+-------------------------------------------------+
; Analysis & Synthesis Status        ; Failed - Sat Nov  8 23:12:34 2014               ;
; Quartus II 32-bit Version          ; 13.0.1 Build 232 06/12/2013 SP 1 SJ Web Edition ;
; Revision Name                      ; atari800core                                    ;
; Top-level Entity Name              ; atari800core_mcc                                ;
; Family                             ; Cyclone III                                     ;
; Total logic elements               ; N/A until Partition Merge                       ;
;     Total combinational functions  ; N/A until Partition Merge                       ;
;     Dedicated logic registers      ; N/A until Partition Merge                       ;
; Total registers                    ; N/A until Partition Merge                       ;
; Total pins                         ; N/A until Partition Merge                       ;
; Total virtual pins                 ; N/A until Partition Merge                       ;
; Total memory bits                  ; N/A until Partition Merge                       ;
; Embedded Multiplier 9-bit elements ; N/A until Partition Merge                       ;
; Total PLLs                         ; N/A until Partition Merge                       ;
+------------------------------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Settings                                                                                        ;
+----------------------------------------------------------------------------+--------------------+--------------------+
; Option                                                                     ; Setting            ; Default Value      ;
+----------------------------------------------------------------------------+--------------------+--------------------+
; Device                                                                     ; EP3C16E144C8       ;                    ;
; Top-level entity name                                                      ; atari800core_mcc   ; atari800core       ;
; Family name                                                                ; Cyclone III        ; Cyclone IV GX      ;
; Use smart compilation                                                      ; On                 ; Off                ;
; Optimization Technique                                                     ; Speed              ; Balanced           ;
; Timing-Driven Synthesis                                                    ; Off                ; On                 ;
; Enable parallel Assembler and TimeQuest Timing Analyzer during compilation ; On                 ; On                 ;
; Enable compact report table                                                ; Off                ; Off                ;
; Restructure Multiplexers                                                   ; Auto               ; Auto               ;
; Create Debugging Nodes for IP Cores                                        ; Off                ; Off                ;
; Preserve fewer node names                                                  ; On                 ; On                 ;
; Disable OpenCore Plus hardware evaluation                                  ; Off                ; Off                ;
; Verilog Version                                                            ; Verilog_2001       ; Verilog_2001       ;
; VHDL Version                                                               ; VHDL_1993          ; VHDL_1993          ;
; State Machine Processing                                                   ; Auto               ; Auto               ;
; Safe State Machine                                                         ; Off                ; Off                ;
; Extract Verilog State Machines                                             ; On                 ; On                 ;
; Extract VHDL State Machines                                                ; On                 ; On                 ;
; Ignore Verilog initial constructs                                          ; Off                ; Off                ;
; Iteration limit for constant Verilog loops                                 ; 5000               ; 5000               ;
; Iteration limit for non-constant Verilog loops                             ; 250                ; 250                ;
; Add Pass-Through Logic to Inferred RAMs                                    ; On                 ; On                 ;
; Infer RAMs from Raw Logic                                                  ; On                 ; On                 ;
; Parallel Synthesis                                                         ; On                 ; On                 ;
; DSP Block Balancing                                                        ; Auto               ; Auto               ;
; NOT Gate Push-Back                                                         ; On                 ; On                 ;
; Power-Up Don't Care                                                        ; On                 ; On                 ;
; Remove Redundant Logic Cells                                               ; Off                ; Off                ;
; Remove Duplicate Registers                                                 ; On                 ; On                 ;
; Ignore CARRY Buffers                                                       ; Off                ; Off                ;
; Ignore CASCADE Buffers                                                     ; Off                ; Off                ;
; Ignore GLOBAL Buffers                                                      ; Off                ; Off                ;
; Ignore ROW GLOBAL Buffers                                                  ; Off                ; Off                ;
; Ignore LCELL Buffers                                                       ; Off                ; Off                ;
; Ignore SOFT Buffers                                                        ; On                 ; On                 ;
; Limit AHDL Integers to 32 Bits                                             ; Off                ; Off                ;
; Carry Chain Length                                                         ; 70                 ; 70                 ;
; Auto Carry Chains                                                          ; On                 ; On                 ;
; Auto Open-Drain Pins                                                       ; On                 ; On                 ;
; Perform WYSIWYG Primitive Resynthesis                                      ; Off                ; Off                ;
; Auto ROM Replacement                                                       ; On                 ; On                 ;
; Auto RAM Replacement                                                       ; On                 ; On                 ;
; Auto DSP Block Replacement                                                 ; On                 ; On                 ;
; Auto Shift Register Replacement                                            ; Auto               ; Auto               ;
; Allow Shift Register Merging across Hierarchies                            ; Auto               ; Auto               ;
; Auto Clock Enable Replacement                                              ; On                 ; On                 ;
; Strict RAM Replacement                                                     ; Off                ; Off                ;
; Allow Synchronous Control Signals                                          ; On                 ; On                 ;
; Force Use of Synchronous Clear Signals                                     ; Off                ; Off                ;
; Auto RAM Block Balancing                                                   ; On                 ; On                 ;
; Auto RAM to Logic Cell Conversion                                          ; Off                ; Off                ;
; Auto Resource Sharing                                                      ; Off                ; Off                ;
; Allow Any RAM Size For Recognition                                         ; Off                ; Off                ;
; Allow Any ROM Size For Recognition                                         ; Off                ; Off                ;
; Allow Any Shift Register Size For Recognition                              ; Off                ; Off                ;
; Use LogicLock Constraints during Resource Balancing                        ; On                 ; On                 ;
; Ignore translate_off and synthesis_off directives                          ; Off                ; Off                ;
; Report Parameter Settings                                                  ; On                 ; On                 ;
; Report Source Assignments                                                  ; On                 ; On                 ;
; Report Connectivity Checks                                                 ; On                 ; On                 ;
; Ignore Maximum Fan-Out Assignments                                         ; Off                ; Off                ;
; Synchronization Register Chain Length                                      ; 2                  ; 2                  ;
; PowerPlay Power Optimization                                               ; Normal compilation ; Normal compilation ;
; HDL message level                                                          ; Level2             ; Level2             ;
; Suppress Register Optimization Related Messages                            ; Off                ; Off                ;
; Number of Removed Registers Reported in Synthesis Report                   ; 5000               ; 5000               ;
; Number of Swept Nodes Reported in Synthesis Report                         ; 5000               ; 5000               ;
; Number of Inverted Registers Reported in Synthesis Report                  ; 100                ; 100                ;
; Clock MUX Protection                                                       ; On                 ; On                 ;
; Auto Gated Clock Conversion                                                ; Off                ; Off                ;
; Block Design Naming                                                        ; Auto               ; Auto               ;
; SDC constraint protection                                                  ; Off                ; Off                ;
; Synthesis Effort                                                           ; Auto               ; Auto               ;
; Shift Register Replacement - Allow Asynchronous Clear Signal               ; On                 ; On                 ;
; Pre-Mapping Resynthesis Optimization                                       ; Off                ; Off                ;
; Analysis & Synthesis Message Level                                         ; Medium             ; Medium             ;
; Disable Register Merging Across Hierarchies                                ; Auto               ; Auto               ;
; Resource Aware Inference For Block RAM                                     ; On                 ; On                 ;
; Synthesis Seed                                                             ; 1                  ; 1                  ;
+----------------------------------------------------------------------------+--------------------+--------------------+


+------------------------------------------+
; Parallel Compilation                     ;
+----------------------------+-------------+
; Processors                 ; Number      ;
+----------------------------+-------------+
; Number detected on machine ; 4           ;
; Maximum allowed            ; 2           ;
;                            ;             ;
; Average used               ; 1.00        ;
; Maximum used               ; 1           ;
;                            ;             ;
; Usage by Processor         ; % Time Used ;
;     Processor 1            ; 100.0%      ;
;     Processors 2-4         ;   0.0%      ;
+----------------------------+-------------+


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II 32-bit Analysis & Synthesis
    Info: Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
    Info: Processing started: Sat Nov  8 23:12:27 2014
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off atari800core -c atari800core
Info (11104): Parallel Compilation has detected 4 hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use 2 of the 2 physical processors detected instead.
Info (12021): Found 2 design units, including 1 entities, in source file usbpll.vhd
    Info (12022): Found design unit 1: usbpll-SYN
    Info (12023): Found entity 1: usbpll
Info (12021): Found 2 design units, including 1 entities, in source file pal_pll.vhd
    Info (12022): Found design unit 1: pal_pll-SYN
    Info (12023): Found entity 1: pal_pll
Info (12021): Found 2 design units, including 1 entities, in source file pll_downstream_pal.vhd
    Info (12022): Found design unit 1: pll_downstream_pal-SYN
    Info (12023): Found entity 1: pll_downstream_pal
Info (12021): Found 2 design units, including 1 entities, in source file ntsc_pll.vhd
    Info (12022): Found design unit 1: ntsc_pll-SYN
    Info (12023): Found entity 1: ntsc_pll
Info (12021): Found 2 design units, including 1 entities, in source file pll_downstream_ntsc.vhd
    Info (12022): Found design unit 1: pll_downstream_ntsc-SYN
    Info (12023): Found entity 1: pll_downstream_ntsc
Info (12021): Found 1 design units, including 1 entities, in source file sdram_ctrl_3_ports.v
    Info (12023): Found entity 1: sdram_ctrl
Info (12021): Found 2 design units, including 1 entities, in source file zpu_rom.vhdl
    Info (12022): Found design unit 1: zpu_rom-syn
    Info (12023): Found entity 1: zpu_rom
Error (10500): VHDL syntax error at atari800core_mcc.vhd(384) near text "others";  expecting "(", or an identifier ("others" is a reserved keyword), or  unary operator File: /home/markw/fpga/svn/repo/trunk/atari_800xl/mcc216/build_SIMPLE/atari800core_mcc.vhd Line: 384
Error (10500): VHDL syntax error at atari800core_mcc.vhd(385) near text ",";  expecting "<=" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/mcc216/build_SIMPLE/atari800core_mcc.vhd Line: 385
Info (12021): Found 0 design units, including 0 entities, in source file atari800core_mcc.vhd
Info (12021): Found 3 design units, including 1 entities, in source file svideo/sin_cos.vhd
    Info (12022): Found design unit 1: sin_cos_pkg
    Info (12022): Found design unit 2: sin_cos-rtl
    Info (12023): Found entity 1: sin_cos
Info (12021): Found 2 design units, including 1 entities, in source file svideo/sin_rom.vhd
    Info (12022): Found design unit 1: sin_rom-SYN
    Info (12023): Found entity 1: sin_rom
Info (12021): Found 2 design units, including 1 entities, in source file svideo/svideo.vhd
    Info (12022): Found design unit 1: svideo-rtl
    Info (12023): Found entity 1: svideo
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/atari5200core.vhd
    Info (12022): Found design unit 1: atari5200core-bdf_type
    Info (12023): Found entity 1: atari5200core
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/atari5200core_simplesdram.vhd
    Info (12022): Found design unit 1: atari5200core_simplesdram-vhdl
    Info (12023): Found entity 1: atari5200core_simplesdram
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/atari800core.vhd
    Info (12022): Found design unit 1: atari800core-bdf_type
    Info (12023): Found entity 1: atari800core
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/atari800core_helloworld.vhd
    Info (12022): Found design unit 1: atari800core_helloworld-vhdl
    Info (12023): Found entity 1: atari800core_helloworld
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/atari800core_simple_sdram.vhd
    Info (12022): Found design unit 1: atari800core_simple_sdram-vhdl
    Info (12023): Found entity 1: atari800core_simple_sdram
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/cart_logic.vhd
    Info (12022): Found design unit 1: CartLogic-vhdl
    Info (12023): Found entity 1: CartLogic
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/covox.vhd
    Info (12022): Found design unit 1: covox-vhdl
    Info (12023): Found entity 1: covox
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/cpu.vhd
    Info (12022): Found design unit 1: cpu-vhdl
    Info (12023): Found entity 1: cpu
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/cpu_6510.vhd
    Info (12022): Found design unit 1: cpu_6510-rtl
    Info (12023): Found entity 1: cpu_6510
Info (12021): Found 1 design units, including 0 entities, in source file common/a8core/cpu_65xx_a.vhd
    Info (12022): Found design unit 1: cpu_65xx-rtl
Info (12021): Found 1 design units, including 1 entities, in source file common/a8core/cpu_65xx_e.vhd
    Info (12023): Found entity 1: cpu_65xx
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/freezer_logic.vhd
    Info (12022): Found design unit 1: FreezerLogic-RTL
    Info (12023): Found entity 1: FreezerLogic
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/internalromram.vhd
    Info (12022): Found design unit 1: internalromram-vhdl
    Info (12023): Found entity 1: internalromram
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/timing6502.vhd
    Info (12022): Found design unit 1: timing6502-vhdl
    Info (12023): Found entity 1: timing6502
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/address_decoder.vhdl
    Info (12022): Found design unit 1: address_decoder-vhdl
    Info (12023): Found entity 1: address_decoder
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/antic.vhdl
    Info (12022): Found design unit 1: antic-vhdl
    Info (12023): Found entity 1: antic
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/antic_counter.vhdl
    Info (12022): Found design unit 1: antic_counter-vhdl
    Info (12023): Found entity 1: antic_counter
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/antic_dma_clock.vhdl
    Info (12022): Found design unit 1: antic_dma_clock-vhdl
    Info (12023): Found entity 1: antic_dma_clock
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/basic.vhdl
    Info (12022): Found design unit 1: basic-syn
    Info (12023): Found entity 1: basic
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/enable_divider.vhdl
    Info (12022): Found design unit 1: enable_divider-vhdl
    Info (12023): Found entity 1: enable_divider
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/gtia.vhdl
    Info (12022): Found design unit 1: gtia-vhdl
    Info (12023): Found entity 1: gtia
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/gtia_palette.vhdl
    Info (12022): Found design unit 1: gtia_palette-vhdl
    Info (12023): Found entity 1: gtia_palette
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/gtia_player.vhdl
    Info (12022): Found design unit 1: gtia_player-vhdl
    Info (12023): Found entity 1: gtia_player
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/gtia_priority.vhdl
    Info (12022): Found design unit 1: gtia_priority-vhdl
    Info (12023): Found entity 1: gtia_priority
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/irq_glue.vhdl
    Info (12022): Found design unit 1: irq_glue-vhdl
    Info (12023): Found entity 1: irq_glue
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/os16.vhdl
    Info (12022): Found design unit 1: os16-syn
    Info (12023): Found entity 1: os16
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/os16_loop.vhdl
    Info (12022): Found design unit 1: os16_loop-syn
    Info (12023): Found entity 1: os16_loop
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/os2.vhdl
    Info (12022): Found design unit 1: os2-syn
    Info (12023): Found entity 1: os2
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/os8.vhdl
    Info (12022): Found design unit 1: os8-syn
    Info (12023): Found entity 1: os8
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/os_5200.vhdl
    Info (12022): Found design unit 1: os_5200-syn
    Info (12023): Found entity 1: os_5200
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/pia.vhdl
    Info (12022): Found design unit 1: pia-vhdl
    Info (12023): Found entity 1: pia
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/pokey.vhdl
    Info (12022): Found design unit 1: pokey-vhdl
    Info (12023): Found entity 1: pokey
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/pokey_countdown_timer.vhdl
    Info (12022): Found design unit 1: pokey_countdown_timer-vhdl
    Info (12023): Found entity 1: pokey_countdown_timer
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/pokey_keyboard_scanner.vhdl
    Info (12022): Found design unit 1: pokey_keyboard_scanner-vhdl
    Info (12023): Found entity 1: pokey_keyboard_scanner
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/pokey_mixer.vhdl
    Info (12022): Found design unit 1: pokey_mixer-vhdl
    Info (12023): Found entity 1: pokey_mixer
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/pokey_mixer_mux.vhdl
    Info (12022): Found design unit 1: pokey_mixer_mux-vhdl
    Info (12023): Found entity 1: pokey_mixer_mux
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/pokey_noise_filter.vhdl
    Info (12022): Found design unit 1: pokey_noise_filter-vhdl
    Info (12023): Found entity 1: pokey_noise_filter
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/pokey_poly_17_9.vhdl
    Info (12022): Found design unit 1: pokey_poly_17_9-vhdl
    Info (12023): Found entity 1: pokey_poly_17_9
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/pokey_poly_4.vhdl
    Info (12022): Found design unit 1: pokey_poly_4-vhdl
    Info (12023): Found entity 1: pokey_poly_4
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/pokey_poly_5.vhdl
    Info (12022): Found design unit 1: pokey_poly_5-vhdl
    Info (12023): Found entity 1: pokey_poly_5
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/pot_from_signed.vhdl
    Info (12022): Found design unit 1: pot_from_signed-vhdl
    Info (12023): Found entity 1: pot_from_signed
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/ps2_to_atari5200.vhdl
    Info (12022): Found design unit 1: ps2_to_atari5200-vhdl
    Info (12023): Found entity 1: ps2_to_atari5200
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/ps2_to_atari800.vhdl
    Info (12022): Found design unit 1: ps2_to_atari800-vhdl
    Info (12023): Found entity 1: ps2_to_atari800
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/reg_file.vhdl
    Info (12022): Found design unit 1: reg_file-vhdl
    Info (12023): Found entity 1: reg_file
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/shared_enable.vhdl
    Info (12022): Found design unit 1: shared_enable-vhdl
    Info (12023): Found entity 1: shared_enable
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/simple_counter.vhdl
    Info (12022): Found design unit 1: simple_counter-vhdl
    Info (12023): Found entity 1: simple_counter
Info (12021): Found 2 design units, including 1 entities, in source file common/a8core/wide_delay_line.vhdl
    Info (12022): Found design unit 1: wide_delay_line-vhdl
    Info (12023): Found entity 1: wide_delay_line
Info (12021): Found 1 design units, including 1 entities, in source file common/components/hq_dac.v
    Info (12023): Found entity 1: hq_dac
Info (12021): Found 2 design units, including 1 entities, in source file common/components/spi_master.vhd
    Info (12022): Found design unit 1: spi_master-logic
    Info (12023): Found entity 1: spi_master
Info (12021): Found 2 design units, including 1 entities, in source file common/components/syncreset_enable_divider.vhd
    Info (12022): Found design unit 1: syncreset_enable_divider-vhdl
    Info (12023): Found entity 1: syncreset_enable_divider
Info (12021): Found 2 design units, including 1 entities, in source file common/components/complete_address_decoder.vhdl
    Info (12022): Found design unit 1: complete_address_decoder-tree
    Info (12023): Found entity 1: complete_address_decoder
Info (12021): Found 2 design units, including 1 entities, in source file common/components/delay_line.vhdl
    Info (12022): Found design unit 1: delay_line-vhdl
    Info (12023): Found entity 1: delay_line
Info (12021): Found 2 design units, including 1 entities, in source file common/components/generic_ram_infer.vhdl
    Info (12022): Found design unit 1: generic_ram_infer-rtl
    Info (12023): Found entity 1: generic_ram_infer
Info (12021): Found 2 design units, including 1 entities, in source file common/components/ps2_keyboard.vhdl
    Info (12022): Found design unit 1: ps2_keyboard-vhdl
    Info (12023): Found entity 1: ps2_keyboard
Info (12021): Found 2 design units, including 1 entities, in source file common/components/scandouble_ram_infer.vhdl
    Info (12022): Found design unit 1: scandouble_ram_infer-rtl
    Info (12023): Found entity 1: scandouble_ram_infer
Info (12021): Found 2 design units, including 1 entities, in source file common/components/scandoubler.vhdl
    Info (12022): Found design unit 1: scandoubler-vhdl
    Info (12023): Found entity 1: scandoubler
Info (12021): Found 2 design units, including 1 entities, in source file common/components/sdram_statemachine.vhdl
    Info (12022): Found design unit 1: sdram_statemachine-vhdl
    Info (12023): Found entity 1: sdram_statemachine
Info (12021): Found 2 design units, including 1 entities, in source file common/components/synchronizer.vhdl
    Info (12022): Found design unit 1: synchronizer-vhdl
    Info (12023): Found entity 1: synchronizer
Info (12021): Found 2 design units, including 1 entities, in source file common/zpu/zpu_core.vhd
    Info (12022): Found design unit 1: ZPUMediumCore-Behave
    Info (12023): Found entity 1: ZPUMediumCore
Info (12021): Found 2 design units, including 1 entities, in source file common/zpu/zpucore.vhd
    Info (12022): Found design unit 1: zpucore-vhdl
    Info (12023): Found entity 1: zpucore
Info (12021): Found 2 design units, including 0 entities, in source file common/zpu/zpupkg.vhd
    Info (12022): Found design unit 1: zpupkg
    Info (12022): Found design unit 2: UART
Info (12021): Found 2 design units, including 1 entities, in source file common/zpu/zpu_config_regs.vhdl
    Info (12022): Found design unit 1: zpu_config_regs-vhdl
    Info (12023): Found entity 1: zpu_config_regs
Info (12021): Found 2 design units, including 1 entities, in source file common/zpu/zpu_glue.vhdl
    Info (12022): Found design unit 1: zpu_glue-sticky
    Info (12023): Found entity 1: zpu_glue
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/directcontrol.v
    Info (12023): Found entity 1: directControl
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/dpMem_dc.v
    Info (12023): Found entity 1: dpMem_dc
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/endpMux.v
    Info (12023): Found entity 1: endpMux
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/fifoMux.v
    Info (12023): Found entity 1: fifoMux
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/fifoRTL.v
    Info (12023): Found entity 1: fifoRTL
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/getpacket.v
    Info (12023): Found entity 1: getPacket
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/hctxportarbiter.v
    Info (12023): Found entity 1: HCTxPortArbiter
Warning (10274): Verilog HDL macro warning at usbHostControl_h.v(38): overriding existing definition for macro "TRANS_DONE_BIT", which was defined in "common/components/usbhostslave/usbSlaveControl_h.v", line 71
Warning (10274): Verilog HDL macro warning at usbHostControl_h.v(39): overriding existing definition for macro "RESUME_INT_BIT", which was defined in "common/components/usbhostslave/usbSlaveControl_h.v", line 72
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/hostcontroller.v
    Info (12023): Found entity 1: hostcontroller
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/hostSlaveMux.v
    Info (12023): Found entity 1: hostSlaveMux
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/hostSlaveMuxBI.v
    Info (12023): Found entity 1: hostSlaveMuxBI
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/lineControlUpdate.v
    Info (12023): Found entity 1: lineControlUpdate
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/processRxBit.v
    Info (12023): Found entity 1: processRxBit
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/processRxByte.v
    Info (12023): Found entity 1: processRxByte
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/processTxByte.v
    Info (12023): Found entity 1: processTxByte
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/readUSBWireData.v
    Info (12023): Found entity 1: readUSBWireData
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/RxFifo.v
    Info (12023): Found entity 1: RxFifo
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/RxFifoBI.v
    Info (12023): Found entity 1: RxfifoBI
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/rxStatusMonitor.v
    Info (12023): Found entity 1: rxStatusMonitor
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/sctxportarbiter.v
    Info (12023): Found entity 1: SCTxPortArbiter
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/sendpacket.v
    Info (12023): Found entity 1: sendPacket
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/sendpacketarbiter.v
    Info (12023): Found entity 1: sendPacketArbiter
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/sendpacketcheckpreamble.v
    Info (12023): Found entity 1: sendPacketCheckPreamble
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/siereceiver.v
    Info (12023): Found entity 1: SIEReceiver
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/SIETransmitter.v
    Info (12023): Found entity 1: SIETransmitter
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/slavecontroller.v
    Info (12023): Found entity 1: slavecontroller
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/slaveDirectcontrol.v
    Info (12023): Found entity 1: slaveDirectControl
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/slaveGetpacket.v
    Info (12023): Found entity 1: slaveGetPacket
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/slaveRxStatusMonitor.v
    Info (12023): Found entity 1: slaveRxStatusMonitor
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/slaveSendpacket.v
    Info (12023): Found entity 1: slaveSendPacket
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/sofcontroller.v
    Info (12023): Found entity 1: SOFController
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/softransmit.v
    Info (12023): Found entity 1: SOFTransmit
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/speedCtrlMux.v
    Info (12023): Found entity 1: speedCtrlMux
Info (12021): Found 0 design units, including 0 entities, in source file common/components/usbhostslave/timescale.v
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/TxFifo.v
    Info (12023): Found entity 1: TxFifo
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/TxFifoBI.v
    Info (12023): Found entity 1: TxfifoBI
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/updateCRC16.v
    Info (12023): Found entity 1: updateCRC16
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/updateCRC5.v
    Info (12023): Found entity 1: updateCRC5
Info (12021): Found 0 design units, including 0 entities, in source file common/components/usbhostslave/usbConstants_h.v
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/usbHost.v
    Info (12023): Found entity 1: usbHost
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/usbHostControl.v
    Info (12023): Found entity 1: usbHostControl
Info (12021): Found 0 design units, including 0 entities, in source file common/components/usbhostslave/usbHostControl_h.v
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/USBHostControlBI.v
    Info (12023): Found entity 1: USBHostControlBI
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/usbHostCyc2Wrap.v
    Info (12023): Found entity 1: usbHostCyc2Wrap
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/usbHostCyc2Wrap_usb1t11.v
    Info (12023): Found entity 1: usbHostCyc2Wrap_usb1t11
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/usbHostSlave.v
    Info (12023): Found entity 1: usbHostSlave
Info (12021): Found 0 design units, including 0 entities, in source file common/components/usbhostslave/usbHostSlave_h.v
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/usbHostSlaveAvalonWrap.v
    Info (12023): Found entity 1: usbHostSlaveAvalonWrap
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/usbHostSlaveCyc2Wrap.v
    Info (12023): Found entity 1: usbHostSlaveCyc2Wrap
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/usbSerialInterfaceEngine.v
    Info (12023): Found entity 1: usbSerialInterfaceEngine
Info (12021): Found 0 design units, including 0 entities, in source file common/components/usbhostslave/usbSerialInterfaceEngine_h.v
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/usbSlave.v
    Info (12023): Found entity 1: usbSlave
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/usbSlaveControl.v
    Info (12023): Found entity 1: usbSlaveControl
Info (12021): Found 0 design units, including 0 entities, in source file common/components/usbhostslave/usbSlaveControl_h.v
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/USBSlaveControlBI.v
    Info (12023): Found entity 1: USBSlaveControlBI
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/usbSlaveCyc2Wrap.v
    Info (12023): Found entity 1: usbSlaveCyc2Wrap
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/usbSlaveCyc2Wrap_usb1t11.v
    Info (12023): Found entity 1: usbSlaveCyc2Wrap_usb1t11
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/usbTxWireArbiter.v
    Info (12023): Found entity 1: USBTxWireArbiter
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/wishBoneBI.v
    Info (12023): Found entity 1: wishBoneBI
Info (12021): Found 0 design units, including 0 entities, in source file common/components/usbhostslave/wishBoneBus_h.v
Info (12021): Found 1 design units, including 1 entities, in source file common/components/usbhostslave/writeUSBWireData.v
    Info (12023): Found entity 1: writeUSBWireData
Error: Quartus II 32-bit Analysis & Synthesis was unsuccessful. 2 errors, 2 warnings
    Error: Peak virtual memory: 374 megabytes
    Error: Processing ended: Sat Nov  8 23:12:35 2014
    Error: Elapsed time: 00:00:08
    Error: Total CPU time (on all processors): 00:00:04


