TimeQuest Timing Analyzer report for atari800core
Sat Nov  1 14:22:43 2014
Quartus II 32-bit Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. TimeQuest Timing Analyzer Summary
  3. Parallel Compilation
  4. SDC File List
  5. Clocks
  6. Slow 1200mV 85C Model Fmax Summary
  7. Timing Closure Recommendations
  8. Slow 1200mV 85C Model Setup Summary
  9. Slow 1200mV 85C Model Hold Summary
 10. Slow 1200mV 85C Model Recovery Summary
 11. Slow 1200mV 85C Model Removal Summary
 12. Slow 1200mV 85C Model Minimum Pulse Width Summary
 13. Slow 1200mV 85C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 14. Slow 1200mV 85C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 15. Slow 1200mV 85C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 16. Slow 1200mV 85C Model Setup: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 17. Slow 1200mV 85C Model Setup: 'altera_reserved_tck'
 18. Slow 1200mV 85C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 19. Slow 1200mV 85C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 20. Slow 1200mV 85C Model Hold: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 21. Slow 1200mV 85C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 22. Slow 1200mV 85C Model Hold: 'altera_reserved_tck'
 23. Slow 1200mV 85C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 24. Slow 1200mV 85C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 25. Slow 1200mV 85C Model Recovery: 'altera_reserved_tck'
 26. Slow 1200mV 85C Model Recovery: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 27. Slow 1200mV 85C Model Removal: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 28. Slow 1200mV 85C Model Removal: 'altera_reserved_tck'
 29. Slow 1200mV 85C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 30. Slow 1200mV 85C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 31. Slow 1200mV 85C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 32. Slow 1200mV 85C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 33. Slow 1200mV 85C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 34. Slow 1200mV 85C Model Minimum Pulse Width: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[1]'
 35. Slow 1200mV 85C Model Minimum Pulse Width: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 36. Slow 1200mV 85C Model Minimum Pulse Width: 'altera_reserved_tck'
 37. Slow 1200mV 85C Model Minimum Pulse Width: 'FPGA_CLK'
 38. Setup Times
 39. Hold Times
 40. Clock to Output Times
 41. Minimum Clock to Output Times
 42. Output Enable Times
 43. Minimum Output Enable Times
 44. Output Disable Times
 45. Minimum Output Disable Times
 46. Slow 1200mV 85C Model Metastability Report
 47. Slow 1200mV 0C Model Fmax Summary
 48. Slow 1200mV 0C Model Setup Summary
 49. Slow 1200mV 0C Model Hold Summary
 50. Slow 1200mV 0C Model Recovery Summary
 51. Slow 1200mV 0C Model Removal Summary
 52. Slow 1200mV 0C Model Minimum Pulse Width Summary
 53. Slow 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 54. Slow 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 55. Slow 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 56. Slow 1200mV 0C Model Setup: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 57. Slow 1200mV 0C Model Setup: 'altera_reserved_tck'
 58. Slow 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 59. Slow 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 60. Slow 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 61. Slow 1200mV 0C Model Hold: 'altera_reserved_tck'
 62. Slow 1200mV 0C Model Hold: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 63. Slow 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 64. Slow 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 65. Slow 1200mV 0C Model Recovery: 'altera_reserved_tck'
 66. Slow 1200mV 0C Model Recovery: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 67. Slow 1200mV 0C Model Removal: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 68. Slow 1200mV 0C Model Removal: 'altera_reserved_tck'
 69. Slow 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 70. Slow 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 71. Slow 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 72. Slow 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 73. Slow 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 74. Slow 1200mV 0C Model Minimum Pulse Width: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[1]'
 75. Slow 1200mV 0C Model Minimum Pulse Width: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 76. Slow 1200mV 0C Model Minimum Pulse Width: 'altera_reserved_tck'
 77. Slow 1200mV 0C Model Minimum Pulse Width: 'FPGA_CLK'
 78. Setup Times
 79. Hold Times
 80. Clock to Output Times
 81. Minimum Clock to Output Times
 82. Output Enable Times
 83. Minimum Output Enable Times
 84. Output Disable Times
 85. Minimum Output Disable Times
 86. Slow 1200mV 0C Model Metastability Report
 87. Fast 1200mV 0C Model Setup Summary
 88. Fast 1200mV 0C Model Hold Summary
 89. Fast 1200mV 0C Model Recovery Summary
 90. Fast 1200mV 0C Model Removal Summary
 91. Fast 1200mV 0C Model Minimum Pulse Width Summary
 92. Fast 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 93. Fast 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 94. Fast 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 95. Fast 1200mV 0C Model Setup: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 96. Fast 1200mV 0C Model Setup: 'altera_reserved_tck'
 97. Fast 1200mV 0C Model Hold: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 98. Fast 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 99. Fast 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
100. Fast 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
101. Fast 1200mV 0C Model Hold: 'altera_reserved_tck'
102. Fast 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
103. Fast 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
104. Fast 1200mV 0C Model Recovery: 'altera_reserved_tck'
105. Fast 1200mV 0C Model Recovery: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
106. Fast 1200mV 0C Model Removal: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
107. Fast 1200mV 0C Model Removal: 'altera_reserved_tck'
108. Fast 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
109. Fast 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
110. Fast 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
111. Fast 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
112. Fast 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
113. Fast 1200mV 0C Model Minimum Pulse Width: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[1]'
114. Fast 1200mV 0C Model Minimum Pulse Width: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
115. Fast 1200mV 0C Model Minimum Pulse Width: 'altera_reserved_tck'
116. Fast 1200mV 0C Model Minimum Pulse Width: 'FPGA_CLK'
117. Setup Times
118. Hold Times
119. Clock to Output Times
120. Minimum Clock to Output Times
121. Output Enable Times
122. Minimum Output Enable Times
123. Output Disable Times
124. Minimum Output Disable Times
125. Fast 1200mV 0C Model Metastability Report
126. Multicorner Timing Analysis Summary
127. Setup Times
128. Hold Times
129. Clock to Output Times
130. Minimum Clock to Output Times
131. Board Trace Model Assignments
132. Input Transition Times
133. Signal Integrity Metrics (Slow 1200mv 0c Model)
134. Signal Integrity Metrics (Slow 1200mv 85c Model)
135. Signal Integrity Metrics (Fast 1200mv 0c Model)
136. Setup Transfers
137. Hold Transfers
138. Recovery Transfers
139. Removal Transfers
140. Report TCCS
141. Report RSKM
142. Unconstrained Paths
143. TimeQuest Timing Analyzer Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2013 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
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Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+----------------------------------------------------------------------------------------+
; TimeQuest Timing Analyzer Summary                                                      ;
+--------------------+-------------------------------------------------------------------+
; Quartus II Version ; Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition ;
; Revision Name      ; atari800core                                                      ;
; Device Family      ; Cyclone IV E                                                      ;
; Device Name        ; EP4CE15E22C7                                                      ;
; Timing Models      ; Final                                                             ;
; Delay Model        ; Combined                                                          ;
; Rise/Fall Delays   ; Enabled                                                           ;
+--------------------+-------------------------------------------------------------------+


+------------------------------------------+
; Parallel Compilation                     ;
+----------------------------+-------------+
; Processors                 ; Number      ;
+----------------------------+-------------+
; Number detected on machine ; 4           ;
; Maximum allowed            ; 2           ;
;                            ;             ;
; Average used               ; 1.16        ;
; Maximum used               ; 2           ;
;                            ;             ;
; Usage by Processor         ; % Time Used ;
;     Processor 1            ; 100.0%      ;
;     Processor 2            ;  16.3%      ;
;     Processors 3-4         ;   0.0%      ;
+----------------------------+-------------+


+------------------------------------------------------+
; SDC File List                                        ;
+------------------+--------+--------------------------+
; SDC File Path    ; Status ; Read at                  ;
+------------------+--------+--------------------------+
; atari800core.sdc ; OK     ; Sat Nov  1 14:21:58 2014 ;
+------------------+--------+--------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clocks                                                                                                                                                                                                                                                                                                                                                                                                                                                         ;
+--------------------------------------------------------------------------------+-----------+---------+------------+-------+---------+------------+-----------+-------------+-------+--------+-----------+------------+----------+------------------------------------------------------+----------------------------------------------------------------------------------+------------------------------------------------------------------------------------+
; Clock Name                                                                     ; Type      ; Period  ; Frequency  ; Rise  ; Fall    ; Duty Cycle ; Divide by ; Multiply by ; Phase ; Offset ; Edge List ; Edge Shift ; Inverted ; Master                                               ; Source                                                                           ; Targets                                                                            ;
+--------------------------------------------------------------------------------+-----------+---------+------------+-------+---------+------------+-----------+-------------+-------+--------+-----------+------------+----------+------------------------------------------------------+----------------------------------------------------------------------------------+------------------------------------------------------------------------------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Generated ; 11.640  ; 85.91 MHz  ; 0.000 ; 5.820   ; 50.00      ; 1         ; 3           ;       ;        ;           ;            ; false    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0] ; { \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] } ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Generated ; 34.920  ; 28.64 MHz  ; 0.000 ; 17.460  ; 50.00      ; 1         ; 1           ;       ;        ;           ;            ; false    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0] ; { \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] } ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ; Generated ; 11.640  ; 85.91 MHz  ; 7.638 ; 13.458  ; 50.00      ; 1         ; 3           ; 236.2 ;        ;           ;            ; false    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0] ; { \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] } ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Generated ; 8.730   ; 114.55 MHz ; 0.000 ; 4.365   ; 50.00      ; 1         ; 4           ;       ;        ;           ;            ; false    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0] ; { \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] } ;
; altera_reserved_tck                                                            ; Base      ; 100.000 ; 10.0 MHz   ; 0.000 ; 50.000  ;            ;           ;             ;       ;        ;           ;            ;          ;                                                      ;                                                                                  ; { altera_reserved_tck }                                                            ;
; FPGA_CLK                                                                       ; Base      ; 200.000 ; 5.0 MHz    ; 0.000 ; 100.000 ;            ;           ;             ;       ;        ;           ;            ;          ;                                                      ;                                                                                  ; { FPGA_CLK }                                                                       ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; Generated ; 66.666  ; 15.0 MHz   ; 0.000 ; 33.333  ; 50.00      ; 1         ; 3           ;       ;        ;           ;            ; false    ; FPGA_CLK                                             ; mcc_pll3|altpll_component|auto_generated|pll1|inclk[0]                           ; { mcc_pll3|altpll_component|auto_generated|pll1|clk[0] }                           ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[1]                           ; Generated ; 34.920  ; 28.64 MHz  ; 0.000 ; 17.460  ; 50.00      ; 11        ; 63          ;       ;        ;           ;            ; false    ; FPGA_CLK                                             ; mcc_pll3|altpll_component|auto_generated|pll1|inclk[0]                           ; { mcc_pll3|altpll_component|auto_generated|pll1|clk[1] }                           ;
+--------------------------------------------------------------------------------+-----------+---------+------------+-------+---------+------------+-----------+-------------+-------+--------+-----------+------------+----------+------------------------------------------------------+----------------------------------------------------------------------------------+------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Fmax Summary                                                                                   ;
+------------+-----------------+--------------------------------------------------------------------------------+------+
; Fmax       ; Restricted Fmax ; Clock Name                                                                     ; Note ;
+------------+-----------------+--------------------------------------------------------------------------------+------+
; 46.28 MHz  ; 46.28 MHz       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;      ;
; 68.2 MHz   ; 68.2 MHz        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;      ;
; 119.13 MHz ; 119.13 MHz      ; altera_reserved_tck                                                            ;      ;
; 145.84 MHz ; 145.84 MHz      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;      ;
; 219.35 MHz ; 219.35 MHz      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;      ;
+------------+-----------------+--------------------------------------------------------------------------------+------+
This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods.  FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock.  Paths of different clocks, including generated clocks, are ignored.  For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.


----------------------------------
; Timing Closure Recommendations ;
----------------------------------
HTML report is unavailable in plain text report export.


+---------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup Summary                                                                     ;
+--------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                          ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; -3.966 ; -336.645      ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.499 ; -1.262        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 4.171  ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 26.002 ; 0.000         ;
; altera_reserved_tck                                                            ; 45.803 ; 0.000         ;
+--------------------------------------------------------------------------------+--------+---------------+


+--------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold Summary                                                                     ;
+--------------------------------------------------------------------------------+-------+---------------+
; Clock                                                                          ; Slack ; End Point TNS ;
+--------------------------------------------------------------------------------+-------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.339 ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.352 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 0.412 ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.413 ; 0.000         ;
; altera_reserved_tck                                                            ; 0.414 ; 0.000         ;
+--------------------------------------------------------------------------------+-------+---------------+


+---------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery Summary                                                                  ;
+--------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                          ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 6.778  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 7.369  ; 0.000         ;
; altera_reserved_tck                                                            ; 48.242 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 63.099 ; 0.000         ;
+--------------------------------------------------------------------------------+--------+---------------+


+--------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal Summary                                                                  ;
+--------------------------------------------------------------------------------+-------+---------------+
; Clock                                                                          ; Slack ; End Point TNS ;
+--------------------------------------------------------------------------------+-------+---------------+
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 0.220 ; 0.000         ;
; altera_reserved_tck                                                            ; 1.401 ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 1.423 ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 2.938 ; 0.000         ;
+--------------------------------------------------------------------------------+-------+---------------+


+---------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width Summary                                                       ;
+--------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                          ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 4.091  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.547  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.176 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[1]                           ; 17.427 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 33.012 ; 0.000         ;
; altera_reserved_tck                                                            ; 49.483 ; 0.000         ;
; FPGA_CLK                                                                       ; 99.796 ; 0.000         ;
+--------------------------------------------------------------------------------+--------+---------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                        ;
+--------+--------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                        ; To Node                                                                                                                 ; Launch Clock                                         ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; -3.966 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 5.503      ;
; -3.869 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 5.406      ;
; -3.851 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 5.388      ;
; -3.802 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[27]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 5.339      ;
; -3.767 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.555     ; 5.314      ;
; -3.705 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[27]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 5.242      ;
; -3.686 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 5.223      ;
; -3.674 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[22]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.562     ; 5.214      ;
; -3.670 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.555     ; 5.217      ;
; -3.661 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[30]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.555     ; 5.208      ;
; -3.654 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[27]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 5.191      ;
; -3.651 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[21]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.562     ; 5.191      ;
; -3.645 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.555     ; 5.192      ;
; -3.623 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[22]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.562     ; 5.163      ;
; -3.592 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[28]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 5.129      ;
; -3.587 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[30]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.555     ; 5.134      ;
; -3.570 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[26]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 5.107      ;
; -3.561 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[23]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 5.098      ;
; -3.554 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[21]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.562     ; 5.094      ;
; -3.531 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[28]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 5.068      ;
; -3.529 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[26]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 5.066      ;
; -3.526 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[22]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.562     ; 5.066      ;
; -3.509 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[22]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.562     ; 5.049      ;
; -3.503 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[21]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.562     ; 5.043      ;
; -3.496 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[30]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.555     ; 5.043      ;
; -3.490 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[30]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.555     ; 5.037      ;
; -3.480 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.555     ; 5.027      ;
; -3.476 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[27]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 5.013      ;
; -3.464 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[23]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 5.001      ;
; -3.434 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[28]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 4.971      ;
; -3.432 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[26]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 4.969      ;
; -3.429 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.576     ; 4.955      ;
; -3.427 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[28]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 4.964      ;
; -3.422 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[25]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 4.959      ;
; -3.421 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[23]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 4.958      ;
; -3.405 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[26]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 4.942      ;
; -3.352 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.138     ; 5.316      ;
; -3.325 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[21]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.562     ; 4.865      ;
; -3.325 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[25]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 4.862      ;
; -3.324 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.143     ; 5.283      ;
; -3.313 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[1]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.561     ; 4.854      ;
; -3.299 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.576     ; 4.825      ;
; -3.291 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[24]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 4.828      ;
; -3.285 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[25]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 4.822      ;
; -3.256 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[23]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 4.793      ;
; -3.229 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[24]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 4.766      ;
; -3.222 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.138     ; 5.186      ;
; -3.204 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.175     ; 5.131      ;
; -3.183 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[1]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.561     ; 4.724      ;
; -3.171 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[18]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 4.708      ;
; -3.169 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[19]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.560     ; 4.711      ;
; -3.161 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.573     ; 4.690      ;
; -3.159 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.138     ; 5.123      ;
; -3.158 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.171     ; 5.089      ;
; -3.140 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.134     ; 5.108      ;
; -3.137 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[20]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.160     ; 5.079      ;
; -3.134 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[14]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.553     ; 4.683      ;
; -3.132 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.583     ; 4.651      ;
; -3.132 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[24]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 4.669      ;
; -3.126 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[24]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 4.663      ;
; -3.120 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[25]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 4.657      ;
; -3.117 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.139     ; 5.080      ;
; -3.107 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[18]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 4.644      ;
; -3.102 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.215     ; 4.989      ;
; -3.082 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[43] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.568     ; 4.616      ;
; -3.080 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[14]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.553     ; 4.629      ;
; -3.075 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.190     ; 4.987      ;
; -3.074 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.175     ; 5.001      ;
; -3.072 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[19]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.560     ; 4.614      ;
; -3.046 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[19]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.560     ; 4.588      ;
; -3.042 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[20]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.160     ; 4.984      ;
; -3.036 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[17]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.137     ; 5.001      ;
; -3.031 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.573     ; 4.560      ;
; -3.029 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.138     ; 4.993      ;
; -3.028 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.171     ; 4.959      ;
; -3.020 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.137     ; 4.985      ;
; -3.010 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.134     ; 4.978      ;
; -3.010 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[18]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 4.547      ;
; -3.006 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[18]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.565     ; 4.543      ;
; -3.005 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.169     ; 4.938      ;
; -3.002 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.583     ; 4.521      ;
; -2.983 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[14]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.553     ; 4.532      ;
; -2.981 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.137     ; 4.946      ;
; -2.973 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.175     ; 4.900      ;
; -2.972 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[20]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.160     ; 4.914      ;
; -2.972 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.215     ; 4.859      ;
; -2.969 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[14]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.553     ; 4.518      ;
; -2.966 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.169     ; 4.899      ;
; -2.958 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.170     ; 4.890      ;
; -2.952 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[43] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.568     ; 4.486      ;
; -2.952 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.143     ; 4.911      ;
; -2.951 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[0]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.575     ; 4.478      ;
; -2.947 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.214     ; 4.835      ;
; -2.945 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.190     ; 4.857      ;
; -2.945 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[20]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.160     ; 4.887      ;
; -2.939 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[17]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.137     ; 4.904      ;
; -2.931 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.220     ; 4.813      ;
; -2.928 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.190     ; 4.840      ;
; -2.922 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.143     ; 4.881      ;
; -2.919 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.170     ; 4.851      ;
+--------+--------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                                        ;
+--------+---------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                                                                         ; To Node                                      ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+--------+---------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; -0.499 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.179     ; 11.843     ;
; -0.471 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.179     ; 11.815     ;
; -0.290 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.182     ; 11.631     ;
; -0.282 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[8]                             ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.168     ; 11.637     ;
; -0.266 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.165     ; 11.624     ;
; -0.258 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.177     ; 11.604     ;
; -0.245 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.182     ; 11.586     ;
; -0.243 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.177     ; 11.589     ;
; -0.195 ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.168     ; 11.550     ;
; -0.184 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.177     ; 11.530     ;
; -0.184 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.165     ; 11.542     ;
; -0.159 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.165     ; 11.517     ;
; -0.151 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.177     ; 11.497     ;
; -0.150 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.179     ; 11.494     ;
; -0.135 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.180     ; 11.478     ;
; -0.116 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.160     ; 11.479     ;
; -0.109 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.166     ; 11.466     ;
; -0.108 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 11.459     ;
; -0.101 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.178     ; 11.446     ;
; -0.096 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.180     ; 11.439     ;
; -0.083 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.179     ; 11.427     ;
; -0.071 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.165     ; 11.429     ;
; -0.069 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[8]                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.160     ; 11.432     ;
; -0.063 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.177     ; 11.409     ;
; -0.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[8]                             ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.180     ; 11.402     ;
; -0.056 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.170     ; 11.409     ;
; -0.049 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.165     ; 11.407     ;
; -0.044 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.170     ; 11.397     ;
; -0.034 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.180     ; 11.377     ;
; -0.032 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.180     ; 11.375     ;
; -0.024 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.178     ; 11.369     ;
; -0.001 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.166     ; 11.358     ;
; 0.019  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.167     ; 11.337     ;
; 0.020  ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.167     ; 11.336     ;
; 0.031  ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 11.321     ;
; 0.042  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.180     ; 11.301     ;
; 0.075  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.180     ; 11.268     ;
; 0.076  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.182     ; 11.265     ;
; 0.104  ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.167     ; 11.252     ;
; 0.109  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.167     ; 11.247     ;
; 0.117  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.178     ; 11.228     ;
; 0.118  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.175     ; 11.230     ;
; 0.121  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.178     ; 11.224     ;
; 0.125  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.181     ; 11.217     ;
; 0.126  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.182     ; 11.215     ;
; 0.130  ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.179     ; 11.214     ;
; 0.133  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.165     ; 11.225     ;
; 0.139  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.179     ; 11.205     ;
; 0.141  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.177     ; 11.205     ;
; 0.148  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.177     ; 11.198     ;
; 0.152  ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[8]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.182     ; 11.189     ;
; 0.154  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[8]                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 11.197     ;
; 0.163  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.180     ; 11.180     ;
; 0.166  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|CartLogic:emu_cart|oss_bank[1]                       ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.189     ; 11.168     ;
; 0.169  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.168     ; 11.186     ;
; 0.170  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[8]                             ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.180     ; 11.173     ;
; 0.175  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|CartLogic:emu_cart|oss_bank[0]                       ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.189     ; 11.159     ;
; 0.180  ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.169     ; 11.174     ;
; 0.185  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.181     ; 11.157     ;
; 0.186  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[8]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.182     ; 11.155     ;
; 0.186  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.177     ; 11.160     ;
; 0.188  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[11]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.165     ; 11.170     ;
; 0.191  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.178     ; 11.154     ;
; 0.200  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.168     ; 11.155     ;
; 0.209  ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[22]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.189     ; 11.125     ;
; 0.219  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[14]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.177     ; 11.127     ;
; 0.224  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.178     ; 11.121     ;
; 0.225  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.180     ; 11.118     ;
; 0.232  ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.159     ; 11.132     ;
; 0.232  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.165     ; 11.126     ;
; 0.240  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 11.111     ;
; 0.242  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[14]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.165     ; 11.116     ;
; 0.243  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.168     ; 11.112     ;
; 0.257  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[9]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.180     ; 11.086     ;
; 0.260  ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[9]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.180     ; 11.083     ;
; 0.263  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.160     ; 11.100     ;
; 0.267  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.173     ; 11.083     ;
; 0.268  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.177     ; 11.078     ;
; 0.274  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.179     ; 11.070     ;
; 0.276  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.165     ; 11.082     ;
; 0.276  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.168     ; 11.079     ;
; 0.277  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.170     ; 11.076     ;
; 0.281  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.180     ; 11.062     ;
; 0.289  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[12]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.165     ; 11.069     ;
; 0.293  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.177     ; 11.053     ;
; 0.295  ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.156     ; 11.072     ;
; 0.300  ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[21]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.189     ; 11.034     ;
; 0.306  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.165     ; 11.052     ;
; 0.312  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.178     ; 11.033     ;
; 0.319  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.163     ; 11.041     ;
; 0.326  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.169     ; 11.028     ;
; 0.336  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 11.015     ;
; 0.339  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.165     ; 11.019     ;
; 0.340  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.167     ; 11.016     ;
; 0.340  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.179     ; 11.004     ;
; 0.343  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.178     ; 11.002     ;
; 0.345  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[9]                             ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.167     ; 11.011     ;
; 0.349  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[9]                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.160     ; 11.014     ;
; 0.350  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[8]                             ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 11.002     ;
; 0.351  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.170     ; 11.002     ;
+--------+---------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                                                  ;
+-------+-------------------------+-------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node               ; To Node           ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------+-------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 4.171 ; svideo_yout_dly2[5]     ; cvbs2_out[1]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 4.369      ;
; 4.177 ; svideo_yout_dly2[6]     ; cvbs2_out[1]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 4.363      ;
; 4.190 ; svideo_yout_dly2[5]     ; cvbs2_out[0]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 4.350      ;
; 4.196 ; svideo_yout_dly2[6]     ; cvbs2_out[0]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 4.344      ;
; 4.238 ; svideo_yout_dly2[5]     ; cvbs2_out[3]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 4.302      ;
; 4.244 ; svideo_yout_dly2[6]     ; cvbs2_out[3]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 4.296      ;
; 4.330 ; svideo_yout_dly2[5]     ; cvbs2_out[2]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 4.210      ;
; 4.336 ; svideo_yout_dly2[6]     ; cvbs2_out[2]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 4.204      ;
; 4.388 ; svideo_yout_dly2[5]     ; cvbs2_out[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 4.150      ;
; 4.394 ; svideo_yout_dly2[6]     ; cvbs2_out[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 4.144      ;
; 4.450 ; svideo_yout_dly2[5]     ; cvbs2_out[4]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 4.089      ;
; 4.456 ; svideo_yout_dly2[6]     ; cvbs2_out[4]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 4.083      ;
; 4.478 ; svideo_yout_dly2[4]     ; cvbs2_out[1]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 4.062      ;
; 4.497 ; svideo_yout_dly2[4]     ; cvbs2_out[0]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 4.043      ;
; 4.500 ; svideo_yout_dly2[7]     ; cvbs2_out[1]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 4.040      ;
; 4.516 ; svideo_yout_dly2[7]     ; cvbs2_out[0]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 4.024      ;
; 4.545 ; svideo_yout_dly2[4]     ; cvbs2_out[3]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 3.995      ;
; 4.552 ; svideo_yout_dly2[7]     ; cvbs2_out[3]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 3.988      ;
; 4.606 ; svideo_yout_dly2[5]     ; cvbs2_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 3.932      ;
; 4.612 ; svideo_yout_dly2[6]     ; cvbs2_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 3.926      ;
; 4.637 ; svideo_yout_dly2[4]     ; cvbs2_out[2]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 3.903      ;
; 4.639 ; svideo_yout_dly2[7]     ; cvbs2_out[2]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 3.901      ;
; 4.645 ; svideo_yout_dly2[5]     ; cvbs2_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.072     ; 3.896      ;
; 4.651 ; svideo_yout_dly2[6]     ; cvbs2_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.072     ; 3.890      ;
; 4.695 ; svideo_yout_dly2[4]     ; cvbs2_out[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 3.843      ;
; 4.708 ; svideo_yout_dly2[3]     ; cvbs2_out[1]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 3.832      ;
; 4.727 ; svideo_yout_dly2[3]     ; cvbs2_out[0]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 3.813      ;
; 4.743 ; svideo_yout_dly2[7]     ; cvbs2_out[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 3.795      ;
; 4.755 ; svideo_yout_dly2[2]     ; cvbs2_out[1]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 3.785      ;
; 4.757 ; svideo_yout_dly2[4]     ; cvbs2_out[4]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 3.782      ;
; 4.771 ; svideo_yout_dly2[2]     ; cvbs2_out[0]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 3.769      ;
; 4.775 ; svideo_yout_dly2[3]     ; cvbs2_out[3]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 3.765      ;
; 4.778 ; svideo_yout_dly2[7]     ; cvbs2_out[4]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 3.761      ;
; 4.789 ; svideo_yout_dly2[1]     ; cvbs2_out[1]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 3.751      ;
; 4.807 ; svideo_yout_dly2[2]     ; cvbs2_out[3]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 3.733      ;
; 4.808 ; svideo_yout_dly2[1]     ; cvbs2_out[0]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 3.732      ;
; 4.856 ; svideo_yout_dly2[1]     ; cvbs2_out[3]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 3.684      ;
; 4.867 ; svideo_yout_dly2[3]     ; cvbs2_out[2]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 3.673      ;
; 4.894 ; svideo_yout_dly2[2]     ; cvbs2_out[2]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 3.646      ;
; 4.913 ; svideo_yout_dly2[4]     ; cvbs2_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 3.625      ;
; 4.925 ; svideo_yout_dly2[3]     ; cvbs2_out[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 3.613      ;
; 4.948 ; svideo_yout_dly2[1]     ; cvbs2_out[2]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 3.592      ;
; 4.952 ; svideo_yout_dly2[4]     ; cvbs2_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.072     ; 3.589      ;
; 4.959 ; svideo_yout_dly2[7]     ; cvbs2_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 3.579      ;
; 4.987 ; svideo_yout_dly2[3]     ; cvbs2_out[4]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 3.552      ;
; 4.996 ; svideo_yout_dly2[2]     ; cvbs2_out[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 3.542      ;
; 5.005 ; svideo_yout_dly2[7]     ; cvbs2_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.072     ; 3.536      ;
; 5.006 ; svideo_yout_dly2[1]     ; cvbs2_out[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 3.532      ;
; 5.033 ; svideo_yout_dly2[2]     ; cvbs2_out[4]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 3.506      ;
; 5.068 ; svideo_yout_dly2[1]     ; cvbs2_out[4]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 3.471      ;
; 5.110 ; svideo_yout_dly2[0]     ; cvbs2_out[1]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 3.430      ;
; 5.126 ; svideo_yout_dly2[0]     ; cvbs2_out[0]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 3.414      ;
; 5.143 ; svideo_yout_dly2[3]     ; cvbs2_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 3.395      ;
; 5.162 ; svideo_yout_dly2[0]     ; cvbs2_out[3]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 3.378      ;
; 5.182 ; svideo_yout_dly2[3]     ; cvbs2_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.072     ; 3.359      ;
; 5.214 ; svideo_yout_dly2[2]     ; cvbs2_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 3.324      ;
; 5.224 ; svideo_yout_dly2[1]     ; cvbs2_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 3.314      ;
; 5.249 ; svideo_yout_dly2[0]     ; cvbs2_out[2]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.073     ; 3.291      ;
; 5.253 ; svideo_yout_dly2[2]     ; cvbs2_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.072     ; 3.288      ;
; 5.263 ; svideo_yout_dly2[1]     ; cvbs2_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.072     ; 3.278      ;
; 5.347 ; svideo:svideo|chroma[2] ; cvbs1_out[9]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 3.200      ;
; 5.353 ; svideo_yout_dly2[0]     ; cvbs2_out[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 3.185      ;
; 5.365 ; svideo:svideo|chroma[4] ; cvbs1_out[9]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 3.182      ;
; 5.388 ; svideo_yout_dly2[0]     ; cvbs2_out[4]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.074     ; 3.151      ;
; 5.407 ; cvbs1_out[2]            ; cvbs2_out[0]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.070     ; 3.136      ;
; 5.417 ; cvbs1_out[3]            ; cvbs2_out[1]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.070     ; 3.126      ;
; 5.452 ; svideo:svideo|chroma[2] ; cvbs1_out[8]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 3.095      ;
; 5.477 ; cvbs1_out[5]            ; cvbs2_out[3]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.070     ; 3.066      ;
; 5.479 ; svideo:svideo|chroma[2] ; cvbs1_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 3.068      ;
; 5.497 ; svideo:svideo|chroma[4] ; cvbs1_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 3.050      ;
; 5.506 ; svideo:svideo|chroma[4] ; cvbs1_out[8]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 3.041      ;
; 5.536 ; svideo:svideo|chroma[5] ; cvbs1_out[8]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 3.011      ;
; 5.545 ; cvbs1_out[4]            ; cvbs2_out[2]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.070     ; 2.998      ;
; 5.555 ; svideo:svideo|chroma[5] ; cvbs1_out[9]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.992      ;
; 5.569 ; svideo_yout_dly2[0]     ; cvbs2_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.075     ; 2.969      ;
; 5.579 ; svideo:svideo|chroma[0] ; cvbs1_out[9]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.968      ;
; 5.584 ; svideo:svideo|chroma[2] ; cvbs1_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.963      ;
; 5.608 ; svideo:svideo|chroma[1] ; cvbs1_out[8]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.939      ;
; 5.611 ; svideo:svideo|chroma[2] ; cvbs1_out[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.936      ;
; 5.614 ; svideo_yout_dly2[0]     ; cvbs2_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.072     ; 2.927      ;
; 5.627 ; svideo:svideo|chroma[1] ; cvbs1_out[9]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.920      ;
; 5.629 ; svideo:svideo|chroma[4] ; cvbs1_out[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.918      ;
; 5.632 ; svideo:svideo|chroma[7] ; cvbs1_out[8]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.915      ;
; 5.638 ; svideo:svideo|chroma[4] ; cvbs1_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.909      ;
; 5.651 ; svideo:svideo|chroma[7] ; cvbs1_out[9]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.896      ;
; 5.668 ; svideo:svideo|chroma[5] ; cvbs1_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.879      ;
; 5.687 ; svideo:svideo|chroma[5] ; cvbs1_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.860      ;
; 5.711 ; svideo:svideo|chroma[6] ; cvbs1_out[9]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.836      ;
; 5.711 ; svideo:svideo|chroma[0] ; cvbs1_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.836      ;
; 5.713 ; svideo:svideo|chroma[0] ; cvbs1_out[8]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.834      ;
; 5.716 ; svideo:svideo|chroma[2] ; cvbs1_out[4]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.831      ;
; 5.730 ; svideo:svideo|luma[1]   ; luma_saturated[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.176     ; 2.822      ;
; 5.739 ; svideo:svideo|luma[1]   ; luma_saturated[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.176     ; 2.813      ;
; 5.740 ; svideo:svideo|chroma[1] ; cvbs1_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.807      ;
; 5.743 ; svideo:svideo|chroma[2] ; cvbs1_out[3]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.804      ;
; 5.759 ; svideo:svideo|chroma[1] ; cvbs1_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.788      ;
; 5.768 ; svideo:svideo|chroma[3] ; cvbs1_out[8]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.779      ;
; 5.787 ; svideo:svideo|chroma[3] ; cvbs1_out[9]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.760      ;
; 5.811 ; svideo:svideo|chroma[6] ; cvbs1_out[8]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.736      ;
; 5.843 ; svideo:svideo|chroma[6] ; cvbs1_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.181     ; 2.704      ;
+-------+-------------------------+-------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                ;
+--------+-----------------------------------------------+----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                     ; To Node                                            ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------+----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 26.002 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.078     ; 7.241      ;
; 26.002 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.078     ; 7.241      ;
; 26.036 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.077     ; 7.208      ;
; 26.036 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.077     ; 7.208      ;
; 26.272 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.078     ; 6.971      ;
; 26.272 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.078     ; 6.971      ;
; 26.306 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.077     ; 6.938      ;
; 26.306 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.077     ; 6.938      ;
; 26.353 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.077     ; 6.891      ;
; 26.353 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.077     ; 6.891      ;
; 26.425 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.078     ; 6.818      ;
; 26.425 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.078     ; 6.818      ;
; 26.454 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.141     ; 6.726      ;
; 26.454 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.141     ; 6.726      ;
; 26.485 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.141     ; 6.695      ;
; 26.485 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.141     ; 6.695      ;
; 26.521 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.078     ; 6.722      ;
; 26.521 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.078     ; 6.722      ;
; 26.555 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.077     ; 6.689      ;
; 26.555 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.077     ; 6.689      ;
; 26.576 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.081     ; 6.664      ;
; 26.587 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.077     ; 6.657      ;
; 26.587 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.077     ; 6.657      ;
; 26.610 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.080     ; 6.631      ;
; 26.623 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.077     ; 6.621      ;
; 26.623 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.077     ; 6.621      ;
; 26.695 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.078     ; 6.548      ;
; 26.695 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.078     ; 6.548      ;
; 26.732 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.077     ; 6.512      ;
; 26.732 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.077     ; 6.512      ;
; 26.768 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.141     ; 6.412      ;
; 26.768 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.141     ; 6.412      ;
; 26.799 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.141     ; 6.381      ;
; 26.799 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.141     ; 6.381      ;
; 26.821 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.142     ; 6.358      ;
; 26.821 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.142     ; 6.358      ;
; 26.852 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.142     ; 6.327      ;
; 26.852 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.142     ; 6.327      ;
; 26.857 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.077     ; 6.387      ;
; 26.857 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.077     ; 6.387      ;
; 26.872 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.077     ; 6.372      ;
; 26.872 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.077     ; 6.372      ;
; 26.888 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.351      ;
; 26.891 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.348      ;
; 26.926 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[4]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.137     ; 6.258      ;
; 26.927 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.080     ; 6.314      ;
; 26.927 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[14]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.137     ; 6.257      ;
; 26.928 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.137     ; 6.256      ;
; 26.932 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[10]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.307      ;
; 26.933 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.306      ;
; 26.936 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.078     ; 6.307      ;
; 26.936 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.078     ; 6.307      ;
; 26.937 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.302      ;
; 26.938 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.301      ;
; 26.944 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.078     ; 6.299      ;
; 26.944 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.078     ; 6.299      ;
; 26.978 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[5]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.137     ; 6.206      ;
; 26.979 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[9]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.137     ; 6.205      ;
; 26.979 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[10]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.137     ; 6.205      ;
; 26.981 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[11]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.137     ; 6.203      ;
; 26.981 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[12]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.137     ; 6.203      ;
; 26.999 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.081     ; 6.241      ;
; 27.002 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.077     ; 6.242      ;
; 27.002 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.077     ; 6.242      ;
; 27.051 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.078     ; 6.192      ;
; 27.051 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.078     ; 6.192      ;
; 27.095 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[4]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.136     ; 6.090      ;
; 27.096 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[14]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.136     ; 6.089      ;
; 27.097 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.136     ; 6.088      ;
; 27.099 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.141     ; 6.081      ;
; 27.099 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.141     ; 6.081      ;
; 27.106 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.077     ; 6.138      ;
; 27.106 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.077     ; 6.138      ;
; 27.130 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.141     ; 6.050      ;
; 27.130 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.141     ; 6.050      ;
; 27.147 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[5]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.136     ; 6.038      ;
; 27.148 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[9]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.136     ; 6.037      ;
; 27.148 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[10]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.136     ; 6.037      ;
; 27.150 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[11]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.136     ; 6.035      ;
; 27.150 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[12]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.136     ; 6.035      ;
; 27.158 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.081      ;
; 27.158 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.083     ; 6.080      ;
; 27.160 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.083     ; 6.078      ;
; 27.161 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.080     ; 6.080      ;
; 27.161 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.078      ;
; 27.188 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.051      ;
; 27.191 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.048      ;
; 27.201 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid_c ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.137     ; 5.983      ;
; 27.202 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[10]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.037      ;
; 27.203 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.036      ;
; 27.207 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.032      ;
; 27.208 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.031      ;
; 27.209 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.083     ; 6.029      ;
; 27.209 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[10]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.083     ; 6.029      ;
; 27.212 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.083     ; 6.026      ;
; 27.213 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.083     ; 6.025      ;
; 27.215 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[2]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.024      ;
; 27.216 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[7]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.023      ;
; 27.219 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[12]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.020      ;
; 27.220 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[9]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.019      ;
+--------+-----------------------------------------------+----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                     ;
+--------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                                                                                                                                        ; To Node                                                                                                                                                                                                               ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+--------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 45.803 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                              ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.181      ; 4.376      ;
; 45.875 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.185      ; 4.308      ;
; 46.130 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                   ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.185      ; 4.053      ;
; 46.243 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.183      ; 3.938      ;
; 46.261 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.185      ; 3.922      ;
; 46.334 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.183      ; 3.847      ;
; 46.433 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                              ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.179      ; 3.744      ;
; 46.493 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[3]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.183      ; 3.688      ;
; 46.540 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.179      ; 3.637      ;
; 46.612 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                   ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.179      ; 3.565      ;
; 46.702 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.180      ; 3.476      ;
; 46.841 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.178      ; 3.335      ;
; 46.889 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.185      ; 3.294      ;
; 46.894 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.180      ; 3.284      ;
; 46.982 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.176      ; 3.192      ;
; 47.026 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|design_hash_reg[0]                                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.174      ; 3.146      ;
; 47.115 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.183      ; 3.066      ;
; 47.124 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.180      ; 3.054      ;
; 47.206 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.184      ; 2.976      ;
; 47.215 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.180      ; 2.963      ;
; 47.358 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[0]                                                                                                                               ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.175      ; 2.815      ;
; 47.702 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.181      ; 2.477      ;
; 47.724 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[0]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.175      ; 2.449      ;
; 48.215 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo_bypass_reg                                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.180      ; 1.963      ;
; 95.233 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 4.699      ;
; 95.233 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 4.699      ;
; 95.233 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 4.699      ;
; 95.233 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 4.699      ;
; 95.233 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 4.699      ;
; 95.233 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 4.699      ;
; 95.233 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 4.699      ;
; 95.233 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 4.699      ;
; 95.233 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 4.699      ;
; 95.297 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.351     ; 4.350      ;
; 95.300 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.351     ; 4.347      ;
; 95.324 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.351     ; 4.323      ;
; 95.333 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.351     ; 4.314      ;
; 95.343 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.351     ; 4.304      ;
; 95.420 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.072     ; 4.506      ;
; 95.420 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.072     ; 4.506      ;
; 95.420 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.072     ; 4.506      ;
; 95.420 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.072     ; 4.506      ;
; 95.420 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.072     ; 4.506      ;
; 95.420 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.072     ; 4.506      ;
; 95.420 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.072     ; 4.506      ;
; 95.420 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.072     ; 4.506      ;
; 95.442 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.351     ; 4.205      ;
; 95.470 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.351     ; 4.177      ;
; 95.491 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.351     ; 4.156      ;
; 95.511 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.355     ; 4.132      ;
; 95.520 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.355     ; 4.123      ;
; 95.523 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 4.409      ;
; 95.539 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.355     ; 4.104      ;
; 95.546 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.355     ; 4.097      ;
; 95.546 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.355     ; 4.097      ;
; 95.548 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.355     ; 4.095      ;
; 95.616 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.355     ; 4.027      ;
; 95.666 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.355     ; 3.977      ;
; 95.675 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[3]                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.065     ; 4.258      ;
; 95.675 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[2]                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.065     ; 4.258      ;
; 95.675 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[1]                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.065     ; 4.258      ;
; 95.675 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[0]                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.065     ; 4.258      ;
; 95.689 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 4.234      ;
; 95.689 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 4.234      ;
; 95.689 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][3]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 4.234      ;
; 95.689 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 4.234      ;
; 95.689 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 4.234      ;
; 95.787 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.070     ; 4.141      ;
; 95.787 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.070     ; 4.141      ;
; 95.787 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.070     ; 4.141      ;
; 95.787 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.070     ; 4.141      ;
; 95.787 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.070     ; 4.141      ;
; 95.822 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.070     ; 4.106      ;
; 95.822 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.070     ; 4.106      ;
; 95.822 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.070     ; 4.106      ;
; 95.822 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.070     ; 4.106      ;
; 95.822 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.070     ; 4.106      ;
; 95.822 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.070     ; 4.106      ;
; 95.822 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.070     ; 4.106      ;
; 95.822 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.070     ; 4.106      ;
; 95.881 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[3]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.071     ; 4.046      ;
; 95.881 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[3]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.071     ; 4.046      ;
; 95.881 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[3]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.071     ; 4.046      ;
; 95.881 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[3]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.071     ; 4.046      ;
; 95.881 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[3]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.071     ; 4.046      ;
; 95.885 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.076     ; 4.037      ;
; 95.885 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.076     ; 4.037      ;
; 95.885 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.076     ; 4.037      ;
; 95.885 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.076     ; 4.037      ;
; 95.885 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.076     ; 4.037      ;
; 95.889 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.071     ; 4.038      ;
; 95.889 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.071     ; 4.038      ;
; 95.889 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.071     ; 4.038      ;
; 95.889 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.071     ; 4.038      ;
; 95.899 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.032      ;
; 95.899 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.032      ;
; 95.899 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.032      ;
; 95.899 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 4.032      ;
; 95.901 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[2]                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.065     ; 4.032      ;
; 95.901 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[1]                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.065     ; 4.032      ;
+--------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                   ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                                                       ; To Node                                                                                                                                                                                                                                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.339 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizep0_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.436      ; 0.997      ;
; 0.344 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[3]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.435      ; 1.001      ;
; 0.346 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[6]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.435      ; 1.003      ;
; 0.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.436      ; 1.006      ;
; 0.349 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[4]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.435      ; 1.006      ;
; 0.355 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.436      ; 1.013      ;
; 0.356 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.010      ;
; 0.357 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.436      ; 1.015      ;
; 0.358 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.011      ;
; 0.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.436      ; 1.017      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[5]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.017      ;
; 0.364 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.019      ;
; 0.364 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[5]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.435      ; 1.021      ;
; 0.364 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[2]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.435      ; 1.021      ;
; 0.365 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.020      ;
; 0.366 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.020      ;
; 0.369 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.023      ;
; 0.369 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[7]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.435      ; 1.026      ;
; 0.370 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.025      ;
; 0.373 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.028      ;
; 0.373 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.028      ;
; 0.374 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.029      ;
; 0.375 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[1]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.435      ; 1.032      ;
; 0.377 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.031      ;
; 0.378 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.436      ; 1.036      ;
; 0.380 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.035      ;
; 0.380 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.035      ;
; 0.382 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp2_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.037      ;
; 0.385 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~portb_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 1.035      ;
; 0.385 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.427      ; 1.034      ;
; 0.386 ; svideo:svideo|ampl_U[7]                                                                                                                                                                                         ; svideo:svideo|sin_cos:tab_inst|sin_rom:sin_inst|altsyncram:altsyncram_component|altsyncram_r842:auto_generated|ram_block1a0~porta_address_reg0                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.039      ;
; 0.389 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.043      ;
; 0.390 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.044      ;
; 0.391 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.046      ;
; 0.391 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|cntr_pqf:cntr1|counter_reg_bit[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~portb_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.427      ; 1.040      ;
; 0.391 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|cntr_pqf:cntr1|counter_reg_bit[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.426      ; 1.039      ;
; 0.392 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~portb_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 1.042      ;
; 0.392 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.427      ; 1.041      ;
; 0.392 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.047      ;
; 0.393 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.047      ;
; 0.393 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[5]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.048      ;
; 0.394 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~portb_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 1.044      ;
; 0.394 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.427      ; 1.043      ;
; 0.395 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.050      ;
; 0.396 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|last_line_of_instruction_reg                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|last_line_of_instruction_reg                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.087      ; 0.669      ;
; 0.396 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wsync_reg                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wsync_reg                                                                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.087      ; 0.669      ;
; 0.397 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.052      ;
; 0.399 ; svideo:svideo|ampl_U[2]                                                                                                                                                                                         ; svideo:svideo|sin_cos:tab_inst|sin_rom:sin_inst|altsyncram:altsyncram_component|altsyncram_r842:auto_generated|ram_block1a3~porta_address_reg0                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.052      ;
; 0.400 ; svideo:svideo|ampl_U[7]                                                                                                                                                                                         ; svideo:svideo|sin_cos:tab_inst|sin_rom:sin_inst|altsyncram:altsyncram_component|altsyncram_r842:auto_generated|ram_block1a3~porta_address_reg0                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.053      ;
; 0.400 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[5]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.054      ;
; 0.400 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.055      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.057      ;
; 0.403 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|cntr_pqf:cntr1|counter_reg_bit[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~portb_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.427      ; 1.052      ;
; 0.403 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|cntr_pqf:cntr1|counter_reg_bit[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.426      ; 1.051      ;
; 0.404 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.059      ;
; 0.407 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[5]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.062      ;
; 0.407 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.062      ;
; 0.408 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp2_raw_reg[5]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 1.060      ;
; 0.409 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.064      ;
; 0.410 ; svideo:svideo|ampl_U[3]                                                                                                                                                                                         ; svideo:svideo|sin_cos:tab_inst|sin_rom:sin_inst|altsyncram:altsyncram_component|altsyncram_r842:auto_generated|ram_block1a0~porta_address_reg0                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.063      ;
; 0.411 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|irqb_reg[1]                                                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|irqb_reg[1]                                                                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.411 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[1]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[1]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.411 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0]                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0]                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.411 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[0]                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[0]                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.411 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_clock_reg                                                                                                                                           ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_clock_reg                                                                                                                                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.411 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|twotone_reg                                                                                                                                                ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|twotone_reg                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.411 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|keyboard_overrun_reg                                                                                                                                       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|keyboard_overrun_reg                                                                                                                                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.411 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[0]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[0]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.411 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[1]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[1]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.411 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[2]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[2]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.411 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[5]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.065      ;
; 0.411 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.065      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[15]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[15]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[26]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[26]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[1]                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[1]                                                                                                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[24]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[24]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[19]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[19]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[21]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[21]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[27]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[27]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[30]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[30]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[29]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[29]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[14]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[14]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[12]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[12]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[25]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[25]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[17]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[17]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[22]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[22]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[2]                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[2]                                                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[6]                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[6]                                                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[3]                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[3]                                                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[0]                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[0]                                                                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[2]                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[2]                                                                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[3]                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[3]                                                                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[0]                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[0]                                                                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[1]                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[1]                                                                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf1_reg[0]                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf1_reg[0]                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf1_reg[2]                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf1_reg[2]                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf1_reg[1]                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf1_reg[1]                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf1_reg[3]                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf1_reg[3]                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf1_reg[5]                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf1_reg[5]                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf1_reg[7]                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf1_reg[7]                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                                                             ;
+-------+---------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                 ; To Node                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.352 ; svideo:svideo|luma[3]     ; svideo:svideo|luma_1[3]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.160      ; 0.718      ;
; 0.352 ; svideo:svideo|luma[7]     ; svideo:svideo|luma_1[7]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.160      ; 0.718      ;
; 0.352 ; svideo:svideo|luma[8]     ; svideo:svideo|luma_1[8]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.160      ; 0.718      ;
; 0.441 ; svideo_yout_dly1[1]       ; svideo_yout_dly2[1]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.696      ;
; 0.442 ; svideo_yout_dly1[4]       ; svideo_yout_dly2[4]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.697      ;
; 0.442 ; svideo:svideo|luma_acc[7] ; svideo_yout_dly1[5]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.697      ;
; 0.596 ; svideo:svideo|luma_2[9]   ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.851      ;
; 0.603 ; svideo:svideo|luma_acc[3] ; svideo_yout_dly1[1]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.859      ;
; 0.604 ; svideo:svideo|luma_acc[9] ; svideo_yout_dly1[7]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.860      ;
; 0.606 ; svideo:svideo|luma_1[8]   ; svideo:svideo|luma_2[8]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.862      ;
; 0.606 ; svideo_yout_dly1[5]       ; svideo_yout_dly2[5]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.862      ;
; 0.611 ; svideo_yout_dly1[3]       ; svideo_yout_dly2[3]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.866      ;
; 0.611 ; svideo_yout_dly1[2]       ; svideo_yout_dly2[2]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.866      ;
; 0.611 ; svideo_yout_dly1[0]       ; svideo_yout_dly2[0]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.866      ;
; 0.613 ; svideo_yout_dly1[7]       ; svideo_yout_dly2[7]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.868      ;
; 0.614 ; svideo:svideo|luma_acc[8] ; svideo_yout_dly1[6]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.869      ;
; 0.631 ; svideo:svideo|luma_1[1]   ; svideo:svideo|luma_2[1]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.887      ;
; 0.631 ; svideo:svideo|luma_acc[4] ; svideo_yout_dly1[2]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.887      ;
; 0.631 ; svideo:svideo|luma_acc[6] ; svideo_yout_dly1[4]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.887      ;
; 0.632 ; svideo:svideo|luma_1[3]   ; svideo:svideo|luma_2[3]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.888      ;
; 0.634 ; svideo:svideo|luma_1[7]   ; svideo:svideo|luma_2[7]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.890      ;
; 0.648 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.903      ;
; 0.652 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.907      ;
; 0.653 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.908      ;
; 0.665 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.920      ;
; 0.758 ; svideo:svideo|luma[7]     ; luma_saturated[7]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.159      ; 1.123      ;
; 0.769 ; svideo:svideo|luma[3]     ; luma_saturated[3]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.159      ; 1.134      ;
; 0.775 ; svideo:svideo|luma_acc[5] ; svideo_yout_dly1[3]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.031      ;
; 0.776 ; svideo:svideo|luma_1[2]   ; svideo:svideo|luma_2[2]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.032      ;
; 0.805 ; luma_saturated[8]         ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.068      ; 1.059      ;
; 0.808 ; luma_saturated[3]         ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.068      ; 1.062      ;
; 0.811 ; svideo:svideo|luma_acc[2] ; svideo_yout_dly1[0]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.067      ;
; 0.812 ; svideo:svideo|luma_2[3]   ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.067      ;
; 0.813 ; luma_saturated[4]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.068      ; 1.067      ;
; 0.815 ; svideo_yout_dly1[6]       ; svideo_yout_dly2[6]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.071      ;
; 0.816 ; svideo:svideo|luma_2[1]   ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.071      ;
; 0.817 ; luma_saturated[9]         ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.068      ; 1.071      ;
; 0.826 ; svideo:svideo|luma_2[0]   ; svideo:svideo|luma_acc[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.081      ;
; 0.827 ; svideo:svideo|luma_1[9]   ; svideo:svideo|luma_2[9]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.083      ;
; 0.835 ; svideo:svideo|luma_1[5]   ; svideo:svideo|luma_2[5]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.091      ;
; 0.838 ; svideo:svideo|luma_1[0]   ; svideo:svideo|luma_2[0]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.094      ;
; 0.847 ; luma_saturated[2]         ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.068      ; 1.101      ;
; 0.849 ; luma_saturated[6]         ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.068      ; 1.103      ;
; 0.852 ; luma_saturated[7]         ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.068      ; 1.106      ;
; 0.854 ; svideo:svideo|luma_2[7]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.109      ;
; 0.855 ; svideo:svideo|luma_2[5]   ; svideo:svideo|luma_acc[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.110      ;
; 0.857 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.112      ;
; 0.863 ; svideo:svideo|luma_2[8]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.118      ;
; 0.936 ; svideo:svideo|luma[0]     ; luma_saturated[0]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.165      ; 1.307      ;
; 0.964 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.219      ;
; 0.975 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.230      ;
; 0.979 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.234      ;
; 0.980 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.235      ;
; 0.980 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.235      ;
; 0.984 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.239      ;
; 0.985 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.240      ;
; 0.989 ; svideo:svideo|luma[5]     ; svideo:svideo|luma_1[5]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.165      ; 1.360      ;
; 0.992 ; svideo:svideo|luma[8]     ; luma_saturated[8]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.159      ; 1.357      ;
; 0.994 ; svideo:svideo|luma[0]     ; svideo:svideo|luma_1[0]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.165      ; 1.365      ;
; 0.994 ; svideo:svideo|luma_1[4]   ; svideo:svideo|luma_2[4]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.250      ;
; 0.994 ; svideo:svideo|luma_1[6]   ; svideo:svideo|luma_2[6]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.250      ;
; 0.997 ; svideo:svideo|luma[4]     ; svideo:svideo|luma_1[4]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.165      ; 1.368      ;
; 1.025 ; svideo:svideo|luma[4]     ; luma_saturated[4]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.165      ; 1.396      ;
; 1.025 ; svideo:svideo|luma[5]     ; luma_saturated[5]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.165      ; 1.396      ;
; 1.027 ; svideo:svideo|luma[6]     ; luma_saturated[6]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.165      ; 1.398      ;
; 1.044 ; svideo:svideo|luma[0]     ; luma_saturated[1]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.165      ; 1.415      ;
; 1.044 ; svideo:svideo|luma[2]     ; svideo:svideo|luma_1[2]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.166      ; 1.416      ;
; 1.060 ; svideo:svideo|luma[2]     ; luma_saturated[2]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.165      ; 1.431      ;
; 1.085 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.340      ;
; 1.087 ; svideo:svideo|luma[7]     ; luma_saturated[8]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.159      ; 1.452      ;
; 1.090 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.345      ;
; 1.092 ; svideo:svideo|luma[7]     ; luma_saturated[9]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.159      ; 1.457      ;
; 1.096 ; svideo:svideo|luma[3]     ; luma_saturated[4]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.159      ; 1.461      ;
; 1.101 ; svideo:svideo|luma[3]     ; luma_saturated[5]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.159      ; 1.466      ;
; 1.101 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.356      ;
; 1.103 ; svideo:svideo|luma[1]     ; svideo:svideo|luma_1[1]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.166      ; 1.475      ;
; 1.105 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.360      ;
; 1.106 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.361      ;
; 1.106 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.361      ;
; 1.110 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.365      ;
; 1.122 ; luma_saturated[3]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.068      ; 1.376      ;
; 1.130 ; svideo:svideo|luma_2[1]   ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.385      ;
; 1.130 ; svideo:svideo|luma_2[3]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.385      ;
; 1.134 ; luma_saturated[8]         ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.068      ; 1.388      ;
; 1.139 ; svideo:svideo|luma_2[0]   ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.394      ;
; 1.143 ; luma_saturated[4]         ; cvbs1_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.068      ; 1.397      ;
; 1.144 ; svideo:svideo|luma_2[0]   ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.399      ;
; 1.147 ; luma_saturated[5]         ; cvbs1_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.068      ; 1.401      ;
; 1.148 ; luma_saturated[4]         ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.068      ; 1.402      ;
; 1.163 ; luma_saturated[1]         ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.068      ; 1.417      ;
; 1.168 ; luma_saturated[7]         ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.068      ; 1.422      ;
; 1.171 ; svideo:svideo|luma_2[7]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.426      ;
; 1.172 ; svideo:svideo|luma_2[5]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.427      ;
; 1.176 ; luma_saturated[2]         ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.068      ; 1.430      ;
; 1.178 ; luma_saturated[6]         ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.068      ; 1.432      ;
; 1.181 ; luma_saturated[2]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.068      ; 1.435      ;
; 1.183 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.438      ;
; 1.183 ; luma_saturated[6]         ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.068      ; 1.437      ;
; 1.184 ; luma_saturated[0]         ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.068      ; 1.438      ;
; 1.189 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.444      ;
+-------+---------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                       ;
+-------+---------------------------------------------------------------------+---------------------------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                           ; To Node                                                             ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------------+---------------------------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 0.412 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state2                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state2                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state3                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state3                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[4]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[4]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[3]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[3]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[2]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[2]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[6]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[6]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[7]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[7]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dp_previous                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dp_previous                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dm_previous                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dm_previous                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|send_frame                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|send_frame                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; cntr_reset[1]                                                       ; cntr_reset[1]                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; cntr_reset[2]                                                       ; cntr_reset[2]                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; cntr_reset[5]                                                       ; cntr_reset[5]                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; cntr_reset[6]                                                       ; cntr_reset[6]                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; reset_usbdrv                                                        ; reset_usbdrv                                                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[3]                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[3]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[2]                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[1]                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|val                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|val                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid                    ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[0]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[0]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[2]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[2]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[3]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[3]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[1]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[1]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_send_com.Idle                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_send_com.Idle                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_send_com.reset_start           ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_send_com.reset_start           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state4                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state4                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[2]                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[2]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[0]                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[0]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[5]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[5]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[0]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[0]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[1]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[1]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.getreport_sendpkt1_end  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.getreport_sendpkt1_end  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait30                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait30                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.start_get_data          ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.start_get_data          ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte2         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte2         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte8         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte8         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte9         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte9         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte10        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte10        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte11        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte11        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait40                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait40                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.send_getreport_ack_end  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.send_getreport_ack_end  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_pktin3             ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_pktin3             ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait2                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait2                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt2_end ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt2_end ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.Idle                    ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.Idle                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_for_deviceconnect  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_for_deviceconnect  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.usb_reset_state         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.usb_reset_state         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter2[1]                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter2[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter2[2]                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter2[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait1                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait1                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt3_end ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt3_end ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait6                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait6                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.send_ack_end            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.send_ack_end            ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|set_command[1]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|set_command[1]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_idle            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_idle            ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt1_end ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt1_end ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[2]                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|start_sendcom                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|start_sendcom                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[0]                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[0]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[2]                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[2]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[4]                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[4]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[5]                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[5]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[7]                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[7]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_address         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_address         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|set_command[0]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|set_command[0]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_configuration   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_configuration   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|detach_ack                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|detach_ack                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
+-------+---------------------------------------------------------------------+---------------------------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                               ;
+-------+-----------------------------------------------------------------------------------------------------------------+-------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                       ; To Node                                               ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------+-------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.413 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                                                                      ; sdram_ctrl:sdram_controller|r_init_tmr[10]            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[0]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sdram_ctrl:sdram_controller|r_init_fsm[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[1]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sdram_ctrl:sdram_controller|r_refr_act                                                                          ; sdram_ctrl:sdram_controller|r_refr_act                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sdram_ctrl:sdram_controller|r_wr_act                                                                            ; sdram_ctrl:sdram_controller|r_wr_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.414 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                           ; sdram_ctrl:sdram_controller|sdram_rdy                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sdram_ctrl:sdram_controller|r_bst_stp[0]                                                                        ; sdram_ctrl:sdram_controller|r_bst_stp[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                                                                        ; sdram_ctrl:sdram_controller|r_rd_bctr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sdram_ctrl:sdram_controller|r_rd_act                                                                            ; sdram_ctrl:sdram_controller|r_rd_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.418 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[0]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.674      ;
; 0.476 ; sdram_ctrl:sdram_controller|r_wr_act                                                                            ; sdram_ctrl:sdram_controller|r_sdram_dq_oe             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.732      ;
; 0.476 ; seq_reg[11]                                                                                                     ; sdram_ctrl:sdram_controller|r_init_fsm[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.731      ;
; 0.577 ; seq_reg[10]                                                                                                     ; seq_reg[11]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.832      ;
; 0.629 ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                                                                        ; sdram_ctrl:sdram_controller|r_wr_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.885      ;
; 0.644 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.900      ;
; 0.644 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.900      ;
; 0.644 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[21] ; ram_di_reg[5]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 1.010      ;
; 0.646 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.902      ;
; 0.647 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[6]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.903      ;
; 0.647 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[8]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.903      ;
; 0.649 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.905      ;
; 0.649 ; sdram_ctrl:sdram_controller|r_bst_stp[0]                                                                        ; sdram_ctrl:sdram_controller|r_rd_bctr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.904      ;
; 0.650 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.906      ;
; 0.650 ; sdram_ctrl:sdram_controller|r_init_tmr[9]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.906      ;
; 0.650 ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                                                                        ; sdram_ctrl:sdram_controller|r_rd_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.905      ;
; 0.655 ; seq_reg[5]                                                                                                      ; seq_reg[6]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.911      ;
; 0.657 ; seq_reg[8]                                                                                                      ; seq_reg[9]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.912      ;
; 0.657 ; seq_reg[9]                                                                                                      ; seq_reg[10]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.912      ;
; 0.662 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[1]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.918      ;
; 0.666 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[1]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.922      ;
; 0.672 ; seq_reg[2]                                                                                                      ; seq_reg[3]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.928      ;
; 0.675 ; seq_reg[10]                                                                                                     ; sdram_ctrl:sdram_controller|sdram_rdy                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.930      ;
; 0.723 ; sdram_ctrl:sdram_controller|r_rd_act                                                                            ; sdram_ctrl:sdram_controller|r_rd_bctr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.978      ;
; 0.749 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[1]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.005      ;
; 0.808 ; seq_reg[1]                                                                                                      ; seq_reg[2]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.064      ;
; 0.810 ; seq_reg[3]                                                                                                      ; seq_reg[4]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.066      ;
; 0.861 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[18] ; ram_di_reg[2]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 1.227      ;
; 0.863 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[23] ; ram_di_reg[7]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 1.229      ;
; 0.867 ; sdram_ctrl:sdram_controller|r_psel_dly[0]                                                                       ; sdram_ctrl:sdram_controller|ap1_rd_bst_act            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.121      ;
; 0.875 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[20] ; ram_di_reg[4]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 1.241      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[26] ; ram_di_reg[10]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 1.247      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[29] ; ram_di_reg[13]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 1.247      ;
; 0.889 ; sdram_request_reg                                                                                               ; sdram_ctrl:sdram_controller|r_psel[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 1.144      ;
; 0.926 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[24] ; ram_di_reg[8]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 1.294      ;
; 0.930 ; sdram_ctrl:sdram_controller|r_refr_act                                                                          ; sdram_ctrl:sdram_controller|r_rd_reg                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.186      ;
; 0.952 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[17] ; ram_di_reg[1]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 1.320      ;
; 0.962 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.218      ;
; 0.962 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.218      ;
; 0.963 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[25] ; ram_di_reg[9]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 1.331      ;
; 0.964 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.220      ;
; 0.964 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.220      ;
; 0.965 ; sdram_ctrl:sdram_controller|r_refr_act                                                                          ; sdram_ctrl:sdram_controller|r_wr_reg                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.221      ;
; 0.973 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[6]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.229      ;
; 0.975 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.231      ;
; 0.976 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.232      ;
; 0.976 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.232      ;
; 0.977 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[8]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.233      ;
; 0.978 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.234      ;
; 0.980 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.236      ;
; 0.981 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.237      ;
; 0.981 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.237      ;
; 0.981 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[10] ; ram_di_reg[10]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 1.347      ;
; 0.982 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.238      ;
; 1.018 ; sdram_ctrl:sdram_controller|r_psel[0]                                                                           ; sdram_ctrl:sdram_controller|r_psel_dly[0]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.275      ;
; 1.025 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[31] ; ram_di_reg[15]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 1.393      ;
; 1.037 ; seq_reg[7]                                                                                                      ; seq_reg[8]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 1.292      ;
; 1.043 ; seq_reg[0]                                                                                                      ; sdram_ctrl:sdram_controller|r_refr_act                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.299      ;
; 1.058 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[22] ; ram_di_reg[6]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 1.426      ;
; 1.063 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[30] ; ram_di_reg[14]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 1.431      ;
; 1.083 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[6]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.339      ;
; 1.083 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.339      ;
; 1.085 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[8]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.341      ;
; 1.088 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.344      ;
; 1.088 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.344      ;
; 1.090 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.346      ;
; 1.098 ; seq_reg[1]                                                                                                      ; sdram_ctrl:sdram_controller|r_wr_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 1.356      ;
; 1.099 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[8]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.355      ;
; 1.101 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.357      ;
; 1.102 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[6]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.358      ;
; 1.102 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.358      ;
; 1.104 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.360      ;
; 1.106 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.362      ;
; 1.107 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.363      ;
; 1.107 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.363      ;
; 1.110 ; seq_reg[5]                                                                                                      ; sdram_request_complete_reg                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.366      ;
; 1.132 ; sdram_ctrl:sdram_controller|r_refr_req                                                                          ; sdram_ctrl:sdram_controller|r_wr_reg                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 1.403      ;
; 1.135 ; sdram_ctrl:sdram_controller|r_refr_req                                                                          ; sdram_ctrl:sdram_controller|r_rd_reg                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 1.406      ;
; 1.137 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[27] ; ram_di_reg[11]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 1.505      ;
; 1.138 ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1                                                           ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.394      ;
; 1.143 ; sdram_ctrl:sdram_controller|r_rddata[1]                                                                         ; ram_do_reg[1]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.210      ; 1.539      ;
; 1.149 ; sdram_ctrl:sdram_controller|r_rddata[1]                                                                         ; ram_do_reg[9]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.210      ; 1.545      ;
; 1.156 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[21]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.164      ; 1.526      ;
; 1.157 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[29]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.164      ; 1.527      ;
; 1.157 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[20]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.164      ; 1.527      ;
; 1.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[28]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.164      ; 1.528      ;
; 1.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[24]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.164      ; 1.528      ;
; 1.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[25]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.164      ; 1.528      ;
; 1.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[16] ; ram_di_reg[0]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 1.526      ;
; 1.167 ; sdram_ctrl:sdram_controller|r_rddata[2]                                                                         ; ram_do_reg[18]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.209      ; 1.562      ;
+-------+-----------------------------------------------------------------------------------------------------------------+-------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                          ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                                                             ; To Node                                                                                                                                                                                                               ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 0.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo_bypass_reg                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo_bypass_reg                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[11]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[11]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                                                         ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                                                             ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                             ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.415 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                                                         ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.068      ; 0.669      ;
; 0.415 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.068      ; 0.669      ;
; 0.415 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                             ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.068      ; 0.669      ;
; 0.419 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.674      ;
; 0.419 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.674      ;
; 0.419 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.674      ;
; 0.431 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.686      ;
; 0.440 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.695      ;
; 0.440 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.695      ;
; 0.441 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[7]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.696      ;
; 0.441 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.696      ;
; 0.441 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.696      ;
; 0.441 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[3]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[2]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.696      ;
; 0.441 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[0]                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[0]                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.696      ;
; 0.442 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[2]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[1]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.697      ;
; 0.442 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.697      ;
; 0.442 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.697      ;
; 0.442 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[1]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[0]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.697      ;
; 0.443 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.698      ;
; 0.443 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][3]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.698      ;
; 0.443 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.698      ;
; 0.443 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[2]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[1]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.698      ;
; 0.443 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[14]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.698      ;
; 0.447 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[9]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[10]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.702      ;
; 0.447 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.702      ;
; 0.447 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[2]                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[2]                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.702      ;
; 0.448 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.703      ;
; 0.448 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.703      ;
; 0.449 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.704      ;
; 0.450 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[2]                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[1]                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.705      ;
; 0.450 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[12]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.705      ;
; 0.451 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.706      ;
; 0.452 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.707      ;
; 0.453 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.708      ;
; 0.454 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.709      ;
; 0.457 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.712      ;
; 0.457 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[7]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.712      ;
; 0.460 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.362      ; 1.044      ;
; 0.461 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.356      ; 1.039      ;
; 0.463 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.718      ;
; 0.463 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.718      ;
; 0.463 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.718      ;
; 0.464 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[2]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.719      ;
; 0.464 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.719      ;
; 0.465 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.720      ;
; 0.465 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.356      ; 1.043      ;
; 0.469 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.351      ; 1.042      ;
; 0.470 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.362      ; 1.054      ;
; 0.471 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.726      ;
; 0.473 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.356      ; 1.051      ;
; 0.473 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.362      ; 1.057      ;
; 0.482 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.356      ; 1.060      ;
; 0.482 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.358      ; 1.062      ;
; 0.489 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.362      ; 1.073      ;
; 0.490 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.358      ; 1.070      ;
; 0.492 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.358      ; 1.072      ;
; 0.493 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.351      ; 1.066      ;
; 0.494 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.749      ;
; 0.495 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.362      ; 1.079      ;
; 0.497 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.362      ; 1.081      ;
; 0.504 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.351      ; 1.077      ;
; 0.505 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.351      ; 1.078      ;
; 0.506 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.358      ; 1.086      ;
; 0.509 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.358      ; 1.089      ;
; 0.513 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.358      ; 1.093      ;
; 0.516 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.362      ; 1.100      ;
; 0.518 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.358      ; 1.098      ;
; 0.521 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.362      ; 1.105      ;
; 0.526 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.351      ; 1.099      ;
; 0.529 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.358      ; 1.109      ;
; 0.536 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.356      ; 1.114      ;
; 0.536 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.351      ; 1.109      ;
; 0.550 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.351      ; 1.123      ;
; 0.563 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.818      ;
; 0.564 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.819      ;
; 0.565 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.820      ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                      ;
+-------+---------------------------------------+----------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                             ; To Node                                                                                                                    ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------+----------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 6.778 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.194     ; 4.666      ;
; 6.780 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[14]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.171     ; 4.687      ;
; 6.786 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.183     ; 4.669      ;
; 6.789 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[5]                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.182     ; 4.667      ;
; 7.167 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[2]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.181     ; 4.290      ;
; 7.167 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[7]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.184     ; 4.287      ;
; 7.167 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[3]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.181     ; 4.290      ;
; 7.167 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[5]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.184     ; 4.287      ;
; 7.168 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[12]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.168     ; 4.302      ;
; 7.168 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[4]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.168     ; 4.302      ;
; 7.168 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[5]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.168     ; 4.302      ;
; 7.168 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|clock_reg                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.168     ; 4.302      ;
; 7.168 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|clock_sync_reg                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.168     ; 4.302      ;
; 7.168 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_clock_reg                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.168     ; 4.302      ;
; 7.168 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_clock_last_reg                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.168     ; 4.302      ;
; 7.168 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[0]                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.168     ; 4.302      ;
; 7.168 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[2]                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.168     ; 4.302      ;
; 7.168 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[1]                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.168     ; 4.302      ;
; 7.168 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[3]                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.168     ; 4.302      ;
; 7.168 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.168     ; 4.302      ;
; 7.168 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|delay_line:serout_clock_delay|shift_reg[1]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.168     ; 4.302      ;
; 7.168 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[6]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.184     ; 4.286      ;
; 7.168 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[8]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.184     ; 4.286      ;
; 7.168 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_shift_reg[9]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.168     ; 4.302      ;
; 7.168 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[2]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.168     ; 4.302      ;
; 7.168 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[0]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.168     ; 4.302      ;
; 7.168 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[1]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.168     ; 4.302      ;
; 7.168 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[2]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.168     ; 4.302      ;
; 7.168 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[3]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.168     ; 4.302      ;
; 7.168 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[4]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.168     ; 4.302      ;
; 7.168 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[5]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.168     ; 4.302      ;
; 7.168 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[6]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.168     ; 4.302      ;
; 7.168 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[7]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.168     ; 4.302      ;
; 7.168 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_reset_reg                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.168     ; 4.302      ;
; 7.168 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[0]                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.171     ; 4.299      ;
; 7.168 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[1]                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.171     ; 4.299      ;
; 7.170 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_8BIT_WRITE_ENABLE_reg                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.172     ; 4.296      ;
; 7.170 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[0]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.172     ; 4.296      ;
; 7.170 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[1]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.172     ; 4.296      ;
; 7.170 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.185     ; 4.283      ;
; 7.170 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[14]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.185     ; 4.283      ;
; 7.170 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_READ_reg                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.172     ; 4.296      ;
; 7.170 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[5]                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.171     ; 4.297      ;
; 7.170 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[4]                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.171     ; 4.297      ;
; 7.170 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[23]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.185     ; 4.283      ;
; 7.170 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[19]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.185     ; 4.283      ;
; 7.170 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[25]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.171     ; 4.297      ;
; 7.170 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.185     ; 4.283      ;
; 7.171 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[21]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.173     ; 4.294      ;
; 7.171 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[22]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.173     ; 4.294      ;
; 7.171 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[18]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.173     ; 4.294      ;
; 7.171 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[20]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.173     ; 4.294      ;
; 7.171 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.173     ; 4.294      ;
; 7.172 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[1]                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.196     ; 4.270      ;
; 7.174 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[0]                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.198     ; 4.266      ;
; 7.179 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[13]                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.178     ; 4.281      ;
; 7.179 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[7]                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.178     ; 4.281      ;
; 7.179 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[6]                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.178     ; 4.281      ;
; 7.179 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[5]                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.178     ; 4.281      ;
; 7.179 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[4]                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.178     ; 4.281      ;
; 7.179 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[3]                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.178     ; 4.281      ;
; 7.179 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[2]                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.178     ; 4.281      ;
; 7.179 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[1]                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.178     ; 4.281      ;
; 7.179 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[0]                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.178     ; 4.281      ;
; 7.179 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[16]                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.178     ; 4.281      ;
; 7.179 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[15]                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.178     ; 4.281      ;
; 7.179 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[14]                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.178     ; 4.281      ;
; 7.179 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[2]                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.187     ; 4.272      ;
; 7.180 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[0]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.178     ; 4.280      ;
; 7.180 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[1]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.178     ; 4.280      ;
; 7.180 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[0]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.178     ; 4.280      ;
; 7.180 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[1]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.178     ; 4.280      ;
; 7.180 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[2]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.178     ; 4.280      ;
; 7.180 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[3]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.178     ; 4.280      ;
; 7.180 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[4]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.178     ; 4.280      ;
; 7.180 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[5]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.178     ; 4.280      ;
; 7.180 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.178     ; 4.280      ;
; 7.180 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.178     ; 4.280      ;
; 7.180 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|key_held_reg           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.178     ; 4.280      ;
; 7.183 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[9]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; 0.212      ; 4.667      ;
; 7.183 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[11]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.186     ; 4.269      ;
; 7.184 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[12]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; 0.212      ; 4.666      ;
; 7.189 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[19]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.174     ; 4.275      ;
; 7.189 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[21]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.174     ; 4.275      ;
; 7.189 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[17]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.174     ; 4.275      ;
; 7.189 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[18]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.174     ; 4.275      ;
; 7.189 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[20]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.174     ; 4.275      ;
; 7.189 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[22]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.174     ; 4.275      ;
; 7.189 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[5]                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.158     ; 4.291      ;
; 7.189 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[4]                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.158     ; 4.291      ;
; 7.189 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[3]                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.158     ; 4.291      ;
; 7.189 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[2]                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.158     ; 4.291      ;
; 7.189 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[1]                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.158     ; 4.291      ;
; 7.189 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[0]                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.158     ; 4.291      ;
; 7.189 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[7]                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.158     ; 4.291      ;
; 7.190 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[15]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 4.287      ;
; 7.190 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[19]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 4.287      ;
; 7.190 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[21]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.158     ; 4.290      ;
; 7.190 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[21]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.158     ; 4.290      ;
; 7.190 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[21]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 4.287      ;
+-------+---------------------------------------+----------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                         ;
+-------+------------------------+----------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node              ; To Node                                      ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------+----------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 7.369 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.273     ; 3.874      ;
; 7.438 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.194     ; 3.891      ;
; 7.438 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[6]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.197     ; 3.888      ;
; 7.439 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.194     ; 3.890      ;
; 7.439 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.197     ; 3.887      ;
; 7.439 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[8]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.197     ; 3.887      ;
; 7.439 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[9]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.195     ; 3.889      ;
; 7.439 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.195     ; 3.889      ;
; 7.456 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[8]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.333     ; 3.726      ;
; 7.459 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[9]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.340     ; 3.716      ;
; 7.461 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[13]     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.334     ; 3.720      ;
; 7.461 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[14]     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.334     ; 3.720      ;
; 7.461 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[15]     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.334     ; 3.720      ;
; 7.461 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.183     ; 3.879      ;
; 7.462 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ba[0]    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.185     ; 3.876      ;
; 7.462 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ba[1]    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.185     ; 3.876      ;
; 7.462 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[0]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.185     ; 3.876      ;
; 7.462 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.185     ; 3.876      ;
; 7.462 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.182     ; 3.879      ;
; 7.462 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.182     ; 3.879      ;
; 7.462 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.185     ; 3.876      ;
; 7.463 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[12]     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.336     ; 3.716      ;
; 7.463 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[11]     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.336     ; 3.716      ;
; 7.463 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[10]     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.336     ; 3.716      ;
; 7.464 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[8]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.222     ; 3.839      ;
; 7.467 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[9]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.229     ; 3.829      ;
; 7.469 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[13] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.223     ; 3.833      ;
; 7.469 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[14] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.223     ; 3.833      ;
; 7.469 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[15] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.223     ; 3.833      ;
; 7.471 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.225     ; 3.829      ;
; 7.471 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.225     ; 3.829      ;
; 7.471 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[12] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.225     ; 3.829      ;
; 7.473 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[2]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.311     ; 3.731      ;
; 7.473 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[1]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.311     ; 3.731      ;
; 7.473 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[0]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.311     ; 3.731      ;
; 7.477 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.326     ; 3.712      ;
; 7.477 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.325     ; 3.713      ;
; 7.478 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[4]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.333     ; 3.704      ;
; 7.479 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[3]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.325     ; 3.711      ;
; 7.481 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[0]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.200     ; 3.844      ;
; 7.481 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[1]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.200     ; 3.844      ;
; 7.481 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.200     ; 3.844      ;
; 7.485 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.215     ; 3.825      ;
; 7.485 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[6]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.214     ; 3.826      ;
; 7.486 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.222     ; 3.817      ;
; 7.487 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.214     ; 3.824      ;
; 7.631 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.194     ; 3.698      ;
; 7.654 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ras_n    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 3.685      ;
; 7.654 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cas_n    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 3.685      ;
; 7.654 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_we_n     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.183     ; 3.686      ;
; 7.654 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.183     ; 3.686      ;
; 7.654 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 3.685      ;
; 7.935 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[0]    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.175     ; 3.528      ;
; 7.935 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[1]    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.175     ; 3.528      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; seq_reg[0]                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.175     ; 3.527      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; seq_reg[1]                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.174     ; 3.528      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; seq_reg[2]                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.174     ; 3.528      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; seq_reg[3]                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.174     ; 3.528      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; seq_reg[4]                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.174     ; 3.528      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; seq_reg[5]                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.174     ; 3.528      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; seq_reg[6]                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.174     ; 3.528      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; seq_reg[7]                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.174     ; 3.528      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[0]    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 3.531      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[1]    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 3.531      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[2]    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 3.531      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[3]    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 3.531      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[4]    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 3.531      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[5]    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 3.531      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[6]    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 3.531      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[7]    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 3.531      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[8]    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 3.531      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[9]    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 3.531      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[10]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 3.531      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; ram_do_reg[29]                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 3.531      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; ram_do_reg[30]                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 3.530      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; ram_do_reg[28]                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 3.531      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; ram_do_reg[24]                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 3.531      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; ram_do_reg[21]                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 3.531      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; ram_do_reg[19]                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 3.530      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; ram_do_reg[27]                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 3.530      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; ram_do_reg[6]                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 3.530      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; ram_do_reg[2]                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 3.530      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; ram_do_reg[4]                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 3.531      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; ram_do_reg[1]                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 3.531      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; ram_do_reg[5]                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 3.531      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; ram_do_reg[7]                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 3.530      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; ram_do_reg[0]                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 3.531      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; ram_do_reg[12]                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 3.531      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; ram_do_reg[8]                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 3.531      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; ram_do_reg[13]                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 3.531      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; ram_do_reg[3]                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 3.530      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; ram_do_reg[14]                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 3.530      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; ram_do_reg[26]                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 3.530      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; ram_do_reg[20]                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 3.531      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; ram_do_reg[31]                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 3.530      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; ram_do_reg[18]                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 3.530      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; ram_do_reg[17]                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 3.531      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; ram_do_reg[15]                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 3.530      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; ram_do_reg[9]                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 3.531      ;
; 7.936 ; sdram_reset_ctrl_n_reg ; ram_do_reg[10]                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.172     ; 3.530      ;
+-------+------------------------+----------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                           ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                        ; To Node                                                                                                                                                                        ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 48.242 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[8] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.179      ; 1.935      ;
; 97.405 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 2.527      ;
; 97.405 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 2.527      ;
; 97.405 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 2.527      ;
; 97.405 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 2.527      ;
; 97.592 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 2.340      ;
; 97.592 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 2.340      ;
; 97.592 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 2.340      ;
; 97.592 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 2.340      ;
; 97.644 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 2.285      ;
; 97.644 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 2.285      ;
; 97.644 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 2.285      ;
; 97.644 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 2.285      ;
; 97.714 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 2.215      ;
; 97.714 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 2.215      ;
; 97.714 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 2.215      ;
; 97.714 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 2.215      ;
; 97.714 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 2.215      ;
; 97.714 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 2.215      ;
; 97.714 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 2.215      ;
; 97.714 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 2.215      ;
; 97.714 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 2.215      ;
; 97.714 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 2.215      ;
; 97.716 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 2.213      ;
; 97.716 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[2]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 2.213      ;
; 97.716 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 2.213      ;
; 97.716 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 2.213      ;
; 97.743 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.071     ; 2.184      ;
; 97.743 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.071     ; 2.184      ;
; 97.778 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.071     ; 2.149      ;
; 97.778 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.071     ; 2.149      ;
; 97.778 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.071     ; 2.149      ;
; 97.778 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.071     ; 2.149      ;
; 97.778 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.071     ; 2.149      ;
; 97.778 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.071     ; 2.149      ;
; 97.778 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.071     ; 2.149      ;
; 97.778 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.071     ; 2.149      ;
; 97.778 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.071     ; 2.149      ;
; 97.778 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.071     ; 2.149      ;
; 97.780 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.065     ; 2.153      ;
; 97.788 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.061     ; 2.149      ;
; 97.788 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.061     ; 2.149      ;
; 97.788 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.061     ; 2.149      ;
; 97.788 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.061     ; 2.149      ;
; 97.788 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.061     ; 2.149      ;
; 97.788 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.061     ; 2.149      ;
; 97.788 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.061     ; 2.149      ;
; 97.788 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.061     ; 2.149      ;
; 97.788 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.061     ; 2.149      ;
; 97.942 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.064     ; 1.992      ;
; 97.942 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.064     ; 1.992      ;
; 97.942 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.064     ; 1.992      ;
; 97.942 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.064     ; 1.992      ;
; 97.942 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.064     ; 1.992      ;
; 97.942 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.064     ; 1.992      ;
; 97.942 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.064     ; 1.992      ;
; 97.942 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.064     ; 1.992      ;
; 97.942 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.064     ; 1.992      ;
; 97.942 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.064     ; 1.992      ;
; 97.942 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.064     ; 1.992      ;
; 97.942 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.064     ; 1.992      ;
; 97.955 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 1.969      ;
; 98.009 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.065     ; 1.924      ;
; 98.009 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.065     ; 1.924      ;
; 98.009 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.065     ; 1.924      ;
; 98.031 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.065     ; 1.902      ;
; 98.031 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.065     ; 1.902      ;
; 98.031 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.065     ; 1.902      ;
; 98.044 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 1.885      ;
; 98.044 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 1.885      ;
; 98.044 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 1.885      ;
; 98.044 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 1.885      ;
; 98.069 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 1.863      ;
; 98.086 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 1.845      ;
; 98.086 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 1.845      ;
; 98.094 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 1.838      ;
; 98.094 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 1.838      ;
; 98.094 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 1.838      ;
; 98.094 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[3]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 1.838      ;
; 98.094 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.066     ; 1.838      ;
; 98.158 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.070     ; 1.770      ;
; 98.158 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.070     ; 1.770      ;
; 98.158 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.070     ; 1.770      ;
; 98.158 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.070     ; 1.770      ;
; 98.158 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.070     ; 1.770      ;
; 98.158 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.070     ; 1.770      ;
; 98.158 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.070     ; 1.770      ;
; 98.158 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.070     ; 1.770      ;
; 98.158 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.070     ; 1.770      ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                             ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node    ; To Node                                             ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 63.099 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.071     ; 3.484      ;
; 63.099 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.071     ; 3.484      ;
; 63.490 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.071     ; 3.093      ;
; 63.490 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.071     ; 3.093      ;
; 63.490 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.071     ; 3.093      ;
; 63.490 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.071     ; 3.093      ;
; 63.490 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.072     ; 3.092      ;
; 63.490 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.072     ; 3.092      ;
; 63.490 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.073     ; 3.091      ;
; 63.490 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.073     ; 3.091      ;
; 63.490 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.072     ; 3.092      ;
; 63.490 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.072     ; 3.092      ;
; 63.490 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.073     ; 3.091      ;
; 63.490 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.073     ; 3.091      ;
; 63.490 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.073     ; 3.091      ;
; 63.490 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.073     ; 3.091      ;
; 63.490 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.073     ; 3.091      ;
; 63.490 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.073     ; 3.091      ;
; 63.490 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.073     ; 3.091      ;
; 63.490 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.073     ; 3.091      ;
; 63.490 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.072     ; 3.092      ;
; 63.490 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.072     ; 3.092      ;
; 63.490 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.072     ; 3.092      ;
; 63.490 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.072     ; 3.092      ;
; 63.490 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.072     ; 3.092      ;
; 63.490 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.072     ; 3.092      ;
; 63.490 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.071     ; 3.093      ;
; 63.490 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.071     ; 3.093      ;
; 63.490 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.071     ; 3.093      ;
; 63.490 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.072     ; 3.092      ;
; 63.490 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.072     ; 3.092      ;
; 65.416 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.270      ; 3.508      ;
; 65.416 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.270      ; 3.508      ;
; 65.823 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.268      ; 3.099      ;
; 65.823 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.268      ; 3.099      ;
; 65.823 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.268      ; 3.099      ;
; 65.823 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.268      ; 3.099      ;
; 65.823 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.268      ; 3.099      ;
; 65.823 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.268      ; 3.099      ;
; 65.823 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.268      ; 3.099      ;
; 65.823 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.268      ; 3.099      ;
; 65.823 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.268      ; 3.099      ;
; 65.824 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.269      ; 3.099      ;
; 65.824 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.269      ; 3.099      ;
; 65.824 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.269      ; 3.099      ;
; 65.824 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.269      ; 3.099      ;
; 65.824 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.270      ; 3.100      ;
; 65.824 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.270      ; 3.100      ;
; 65.824 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.270      ; 3.100      ;
; 65.824 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.269      ; 3.099      ;
; 65.824 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.269      ; 3.099      ;
; 65.824 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.269      ; 3.099      ;
; 65.824 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.270      ; 3.100      ;
; 65.824 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.269      ; 3.099      ;
; 65.824 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.269      ; 3.099      ;
; 65.824 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.269      ; 3.099      ;
; 65.824 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.269      ; 3.099      ;
; 65.824 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.269      ; 3.099      ;
; 65.824 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.269      ; 3.099      ;
; 65.824 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.269      ; 3.099      ;
; 65.824 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.269      ; 3.099      ;
; 65.825 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.270      ; 3.099      ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                             ;
+-------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node    ; To Node                                             ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+-------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 0.220 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.507      ; 2.913      ;
; 0.220 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.507      ; 2.913      ;
; 0.220 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.507      ; 2.913      ;
; 0.220 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.507      ; 2.913      ;
; 0.220 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.507      ; 2.913      ;
; 0.220 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.507      ; 2.913      ;
; 0.220 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.507      ; 2.913      ;
; 0.220 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.507      ; 2.913      ;
; 0.220 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.507      ; 2.913      ;
; 0.220 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.507      ; 2.913      ;
; 0.220 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.507      ; 2.913      ;
; 0.220 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.507      ; 2.913      ;
; 0.221 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.507      ; 2.914      ;
; 0.221 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.507      ; 2.914      ;
; 0.221 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.507      ; 2.914      ;
; 0.221 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.506      ; 2.913      ;
; 0.221 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.506      ; 2.913      ;
; 0.221 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.506      ; 2.913      ;
; 0.221 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.507      ; 2.914      ;
; 0.221 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.506      ; 2.913      ;
; 0.221 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.506      ; 2.913      ;
; 0.221 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.506      ; 2.913      ;
; 0.221 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.506      ; 2.913      ;
; 0.221 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.506      ; 2.913      ;
; 0.221 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.506      ; 2.913      ;
; 0.221 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.506      ; 2.913      ;
; 0.221 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.506      ; 2.913      ;
; 0.221 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.506      ; 2.913      ;
; 0.221 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.507      ; 2.914      ;
; 0.610 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.507      ; 3.303      ;
; 0.610 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.507      ; 3.303      ;
; 2.651 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 2.906      ;
; 2.651 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 2.906      ;
; 2.651 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 2.906      ;
; 2.652 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 2.907      ;
; 2.652 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 2.907      ;
; 2.652 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 2.907      ;
; 2.652 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 2.907      ;
; 2.652 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 2.905      ;
; 2.652 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 2.905      ;
; 2.652 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 2.906      ;
; 2.652 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 2.906      ;
; 2.652 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 2.905      ;
; 2.652 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 2.905      ;
; 2.652 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 2.905      ;
; 2.652 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 2.905      ;
; 2.652 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 2.905      ;
; 2.652 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 2.905      ;
; 2.652 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 2.905      ;
; 2.652 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.067      ; 2.905      ;
; 2.652 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 2.906      ;
; 2.652 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 2.906      ;
; 2.652 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 2.906      ;
; 2.652 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 2.906      ;
; 2.652 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 2.906      ;
; 2.652 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 2.907      ;
; 2.652 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 2.907      ;
; 2.652 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 2.907      ;
; 2.652 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 2.906      ;
; 2.652 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 2.906      ;
; 3.027 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 3.283      ;
; 3.027 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 3.283      ;
+-------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                            ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                        ; To Node                                                                                                                                                                        ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 1.401  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.068      ; 1.655      ;
; 1.401  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.068      ; 1.655      ;
; 1.401  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.068      ; 1.655      ;
; 1.401  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.068      ; 1.655      ;
; 1.401  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.068      ; 1.655      ;
; 1.401  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.068      ; 1.655      ;
; 1.401  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.068      ; 1.655      ;
; 1.401  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.068      ; 1.655      ;
; 1.401  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.068      ; 1.655      ;
; 1.452  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.072      ; 1.710      ;
; 1.452  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.072      ; 1.710      ;
; 1.452  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.072      ; 1.710      ;
; 1.452  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[3]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.072      ; 1.710      ;
; 1.452  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.072      ; 1.710      ;
; 1.468  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.071      ; 1.725      ;
; 1.468  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.071      ; 1.725      ;
; 1.470  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.072      ; 1.728      ;
; 1.495  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.073      ; 1.754      ;
; 1.495  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.073      ; 1.754      ;
; 1.495  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.073      ; 1.754      ;
; 1.503  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 1.758      ;
; 1.503  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 1.758      ;
; 1.503  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 1.758      ;
; 1.503  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 1.758      ;
; 1.529  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.073      ; 1.788      ;
; 1.529  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.073      ; 1.788      ;
; 1.529  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.073      ; 1.788      ;
; 1.576  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.074      ; 1.836      ;
; 1.576  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.074      ; 1.836      ;
; 1.576  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.074      ; 1.836      ;
; 1.576  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.074      ; 1.836      ;
; 1.576  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.074      ; 1.836      ;
; 1.576  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.074      ; 1.836      ;
; 1.576  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.074      ; 1.836      ;
; 1.576  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.074      ; 1.836      ;
; 1.576  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.074      ; 1.836      ;
; 1.576  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.074      ; 1.836      ;
; 1.576  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.074      ; 1.836      ;
; 1.576  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.074      ; 1.836      ;
; 1.577  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 1.826      ;
; 1.751  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.077      ; 2.014      ;
; 1.751  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.077      ; 2.014      ;
; 1.751  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.077      ; 2.014      ;
; 1.751  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.077      ; 2.014      ;
; 1.751  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.077      ; 2.014      ;
; 1.751  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.077      ; 2.014      ;
; 1.751  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.077      ; 2.014      ;
; 1.751  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.077      ; 2.014      ;
; 1.751  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.077      ; 2.014      ;
; 1.757  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.073      ; 2.016      ;
; 1.773  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.067      ; 2.026      ;
; 1.773  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.067      ; 2.026      ;
; 1.773  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.067      ; 2.026      ;
; 1.773  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.067      ; 2.026      ;
; 1.773  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.067      ; 2.026      ;
; 1.773  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.067      ; 2.026      ;
; 1.773  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.067      ; 2.026      ;
; 1.773  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.067      ; 2.026      ;
; 1.773  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.067      ; 2.026      ;
; 1.773  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.067      ; 2.026      ;
; 1.804  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.067      ; 2.057      ;
; 1.804  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.067      ; 2.057      ;
; 1.814  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 2.069      ;
; 1.814  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 2.069      ;
; 1.814  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 2.069      ;
; 1.814  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 2.069      ;
; 1.814  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 2.069      ;
; 1.814  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 2.069      ;
; 1.814  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 2.069      ;
; 1.814  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 2.069      ;
; 1.814  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 2.069      ;
; 1.814  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 2.069      ;
; 1.816  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.068      ; 2.070      ;
; 1.816  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[2]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.068      ; 2.070      ;
; 1.816  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.068      ; 2.070      ;
; 1.816  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.068      ; 2.070      ;
; 1.875  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 2.130      ;
; 1.875  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 2.130      ;
; 1.875  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 2.130      ;
; 1.875  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 2.130      ;
; 1.930  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.072      ; 2.188      ;
; 1.930  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.072      ; 2.188      ;
; 1.930  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.072      ; 2.188      ;
; 1.930  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.072      ; 2.188      ;
; 1.996  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.072      ; 2.254      ;
; 1.996  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.072      ; 2.254      ;
; 1.996  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.072      ; 2.254      ;
; 1.996  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.072      ; 2.254      ;
; 51.264 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[8] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; -50.000      ; 0.320      ; 1.790      ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                 ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                           ; To Node                                                                                                                                                                                                                ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 1.423 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a5 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 1.998      ;
; 1.423 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a4 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 1.998      ;
; 1.423 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a3 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 1.998      ;
; 1.423 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a2 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 1.998      ;
; 1.423 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 1.998      ;
; 1.423 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 1.998      ;
; 1.423 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a6 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 1.998      ;
; 1.423 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a5 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 1.998      ;
; 1.423 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a4 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 1.998      ;
; 1.423 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a3 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 1.998      ;
; 1.423 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a2 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 1.998      ;
; 1.423 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 1.998      ;
; 1.423 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 1.998      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a55  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.039      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a54  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.039      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a53  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.039      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a52  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.039      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a51  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.039      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a50  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.039      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a49  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.039      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a48  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.039      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a39  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.039      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a38  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.039      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a37  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.039      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a36  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.039      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a35  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.039      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a34  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.039      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a33  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.039      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a32  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.039      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a19  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.039      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a18  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.039      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a17  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.039      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a16  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.039      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a7   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.039      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a6   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.039      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a5   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.039      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a4   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.039      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a3   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.039      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a2   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.039      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a1   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.039      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.039      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a63  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a62  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a61  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a60  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a59  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a58  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a57  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a56  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a47  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a46  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a45  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a44  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a43  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a42  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a41  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a40  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a31  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a30  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a29  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a28  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a27  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a26  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a25  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a24  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a23  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a22  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a21  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a20  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a15  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a14  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a13  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a12  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a11  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a10  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a9   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.753 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.390      ; 2.329      ;
; 1.787 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a15   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.371      ;
; 1.787 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a14   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.371      ;
; 1.787 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a13   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.371      ;
; 1.787 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a12   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.371      ;
; 1.787 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a11   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.371      ;
; 1.787 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a10   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.371      ;
; 1.787 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a9    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.371      ;
; 1.787 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a8    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.371      ;
; 1.787 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a7    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.371      ;
; 1.787 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a6    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.371      ;
; 1.787 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a5    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.371      ;
; 1.787 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a4    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.371      ;
; 1.787 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a3    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.371      ;
; 1.787 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a2    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.371      ;
; 1.787 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a1    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.371      ;
; 1.787 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.371      ;
; 3.246 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[3]                                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.647      ; 4.099      ;
; 3.274 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[7]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.611      ; 4.091      ;
; 3.274 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[5]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.611      ; 4.091      ;
; 3.293 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[25]                                                                                                                                                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.623      ; 4.122      ;
; 3.293 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[5]                                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.624      ; 4.123      ;
; 3.293 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[4]                                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.624      ; 4.123      ;
; 3.327 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[0]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.593      ; 4.126      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                       ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node              ; To Node                                                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 2.938 ; sdram_reset_ctrl_n_reg ; seq_reg[0]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 3.313      ;
; 2.938 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 3.313      ;
; 2.938 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 3.313      ;
; 2.938 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_act                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 3.313      ;
; 2.938 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_reg                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 3.313      ;
; 2.938 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_reg                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 3.313      ;
; 2.938 ; sdram_reset_ctrl_n_reg ; ram_di_reg[2]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.151      ; 3.295      ;
; 2.938 ; sdram_reset_ctrl_n_reg ; ram_di_reg[5]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.151      ; 3.295      ;
; 2.938 ; sdram_reset_ctrl_n_reg ; ram_di_reg[10]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.151      ; 3.295      ;
; 2.938 ; sdram_reset_ctrl_n_reg ; ram_di_reg[13]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.151      ; 3.295      ;
; 2.938 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 3.313      ;
; 2.939 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_req                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.153      ; 3.298      ;
; 2.939 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.153      ; 3.298      ;
; 2.939 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.153      ; 3.298      ;
; 2.939 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.153      ; 3.298      ;
; 2.939 ; sdram_reset_ctrl_n_reg ; ram_di_reg[4]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.153      ; 3.298      ;
; 2.939 ; sdram_reset_ctrl_n_reg ; ram_di_reg[7]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.153      ; 3.298      ;
; 2.939 ; sdram_reset_ctrl_n_reg ; ram_di_reg[12]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.153      ; 3.298      ;
; 2.940 ; sdram_reset_ctrl_n_reg ; ram_di_reg[0]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.155      ; 3.301      ;
; 2.940 ; sdram_reset_ctrl_n_reg ; ram_di_reg[1]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.155      ; 3.301      ;
; 2.940 ; sdram_reset_ctrl_n_reg ; ram_di_reg[3]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.155      ; 3.301      ;
; 2.940 ; sdram_reset_ctrl_n_reg ; ram_di_reg[6]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.155      ; 3.301      ;
; 2.940 ; sdram_reset_ctrl_n_reg ; ram_di_reg[8]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.155      ; 3.301      ;
; 2.940 ; sdram_reset_ctrl_n_reg ; ram_di_reg[9]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.155      ; 3.301      ;
; 2.940 ; sdram_reset_ctrl_n_reg ; ram_di_reg[11]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.155      ; 3.301      ;
; 2.940 ; sdram_reset_ctrl_n_reg ; ram_di_reg[14]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.155      ; 3.301      ;
; 2.940 ; sdram_reset_ctrl_n_reg ; ram_di_reg[15]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.155      ; 3.301      ;
; 2.942 ; sdram_reset_ctrl_n_reg ; ram_do_reg[29]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.173      ; 3.321      ;
; 2.942 ; sdram_reset_ctrl_n_reg ; ram_do_reg[28]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.173      ; 3.321      ;
; 2.942 ; sdram_reset_ctrl_n_reg ; ram_do_reg[24]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.173      ; 3.321      ;
; 2.942 ; sdram_reset_ctrl_n_reg ; ram_do_reg[21]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.173      ; 3.321      ;
; 2.942 ; sdram_reset_ctrl_n_reg ; ram_do_reg[4]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.173      ; 3.321      ;
; 2.942 ; sdram_reset_ctrl_n_reg ; ram_do_reg[1]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.173      ; 3.321      ;
; 2.942 ; sdram_reset_ctrl_n_reg ; ram_do_reg[5]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.173      ; 3.321      ;
; 2.942 ; sdram_reset_ctrl_n_reg ; ram_do_reg[0]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.173      ; 3.321      ;
; 2.942 ; sdram_reset_ctrl_n_reg ; ram_do_reg[12]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.173      ; 3.321      ;
; 2.942 ; sdram_reset_ctrl_n_reg ; ram_do_reg[8]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.173      ; 3.321      ;
; 2.942 ; sdram_reset_ctrl_n_reg ; ram_do_reg[13]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.173      ; 3.321      ;
; 2.942 ; sdram_reset_ctrl_n_reg ; ram_do_reg[20]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.173      ; 3.321      ;
; 2.942 ; sdram_reset_ctrl_n_reg ; ram_do_reg[17]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.173      ; 3.321      ;
; 2.942 ; sdram_reset_ctrl_n_reg ; ram_do_reg[9]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.173      ; 3.321      ;
; 2.942 ; sdram_reset_ctrl_n_reg ; ram_do_reg[16]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.173      ; 3.321      ;
; 2.942 ; sdram_reset_ctrl_n_reg ; ram_do_reg[25]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.173      ; 3.321      ;
; 2.942 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.182      ; 3.330      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; seq_reg[1]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.170      ; 3.319      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; seq_reg[2]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.170      ; 3.319      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; seq_reg[3]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.170      ; 3.319      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; seq_reg[4]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.170      ; 3.319      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; seq_reg[5]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.170      ; 3.319      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; seq_reg[6]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.170      ; 3.319      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; seq_reg[7]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.170      ; 3.319      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; seq_reg[8]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 3.318      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; seq_reg[9]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 3.318      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; seq_reg[10]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 3.318      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; seq_reg[11]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 3.318      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.173      ; 3.322      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.173      ; 3.322      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.173      ; 3.322      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.173      ; 3.322      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.173      ; 3.322      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.173      ; 3.322      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.173      ; 3.322      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.173      ; 3.322      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.173      ; 3.322      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.173      ; 3.322      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.173      ; 3.322      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 3.318      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 3.318      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; ram_do_reg[30]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.172      ; 3.321      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; ram_do_reg[19]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.172      ; 3.321      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; ram_do_reg[27]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.172      ; 3.321      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; ram_do_reg[6]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.172      ; 3.321      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; ram_do_reg[2]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.172      ; 3.321      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; ram_do_reg[7]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.172      ; 3.321      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; ram_do_reg[3]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.172      ; 3.321      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; ram_do_reg[14]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.172      ; 3.321      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; ram_do_reg[26]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.172      ; 3.321      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; ram_do_reg[31]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.172      ; 3.321      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; ram_do_reg[18]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.172      ; 3.321      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; ram_do_reg[15]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.172      ; 3.321      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; ram_do_reg[10]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.172      ; 3.321      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; ram_do_reg[11]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.172      ; 3.321      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; ram_do_reg[22]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.172      ; 3.321      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; ram_do_reg[23]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.172      ; 3.321      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.172      ; 3.321      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.172      ; 3.321      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.172      ; 3.321      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.170      ; 3.319      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; sdram_request_complete_reg                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.170      ; 3.319      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; sdram_request_reg                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.170      ; 3.319      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_psel[0]                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.170      ; 3.319      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_oe                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.172      ; 3.321      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[1]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.172      ; 3.321      ;
; 2.943 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[0]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.172      ; 3.321      ;
; 3.192 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ras_n                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.140      ; 3.462      ;
; 3.192 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cas_n                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.140      ; 3.462      ;
; 3.192 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_we_n                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 3.463      ;
; 3.192 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 3.463      ;
; 3.192 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.140      ; 3.462      ;
; 3.215 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.129      ; 3.474      ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                        ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+---------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                                                          ; Clock Edge ; Target                    ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+---------------------------+
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[2]              ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[3]              ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[4]              ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[5]              ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[6]              ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[7]              ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[8]              ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[9]              ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[0]         ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[1]         ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[2]         ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[3]         ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[4]         ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[5]         ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[6]         ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[7]         ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[8]         ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[9]         ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[0]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[1]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[2]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[3]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[4]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[5]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[6]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[7]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[8]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[9]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[1]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[2]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[3]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[5]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[7]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[8]   ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[0]       ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[1]       ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[2]       ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[3]       ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[4]       ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[7]       ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[0]       ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[1]       ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[2]       ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[3]       ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[4]       ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[5]       ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[6]       ;
; 4.091 ; 4.311        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[7]       ;
; 4.092 ; 4.312        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[0]   ;
; 4.092 ; 4.312        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[4]   ;
; 4.092 ; 4.312        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[6]   ;
; 4.092 ; 4.312        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[9]   ;
; 4.092 ; 4.312        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[0] ;
; 4.092 ; 4.312        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[1] ;
; 4.092 ; 4.312        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[2] ;
; 4.092 ; 4.312        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[3] ;
; 4.092 ; 4.312        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[4] ;
; 4.092 ; 4.312        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[5] ;
; 4.092 ; 4.312        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[6] ;
; 4.092 ; 4.312        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[7] ;
; 4.092 ; 4.312        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[8] ;
; 4.092 ; 4.312        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[9] ;
; 4.092 ; 4.312        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[5]       ;
; 4.092 ; 4.312        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[6]       ;
; 4.209 ; 4.367        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[0]              ;
; 4.209 ; 4.367        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[1]              ;
; 4.209 ; 4.367        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[2]              ;
; 4.209 ; 4.367        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[3]              ;
; 4.209 ; 4.367        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[4]              ;
; 4.209 ; 4.367        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[5]              ;
; 4.209 ; 4.367        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[6]              ;
; 4.209 ; 4.362        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[7]              ;
; 4.209 ; 4.367        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[7]              ;
; 4.210 ; 4.363        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[0]              ;
; 4.210 ; 4.363        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[1]              ;
; 4.210 ; 4.363        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[2]              ;
; 4.210 ; 4.363        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[3]              ;
; 4.210 ; 4.363        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[4]              ;
; 4.210 ; 4.363        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[5]              ;
; 4.210 ; 4.363        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[6]              ;
; 4.230 ; 4.418        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[0]         ;
; 4.230 ; 4.418        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[1]         ;
; 4.230 ; 4.418        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[2]         ;
; 4.230 ; 4.418        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[3]         ;
; 4.230 ; 4.418        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[4]         ;
; 4.230 ; 4.418        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[5]         ;
; 4.230 ; 4.418        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[6]         ;
; 4.230 ; 4.418        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[7]         ;
; 4.230 ; 4.418        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[8]         ;
; 4.230 ; 4.418        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[9]         ;
; 4.230 ; 4.418        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[0]   ;
; 4.230 ; 4.418        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[1]   ;
; 4.230 ; 4.418        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[2]   ;
; 4.230 ; 4.418        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[3]   ;
; 4.230 ; 4.418        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[4]   ;
; 4.230 ; 4.418        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[5]   ;
; 4.230 ; 4.418        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[6]   ;
; 4.230 ; 4.418        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[7]   ;
; 4.230 ; 4.418        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[8]   ;
; 4.230 ; 4.418        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[9]   ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+---------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                        ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-----------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                                                          ; Clock Edge ; Target                                                    ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-----------------------------------------------------------+
; 5.547 ; 5.767        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[12]                                            ;
; 5.547 ; 5.767        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[4]                                             ;
; 5.547 ; 5.767        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[7]                                             ;
; 5.547 ; 5.767        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ;
; 5.547 ; 5.767        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_act                      ;
; 5.547 ; 5.767        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ;
; 5.547 ; 5.767        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_refr_req                    ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[10]                                            ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[13]                                            ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[2]                                             ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[5]                                             ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_reg                      ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_refr_act                    ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1     ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_reg                      ;
; 5.548 ; 5.768        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[0]                                                ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ;
; 5.549 ; 5.769        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[0]                                             ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[11]                                            ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[14]                                            ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[15]                                            ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[1]                                             ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[3]                                             ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[6]                                             ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[8]                                             ;
; 5.550 ; 5.770        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[9]                                             ;
; 5.553 ; 5.773        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[0]                                             ;
; 5.553 ; 5.773        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[12]                                            ;
; 5.553 ; 5.773        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[13]                                            ;
; 5.553 ; 5.773        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[16]                                            ;
; 5.553 ; 5.773        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[17]                                            ;
; 5.553 ; 5.773        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[1]                                             ;
; 5.553 ; 5.773        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[20]                                            ;
; 5.553 ; 5.773        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[21]                                            ;
; 5.553 ; 5.773        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[24]                                            ;
; 5.553 ; 5.773        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[25]                                            ;
; 5.553 ; 5.773        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[28]                                            ;
; 5.553 ; 5.773        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[29]                                            ;
; 5.553 ; 5.773        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[4]                                             ;
; 5.553 ; 5.773        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[5]                                             ;
; 5.553 ; 5.773        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[8]                                             ;
; 5.553 ; 5.773        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[9]                                             ;
; 5.553 ; 5.773        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ;
; 5.553 ; 5.773        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ;
; 5.553 ; 5.773        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_psel[0]                     ;
; 5.553 ; 5.773        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ;
; 5.553 ; 5.773        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|sdram_rdy                     ;
; 5.553 ; 5.773        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_request_complete_reg                                ;
; 5.553 ; 5.773        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_request_reg                                         ;
; 5.553 ; 5.773        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[10]                                               ;
; 5.553 ; 5.773        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[11]                                               ;
; 5.553 ; 5.773        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[8]                                                ;
; 5.553 ; 5.773        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[9]                                                ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_bena_reg[0]                                           ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_bena_reg[1]                                           ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[10]                                            ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[11]                                            ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[14]                                            ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[15]                                            ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[18]                                            ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[19]                                            ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[22]                                            ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[23]                                            ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[26]                                            ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[27]                                            ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[2]                                             ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[30]                                            ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[31]                                            ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[3]                                             ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[6]                                             ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[7]                                             ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_dq_oe                 ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_act                      ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[1]                                                ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[2]                                                ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[3]                                                ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[4]                                                ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[5]                                                ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[6]                                                ;
; 5.554 ; 5.774        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[7]                                                ;
; 5.596 ; 5.754        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[0]                   ;
; 5.596 ; 5.754        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[1]                   ;
; 5.596 ; 5.754        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[2]                   ;
; 5.599 ; 5.757        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[3]                   ;
; 5.599 ; 5.757        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[6]                   ;
; 5.600 ; 5.758        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[10]                  ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-----------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                             ;
+--------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                                          ; Clock Edge ; Target                                                                                                                                                                                                        ;
+--------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 17.176 ; 17.396       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19]                                                                                       ;
; 17.176 ; 17.396       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28]                                                                                       ;
; 17.176 ; 17.396       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37]                                                                                       ;
; 17.177 ; 17.397       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_cache_reg[0]                                                                                                         ;
; 17.178 ; 17.398       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[6]                                                                                         ;
; 17.184 ; 17.404       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[3]                                                                                                          ;
; 17.184 ; 17.404       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[5]                                                                                                          ;
; 17.184 ; 17.404       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[6]                                                                                                          ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[10]                                                                                                                                         ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[11]                                                                                                                                         ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[13]                                                                                                                                         ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[15]                                                                                                                                         ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[17]                                                                                                                                         ;
; 17.185 ; 17.405       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[9]                                                                                                                                          ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Ireg                                                                                              ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11]                                                                                       ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[20]                                                                                       ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[30]                                                                                       ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31]                                                                                       ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[7]                                                                                        ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[0]                                                                                                              ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[0]                                                                                                            ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_bk_modify_reg[0]                                                                                                    ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_bk_valid_reg[3]                                                                                                     ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[1]                                                                                                              ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hblank_reg                                                                                                                 ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|vsync_reg                                                                                                                  ;
; 17.186 ; 17.406       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[12]                                                                                                                                                            ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[4]                                                                                                        ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|PC[0]                                                                                             ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|PC[4]                                                                                             ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|PC[6]                                                                                             ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|PC[8]                                                                                             ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|processInt                                                                                        ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_bk_modify_reg[1]                                                                                                    ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_bk_modify_reg[2]                                                                                                    ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_bk_modify_reg[3]                                                                                                    ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_hr_reg[0]                                                                                                           ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_hr_reg[1]                                                                                                           ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|colpm2_raw_reg[1]                                                                                                          ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|colpm2_raw_reg[3]                                                                                                          ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|colpm2_raw_reg[4]                                                                                                          ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|colpm3_raw_reg[1]                                                                                                          ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|colpm3_raw_reg[3]                                                                                                          ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|colpm3_raw_reg[4]                                                                                                          ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|consol_output_reg[1]                                                                                                       ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_priority:priority_rules|SB_reg                                                                                        ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_priority:priority_rules|SF2_reg                                                                                       ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_priority:priority_rules|SF3_reg                                                                                       ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_priority:priority_rules|SP0_reg                                                                                       ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_priority:priority_rules|SP1_reg                                                                                       ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colbk_delay|shift_reg[0][0]                                                                                ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colbk_delay|shift_reg[0][1]                                                                                ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colbk_delay|shift_reg[0][2]                                                                                ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colbk_delay|shift_reg[1][0]                                                                                ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colbk_delay|shift_reg[1][1]                                                                                ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpf0_delay|shift_reg[1][2]                                                                               ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpf2_delay|shift_reg[0][0]                                                                               ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpf2_delay|shift_reg[0][2]                                                                               ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpf2_delay|shift_reg[1][0]                                                                               ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpf2_delay|shift_reg[1][2]                                                                               ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpf3_delay|shift_reg[0][0]                                                                               ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpf3_delay|shift_reg[0][1]                                                                               ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpf3_delay|shift_reg[0][2]                                                                               ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpf3_delay|shift_reg[1][0]                                                                               ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpf3_delay|shift_reg[1][1]                                                                               ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpf3_delay|shift_reg[1][2]                                                                               ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpm0_delay|shift_reg[0][0]                                                                               ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpm0_delay|shift_reg[0][2]                                                                               ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpm0_delay|shift_reg[0][3]                                                                               ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpm0_delay|shift_reg[1][0]                                                                               ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpm0_delay|shift_reg[1][2]                                                                               ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpm0_delay|shift_reg[1][3]                                                                               ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpm1_delay|shift_reg[0][0]                                                                               ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpm1_delay|shift_reg[0][3]                                                                               ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpm2_delay|shift_reg[0][0]                                                                               ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpm2_delay|shift_reg[0][3]                                                                               ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpm2_delay|shift_reg[1][0]                                                                               ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpm2_delay|shift_reg[1][2]                                                                               ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpm2_delay|shift_reg[1][3]                                                                               ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpm3_delay|shift_reg[0][0]                                                                               ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpm3_delay|shift_reg[0][2]                                                                               ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpm3_delay|shift_reg[0][3]                                                                               ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpm3_delay|shift_reg[1][0]                                                                               ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpm3_delay|shift_reg[1][2]                                                                               ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpm3_delay|shift_reg[1][3]                                                                               ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|cntr_6pf:cntr1|counter_reg_bit[0] ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|cntr_6pf:cntr1|counter_reg_bit[1] ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:prior_short_delay|shift_reg[0][5]                                                                          ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:prior_short_delay|shift_reg[1][5]                                                                          ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:gtia_mirror|digit_reg[20][0]                                                                                                 ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:gtia_mirror|digit_reg[20][1]                                                                                                 ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:gtia_mirror|digit_reg[20][3]                                                                                                 ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:gtia_mirror|digit_reg[20][4]                                                                                                 ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:gtia_mirror|digit_reg[21][0]                                                                                                 ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:gtia_mirror|digit_reg[21][1]                                                                                                 ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:gtia_mirror|digit_reg[21][3]                                                                                                 ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:gtia_mirror|digit_reg[21][4]                                                                                                 ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[9]                                                                                                                                                             ;
; 17.187 ; 17.407       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[0]                                                                                                                                                               ;
+--------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                        ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                ; Clock Edge ; Target                                                                                   ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+------------------------------------------------------------------------------------------+
; 17.427 ; 17.427       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]           ;
; 17.427 ; 17.427       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]           ;
; 17.427 ; 17.427       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]           ;
; 17.427 ; 17.427       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]           ;
; 17.427 ; 17.427       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|observablevcoout ;
; 17.438 ; 17.438       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; mcc_pll3|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl|inclk[0]               ;
; 17.438 ; 17.438       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; mcc_pll3|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl|outclk                 ;
; 17.450 ; 17.450       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]         ;
; 17.470 ; 17.470       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]         ;
; 17.481 ; 17.481       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; mcc_pll3|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl|inclk[0]               ;
; 17.481 ; 17.481       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; mcc_pll3|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl|outclk                 ;
; 17.492 ; 17.492       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]           ;
; 17.492 ; 17.492       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]           ;
; 17.492 ; 17.492       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]           ;
; 17.492 ; 17.492       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]           ;
; 17.492 ; 17.492       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|observablevcoout ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                       ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+---------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                ; Clock Edge ; Target                                                  ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+---------------------------------------------------------+
; 33.012 ; 33.232       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm_previous            ;
; 33.012 ; 33.232       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp_previous            ;
; 33.012 ; 33.232       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send_bit1 ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dplus_buf1             ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dplus_buf2             ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]             ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]             ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]             ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]             ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[0]            ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]            ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]            ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|val                    ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]           ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]           ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]           ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]           ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]           ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]           ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]           ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]           ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[0]           ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]           ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]           ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]           ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[4]           ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[5]           ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[6]           ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[7]           ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm1_last~_emulated     ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dminus_buf2            ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp1_last~_emulated     ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp2_prev~_emulated     ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyleft_out[0]         ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyleft_out[1]         ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyleft_out[2]         ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyleft_out[3]         ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyright_out[3]        ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid        ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[0]          ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[1]          ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[2]          ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[3]          ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[5]          ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[6]          ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[7]          ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[8]          ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[9]          ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[0]  ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[1]  ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[2]  ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[3]  ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[4]  ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[5]  ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[6]  ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[7]  ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[8]  ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[9]  ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|synch                  ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1      ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2      ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3      ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4      ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[0]         ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[1]         ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[2]         ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[3]         ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[4]         ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[5]         ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[6]         ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[7]         ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[8]         ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dminus~reg0            ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dplus~reg0             ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[0]      ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[1]      ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[2]      ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[3]      ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[4]      ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[5]      ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[6]      ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[7]      ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rden_sig               ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|send_frame             ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.end_send1 ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send_bit0 ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send_bit2 ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send_bit3 ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send_bit4 ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send_bit5 ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send_bit6 ;
; 33.016 ; 33.236       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[0]         ;
; 33.016 ; 33.236       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[1]         ;
; 33.016 ; 33.236       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[2]         ;
; 33.016 ; 33.236       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[3]         ;
; 33.016 ; 33.236       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[4]         ;
; 33.016 ; 33.236       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[5]         ;
; 33.016 ; 33.236       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[6]         ;
; 33.016 ; 33.236       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[7]         ;
; 33.016 ; 33.236       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dminus~en              ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+---------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: 'altera_reserved_tck'                                                                                                                                                                                                                                                     ;
+--------+--------------+----------------+------------------+---------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock               ; Clock Edge ; Target                                                                                                                                                                                                                ;
+--------+--------------+----------------+------------------+---------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 49.483 ; 49.718       ; 0.235          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ;
; 49.483 ; 49.718       ; 0.235          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                           ;
; 49.485 ; 49.720       ; 0.235          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ;
; 49.485 ; 49.720       ; 0.235          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                           ;
; 49.486 ; 49.721       ; 0.235          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ;
; 49.488 ; 49.723       ; 0.235          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ;
; 49.541 ; 49.761       ; 0.220          ; High Pulse Width ; altera_reserved_tck ; Fall       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                                                                                                                                                 ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                                                         ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[0]                                                                                                                           ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[1]                                                                                                                           ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[2]                                                                                                                           ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[0]                                                                                                                          ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[1]                                                                                                                          ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[2]                                                                                                                          ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[3]                                                                                                                          ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                                                           ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                           ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                                                           ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                                                                                                                                           ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                                                           ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                             ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                        ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[2]~reg0                                                                                                                                        ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|reset_ena_reg                                                                                                                                           ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][0]                                                                                                                                    ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                                                                    ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][2]                                                                                                                                    ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][3]                                                                                                                                    ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                                                                    ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0]                                                                                                                      ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[10]                                                                                                                     ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[11]                                                                                                                     ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[12]                                                                                                                     ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[14]                                                                                                                     ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[15]                                                                                                                     ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[2]                                                                                                                      ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[3]                                                                                                                      ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                      ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                      ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[7]                                                                                                                      ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[8]                                                                                                                      ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[9]                                                                                                                      ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ;
; 49.592 ; 49.780       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]                                              ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]                                              ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]                                              ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]                                              ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                   ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                   ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]                                                   ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]                                                   ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]                                                   ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[2] ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[3] ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|design_hash_reg[0]                                                                                                                                      ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|design_hash_reg[1]                                                                                                                                      ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|design_hash_reg[2]                                                                                                                                      ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|design_hash_reg[3]                                                                                                                                      ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                                                         ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[3]                                                                                                                           ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                                                             ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                                                             ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                             ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[3]                                                                                                                                             ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                                                             ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                             ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                                                          ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                                                          ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                                                          ;
; 49.593 ; 49.781       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                                                          ;
+--------+--------------+----------------+------------------+---------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: 'FPGA_CLK'                                                                                               ;
+---------+--------------+----------------+------------------+----------+------------+----------------------------------------------------------------+
; Slack   ; Actual Width ; Required Width ; Type             ; Clock    ; Clock Edge ; Target                                                         ;
+---------+--------------+----------------+------------------+----------+------------+----------------------------------------------------------------+
; 99.796  ; 99.796       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]           ;
; 99.796  ; 99.796       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1]           ;
; 99.796  ; 99.796       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|observablevcoout ;
; 99.818  ; 99.818       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; FPGA_CLK~input|o                                               ;
; 99.850  ; 99.850       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|inclk[0]         ;
; 100.000 ; 100.000      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; FPGA_CLK~input|i                                               ;
; 100.000 ; 100.000      ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; FPGA_CLK~input|i                                               ;
; 100.149 ; 100.149      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|inclk[0]         ;
; 100.182 ; 100.182      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; FPGA_CLK~input|o                                               ;
; 100.202 ; 100.202      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]           ;
; 100.202 ; 100.202      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1]           ;
; 100.202 ; 100.202      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|observablevcoout ;
; 196.000 ; 200.000      ; 4.000          ; Port Rate        ; FPGA_CLK ; Rise       ; FPGA_CLK                                                       ;
+---------+--------------+----------------+------------------+----------+------------+----------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                                                                             ;
+---------------------+---------------------+-------+-------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+-------+-------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]         ; FPGA_CLK            ; 2.679 ; 2.858 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 2.650 ; 2.829 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 2.650 ; 2.829 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 2.650 ; 2.829 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 2.664 ; 2.843 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 2.672 ; 2.851 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 2.665 ; 2.844 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 2.664 ; 2.843 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 2.611 ; 2.789 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 2.672 ; 2.851 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 2.679 ; 2.858 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 2.675 ; 2.854 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 2.675 ; 2.854 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 2.675 ; 2.854 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 2.673 ; 2.852 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 2.673 ; 2.852 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 2.673 ; 2.852 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0             ; FPGA_CLK            ; 3.509 ; 3.680 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; altera_reserved_tdi ; altera_reserved_tck ; 3.345 ; 3.556 ; Rise       ; altera_reserved_tck                                                            ;
; altera_reserved_tms ; altera_reserved_tck ; 8.006 ; 8.229 ; Rise       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; 4.671 ; 5.104 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; 2.435 ; 2.852 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 5.144 ; 5.578 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 2.344 ; 2.775 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 5.291 ; 5.761 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 2.733 ; 3.182 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+-------+-------+------------+--------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]         ; FPGA_CLK            ; -1.737 ; -1.915 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; -1.771 ; -1.950 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; -1.771 ; -1.950 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; -1.771 ; -1.950 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; -1.785 ; -1.964 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; -1.794 ; -1.973 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; -1.786 ; -1.965 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; -1.785 ; -1.964 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; -1.737 ; -1.915 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; -1.794 ; -1.973 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; -1.801 ; -1.980 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; -1.796 ; -1.975 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; -1.796 ; -1.975 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; -1.796 ; -1.975 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; -1.795 ; -1.974 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; -1.795 ; -1.974 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; -1.795 ; -1.974 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0             ; FPGA_CLK            ; -2.555 ; -2.727 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; altera_reserved_tdi ; altera_reserved_tck ; 0.719  ; 0.548  ; Rise       ; altera_reserved_tck                                                            ;
; altera_reserved_tms ; altera_reserved_tck ; -1.247 ; -1.430 ; Rise       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; -3.876 ; -4.286 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; -1.506 ; -1.901 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; -4.345 ; -4.766 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; -1.452 ; -1.860 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; -4.440 ; -4.895 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; -1.775 ; -2.180 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                                                                     ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_A[*]          ; FPGA_CLK            ; 5.734  ; 5.981  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]         ; FPGA_CLK            ; 3.130  ; 2.917  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]         ; FPGA_CLK            ; 3.130  ; 2.917  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]         ; FPGA_CLK            ; 3.133  ; 2.920  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]         ; FPGA_CLK            ; 3.133  ; 2.920  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]         ; FPGA_CLK            ; 3.120  ; 2.907  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]         ; FPGA_CLK            ; 3.120  ; 2.907  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]         ; FPGA_CLK            ; 3.118  ; 2.905  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]         ; FPGA_CLK            ; 2.297  ; 2.223  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]         ; FPGA_CLK            ; 5.734  ; 5.981  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]         ; FPGA_CLK            ; 3.119  ; 2.906  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]        ; FPGA_CLK            ; 3.130  ; 2.917  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]        ; FPGA_CLK            ; 3.119  ; 2.906  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]         ; FPGA_CLK            ; 5.747  ; 5.994  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]        ; FPGA_CLK            ; 5.747  ; 5.994  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]        ; FPGA_CLK            ; 2.310  ; 2.236  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N         ; FPGA_CLK            ; 2.311  ; 2.237  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N          ; FPGA_CLK            ; 3.131  ; 2.918  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]         ; FPGA_CLK            ; 5.070  ; 5.494  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 3.512  ; 3.367  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 3.512  ; 3.367  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 3.512  ; 3.367  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 5.070  ; 5.494  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 5.061  ; 5.485  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 2.456  ; 2.435  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 3.318  ; 3.164  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 3.132  ; 2.919  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 3.489  ; 3.344  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 5.054  ; 5.478  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 3.487  ; 3.342  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 3.487  ; 3.342  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 3.487  ; 3.342  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 5.060  ; 5.484  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 3.488  ; 3.343  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 3.488  ; 3.343  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n        ; FPGA_CLK            ; 3.120  ; 2.907  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n        ; FPGA_CLK            ; 3.132  ; 2.919  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N         ; FPGA_CLK            ; 3.131  ; 2.918  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N          ; FPGA_CLK            ; 5.749  ; 5.996  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L             ; FPGA_CLK            ; 6.048  ; 6.425  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R             ; FPGA_CLK            ; 4.261  ; 4.193  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK              ; FPGA_CLK            ; 4.419  ; 4.339  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD              ; FPGA_CLK            ; 4.433  ; 4.353  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3             ; FPGA_CLK            ; 4.019  ; 4.081  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK           ; FPGA_CLK            ; 12.242 ;        ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK           ; FPGA_CLK            ;        ; 12.593 ; Fall       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]            ; FPGA_CLK            ; 4.914  ; 5.300  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]           ; FPGA_CLK            ; 2.298  ; 2.224  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]           ; FPGA_CLK            ; 4.914  ; 5.300  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]           ; FPGA_CLK            ; 2.297  ; 2.223  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]           ; FPGA_CLK            ; 2.300  ; 2.226  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]            ; FPGA_CLK            ; 4.916  ; 5.302  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]           ; FPGA_CLK            ; 2.299  ; 2.225  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]           ; FPGA_CLK            ; 2.299  ; 2.225  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]           ; FPGA_CLK            ; 2.299  ; 2.225  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]           ; FPGA_CLK            ; 4.916  ; 5.302  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; altera_reserved_tdo ; altera_reserved_tck ; 12.821 ; 13.823 ; Fall       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; 5.670  ; 5.652  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; 8.639  ; 8.746  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 8.494  ; 8.067  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 8.016  ; 8.035  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                                                                             ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_A[*]          ; FPGA_CLK            ; 1.569  ; 1.495  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]         ; FPGA_CLK            ; 2.369  ; 2.161  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]         ; FPGA_CLK            ; 2.369  ; 2.161  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]         ; FPGA_CLK            ; 2.372  ; 2.164  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]         ; FPGA_CLK            ; 2.372  ; 2.164  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]         ; FPGA_CLK            ; 2.360  ; 2.152  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]         ; FPGA_CLK            ; 2.360  ; 2.152  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]         ; FPGA_CLK            ; 2.357  ; 2.149  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]         ; FPGA_CLK            ; 1.569  ; 1.495  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]         ; FPGA_CLK            ; 4.974  ; 5.226  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]         ; FPGA_CLK            ; 2.359  ; 2.151  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]        ; FPGA_CLK            ; 2.369  ; 2.161  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]        ; FPGA_CLK            ; 2.359  ; 2.151  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]         ; FPGA_CLK            ; 1.581  ; 1.507  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]        ; FPGA_CLK            ; 4.986  ; 5.238  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]        ; FPGA_CLK            ; 1.581  ; 1.507  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N         ; FPGA_CLK            ; 1.582  ; 1.508  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N          ; FPGA_CLK            ; 2.370  ; 2.162  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]         ; FPGA_CLK            ; 1.727  ; 1.707  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 2.749  ; 2.611  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 2.749  ; 2.611  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 2.749  ; 2.611  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 4.341  ; 4.766  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 4.333  ; 4.758  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 1.727  ; 1.707  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 2.555  ; 2.408  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 2.371  ; 2.163  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 2.727  ; 2.589  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 4.326  ; 4.751  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 2.724  ; 2.586  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 2.724  ; 2.586  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 2.724  ; 2.586  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 4.332  ; 4.757  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 2.726  ; 2.588  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 2.726  ; 2.588  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n        ; FPGA_CLK            ; 2.360  ; 2.152  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n        ; FPGA_CLK            ; 2.371  ; 2.163  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N         ; FPGA_CLK            ; 2.370  ; 2.162  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N          ; FPGA_CLK            ; 4.988  ; 5.240  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L             ; FPGA_CLK            ; 5.190  ; 5.567  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R             ; FPGA_CLK            ; 3.371  ; 3.301  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK              ; FPGA_CLK            ; 3.522  ; 3.442  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD              ; FPGA_CLK            ; 3.535  ; 3.455  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3             ; FPGA_CLK            ; 3.134  ; 3.198  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK           ; FPGA_CLK            ; 11.452 ;        ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK           ; FPGA_CLK            ;        ; 11.804 ; Fall       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]            ; FPGA_CLK            ; 1.569  ; 1.495  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]           ; FPGA_CLK            ; 1.570  ; 1.496  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]           ; FPGA_CLK            ; 4.186  ; 4.572  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]           ; FPGA_CLK            ; 1.569  ; 1.495  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]           ; FPGA_CLK            ; 1.572  ; 1.498  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]            ; FPGA_CLK            ; 1.571  ; 1.497  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]           ; FPGA_CLK            ; 1.571  ; 1.497  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]           ; FPGA_CLK            ; 1.571  ; 1.497  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]           ; FPGA_CLK            ; 1.571  ; 1.497  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]           ; FPGA_CLK            ; 4.188  ; 4.574  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; altera_reserved_tdo ; altera_reserved_tck ; 10.486 ; 11.491 ; Fall       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; 5.058  ; 5.040  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; 7.901  ; 8.003  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 7.883  ; 7.456  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 7.302  ; 7.321  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                                                      ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 3.664 ; 3.588 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 3.664 ; 3.588 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 3.664 ; 3.588 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 3.664 ; 3.588 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 6.511 ; 6.872 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 7.337 ; 7.698 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 4.697 ; 4.611 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 4.409 ; 4.323 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 4.626 ; 4.478 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 4.068 ; 3.992 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 7.032 ; 7.393 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 4.049 ; 3.973 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 4.049 ; 3.973 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 4.049 ; 3.973 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 7.386 ; 7.747 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 4.957 ; 4.881 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 4.957 ; 4.881 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 4.422 ; 4.274 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 5.753 ; 5.677 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2       ; FPGA_CLK   ; 7.867 ; 7.781 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1        ; FPGA_CLK   ; 8.318 ; 8.679 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2        ; FPGA_CLK   ; 8.124 ; 8.038 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                                                              ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 2.814 ; 2.738 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 2.814 ; 2.738 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 2.814 ; 2.738 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 2.814 ; 2.738 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 5.643 ; 6.004 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 6.437 ; 6.798 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 3.798 ; 3.712 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 3.522 ; 3.436 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 3.694 ; 3.546 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 3.201 ; 3.125 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 6.144 ; 6.505 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 3.183 ; 3.107 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 3.183 ; 3.107 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 3.183 ; 3.107 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 6.484 ; 6.845 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 4.054 ; 3.978 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 4.054 ; 3.978 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 3.499 ; 3.351 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 5.145 ; 5.069 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2       ; FPGA_CLK   ; 7.169 ; 7.083 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1        ; FPGA_CLK   ; 7.704 ; 8.065 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2        ; FPGA_CLK   ; 7.416 ; 7.330 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                                                             ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 3.582     ; 3.658     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 3.582     ; 3.658     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 3.582     ; 3.658     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 3.582     ; 3.658     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 6.862     ; 6.501     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 7.651     ; 7.290     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 4.576     ; 4.662     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 4.291     ; 4.377     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 4.430     ; 4.578     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 4.018     ; 4.094     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 7.386     ; 7.025     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 3.999     ; 4.075     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 3.999     ; 4.075     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 3.999     ; 4.075     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 7.717     ; 7.356     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 4.851     ; 4.927     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 4.851     ; 4.927     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 4.297     ; 4.445     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 5.680     ; 5.756     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2       ; FPGA_CLK   ; 7.789     ; 7.875     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1        ; FPGA_CLK   ; 8.697     ; 8.336     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2        ; FPGA_CLK   ; 8.025     ; 8.111     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                                                     ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 2.732     ; 2.808     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 2.732     ; 2.808     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 2.732     ; 2.808     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 2.732     ; 2.808     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 5.995     ; 5.634     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 6.753     ; 6.392     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 3.678     ; 3.764     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 3.405     ; 3.491     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 3.500     ; 3.648     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 3.150     ; 3.226     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 6.498     ; 6.137     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 3.132     ; 3.208     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 3.132     ; 3.208     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 3.132     ; 3.208     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 6.816     ; 6.455     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 3.950     ; 4.026     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 3.950     ; 4.026     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 3.373     ; 3.521     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 5.072     ; 5.148     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2       ; FPGA_CLK   ; 7.090     ; 7.176     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1        ; FPGA_CLK   ; 8.083     ; 7.722     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2        ; FPGA_CLK   ; 7.317     ; 7.403     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+


----------------------------------------------
; Slow 1200mV 85C Model Metastability Report ;
----------------------------------------------
No synchronizer chains to report.


+----------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Fmax Summary                                                                                    ;
+------------+-----------------+--------------------------------------------------------------------------------+------+
; Fmax       ; Restricted Fmax ; Clock Name                                                                     ; Note ;
+------------+-----------------+--------------------------------------------------------------------------------+------+
; 49.88 MHz  ; 49.88 MHz       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;      ;
; 73.79 MHz  ; 73.79 MHz       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;      ;
; 132.94 MHz ; 132.94 MHz      ; altera_reserved_tck                                                            ;      ;
; 160.15 MHz ; 160.15 MHz      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;      ;
; 240.67 MHz ; 240.67 MHz      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;      ;
+------------+-----------------+--------------------------------------------------------------------------------+------+
This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods.  FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock.  Paths of different clocks, including generated clocks, are ignored.  For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.


+---------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup Summary                                                                      ;
+--------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                          ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; -3.268 ; -269.012      ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.419  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 4.575  ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 26.557 ; 0.000         ;
; altera_reserved_tck                                                            ; 46.239 ; 0.000         ;
+--------------------------------------------------------------------------------+--------+---------------+


+--------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold Summary                                                                      ;
+--------------------------------------------------------------------------------+-------+---------------+
; Clock                                                                          ; Slack ; End Point TNS ;
+--------------------------------------------------------------------------------+-------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.327 ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.347 ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.362 ; 0.000         ;
; altera_reserved_tck                                                            ; 0.363 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 0.363 ; 0.000         ;
+--------------------------------------------------------------------------------+-------+---------------+


+---------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery Summary                                                                   ;
+--------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                          ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 7.228  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 7.764  ; 0.000         ;
; altera_reserved_tck                                                            ; 48.511 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 63.461 ; 0.000         ;
+--------------------------------------------------------------------------------+--------+---------------+


+--------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal Summary                                                                   ;
+--------------------------------------------------------------------------------+-------+---------------+
; Clock                                                                          ; Slack ; End Point TNS ;
+--------------------------------------------------------------------------------+-------+---------------+
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 0.180 ; 0.000         ;
; altera_reserved_tck                                                            ; 1.287 ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 1.289 ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 2.616 ; 0.000         ;
+--------------------------------------------------------------------------------+-------+---------------+


+---------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width Summary                                                        ;
+--------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                          ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 4.091  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.545  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.162 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[1]                           ; 17.424 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 32.951 ; 0.000         ;
; altera_reserved_tck                                                            ; 49.400 ; 0.000         ;
; FPGA_CLK                                                                       ; 99.779 ; 0.000         ;
+--------------------------------------------------------------------------------+--------+---------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                         ;
+--------+--------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                        ; To Node                                                                                                                 ; Launch Clock                                         ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; -3.268 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.977      ;
; -3.180 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.889      ;
; -3.143 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[27]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.852      ;
; -3.141 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.850      ;
; -3.100 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.385     ; 4.818      ;
; -3.055 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[27]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.764      ;
; -3.025 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[21]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.392     ; 4.736      ;
; -3.016 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[27]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.725      ;
; -3.012 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.385     ; 4.730      ;
; -2.989 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[22]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.392     ; 4.700      ;
; -2.981 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.690      ;
; -2.973 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.385     ; 4.691      ;
; -2.952 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[30]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.385     ; 4.670      ;
; -2.951 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[22]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.392     ; 4.662      ;
; -2.937 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[21]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.392     ; 4.648      ;
; -2.934 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[23]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.643      ;
; -2.914 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[30]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.385     ; 4.632      ;
; -2.898 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[21]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.392     ; 4.609      ;
; -2.893 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[28]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.602      ;
; -2.883 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.403     ; 4.583      ;
; -2.863 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[26]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.572      ;
; -2.863 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[22]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.392     ; 4.574      ;
; -2.856 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[27]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.565      ;
; -2.855 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[28]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.564      ;
; -2.846 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[23]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.555      ;
; -2.845 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[22]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.392     ; 4.556      ;
; -2.845 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[26]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.554      ;
; -2.826 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[30]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.385     ; 4.544      ;
; -2.813 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.385     ; 4.531      ;
; -2.808 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[30]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.385     ; 4.526      ;
; -2.807 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[23]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.516      ;
; -2.800 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[1]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.389     ; 4.514      ;
; -2.791 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[25]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.500      ;
; -2.775 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.997     ; 4.881      ;
; -2.767 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[28]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.476      ;
; -2.761 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.403     ; 4.461      ;
; -2.757 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[26]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.466      ;
; -2.749 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[28]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.458      ;
; -2.738 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[21]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.392     ; 4.449      ;
; -2.719 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[26]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.428      ;
; -2.703 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[25]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.412      ;
; -2.698 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.003     ; 4.798      ;
; -2.678 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[1]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.389     ; 4.392      ;
; -2.664 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[25]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.373      ;
; -2.659 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.032     ; 4.730      ;
; -2.653 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.997     ; 4.759      ;
; -2.647 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[23]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.356      ;
; -2.636 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.400     ; 4.339      ;
; -2.627 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[24]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.336      ;
; -2.618 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.995     ; 4.726      ;
; -2.613 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.409     ; 4.307      ;
; -2.610 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.997     ; 4.716      ;
; -2.597 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.074     ; 4.626      ;
; -2.596 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.027     ; 4.672      ;
; -2.589 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[24]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.298      ;
; -2.579 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[19]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.390     ; 4.292      ;
; -2.571 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[43] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.397     ; 4.277      ;
; -2.559 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.001     ; 4.661      ;
; -2.556 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.050     ; 4.609      ;
; -2.540 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[18]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.249      ;
; -2.537 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.032     ; 4.608      ;
; -2.514 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[20]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.020     ; 4.597      ;
; -2.514 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.400     ; 4.217      ;
; -2.513 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[14]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.383     ; 4.233      ;
; -2.504 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[25]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.213      ;
; -2.502 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[18]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.211      ;
; -2.501 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[24]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.210      ;
; -2.496 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.995     ; 4.604      ;
; -2.491 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.409     ; 4.185      ;
; -2.491 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[19]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.390     ; 4.204      ;
; -2.488 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.997     ; 4.594      ;
; -2.483 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[24]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.192      ;
; -2.476 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[20]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.020     ; 4.559      ;
; -2.475 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.074     ; 4.504      ;
; -2.475 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[14]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.383     ; 4.195      ;
; -2.474 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.027     ; 4.550      ;
; -2.467 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[17]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.002     ; 4.568      ;
; -2.466 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.997     ; 4.572      ;
; -2.452 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[19]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.390     ; 4.165      ;
; -2.449 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[43] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.397     ; 4.155      ;
; -2.438 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.030     ; 4.511      ;
; -2.438 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[0]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.403     ; 4.138      ;
; -2.435 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.027     ; 4.511      ;
; -2.434 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.050     ; 4.487      ;
; -2.425 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.074     ; 4.454      ;
; -2.419 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.047     ; 4.475      ;
; -2.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[18]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.123      ;
; -2.408 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.033     ; 4.478      ;
; -2.399 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.997     ; 4.505      ;
; -2.396 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.080     ; 4.419      ;
; -2.396 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[18]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.394     ; 4.105      ;
; -2.388 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[20]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.020     ; 4.471      ;
; -2.387 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[14]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.383     ; 4.107      ;
; -2.384 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.003     ; 4.484      ;
; -2.379 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[17]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.002     ; 4.480      ;
; -2.379 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.003     ; 4.479      ;
; -2.371 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[30] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.415     ; 4.059      ;
; -2.371 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.030     ; 4.444      ;
; -2.371 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[0]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.403     ; 4.071      ;
; -2.370 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[20]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -1.020     ; 4.453      ;
+--------+--------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                                        ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                         ; To Node                                      ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.419 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.164     ; 10.944     ;
; 0.495 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.164     ; 10.868     ;
; 0.616 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.160     ; 10.751     ;
; 0.625 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.167     ; 10.735     ;
; 0.663 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.160     ; 10.704     ;
; 0.701 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.167     ; 10.659     ;
; 0.711 ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.153     ; 10.663     ;
; 0.738 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[8]                             ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.149     ; 10.640     ;
; 0.747 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.160     ; 10.620     ;
; 0.762 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.164     ; 10.601     ;
; 0.770 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.154     ; 10.603     ;
; 0.775 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.160     ; 10.592     ;
; 0.778 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.165     ; 10.584     ;
; 0.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.148     ; 10.593     ;
; 0.792 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.164     ; 10.571     ;
; 0.793 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.161     ; 10.573     ;
; 0.822 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.163     ; 10.542     ;
; 0.825 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.160     ; 10.542     ;
; 0.833 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.148     ; 10.546     ;
; 0.854 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.165     ; 10.508     ;
; 0.857 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.157     ; 10.513     ;
; 0.869 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.163     ; 10.495     ;
; 0.877 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.161     ; 10.489     ;
; 0.899 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[8]                             ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.161     ; 10.467     ;
; 0.917 ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.156     ; 10.454     ;
; 0.917 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.148     ; 10.462     ;
; 0.933 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.157     ; 10.437     ;
; 0.940 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.142     ; 10.445     ;
; 0.941 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[8]                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.142     ; 10.444     ;
; 0.952 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.152     ; 10.423     ;
; 0.953 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.163     ; 10.411     ;
; 0.963 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.149     ; 10.415     ;
; 0.968 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.167     ; 10.392     ;
; 0.975 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.161     ; 10.391     ;
; 0.976 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.157     ; 10.394     ;
; 0.981 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.163     ; 10.383     ;
; 0.995 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.148     ; 10.384     ;
; 0.998 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.167     ; 10.362     ;
; 0.999 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.164     ; 10.364     ;
; 1.004 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.160     ; 10.363     ;
; 1.021 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.160     ; 10.346     ;
; 1.022 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.161     ; 10.344     ;
; 1.028 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.152     ; 10.347     ;
; 1.031 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.163     ; 10.333     ;
; 1.040 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.149     ; 10.338     ;
; 1.052 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[8]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.167     ; 10.308     ;
; 1.054 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.153     ; 10.320     ;
; 1.058 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.148     ; 10.321     ;
; 1.070 ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.154     ; 10.303     ;
; 1.083 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.164     ; 10.280     ;
; 1.089 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[8]                             ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.161     ; 10.277     ;
; 1.094 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[22]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 10.262     ;
; 1.095 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[14]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.160     ; 10.272     ;
; 1.097 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.164     ; 10.266     ;
; 1.101 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.153     ; 10.273     ;
; 1.102 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[8]                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.154     ; 10.271     ;
; 1.106 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.161     ; 10.260     ;
; 1.110 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.154     ; 10.263     ;
; 1.121 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.165     ; 10.241     ;
; 1.128 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[8]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.167     ; 10.232     ;
; 1.129 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.155     ; 10.243     ;
; 1.134 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.161     ; 10.232     ;
; 1.140 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[9]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.165     ; 10.222     ;
; 1.149 ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.146     ; 10.232     ;
; 1.149 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.148     ; 10.230     ;
; 1.151 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.165     ; 10.211     ;
; 1.152 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.162     ; 10.213     ;
; 1.165 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|CartLogic:emu_cart|oss_bank[1]                       ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 10.191     ;
; 1.166 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|CartLogic:emu_cart|oss_bank[0]                       ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 10.190     ;
; 1.173 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.164     ; 10.190     ;
; 1.174 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.148     ; 10.205     ;
; 1.176 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.152     ; 10.199     ;
; 1.178 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[21]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 10.178     ;
; 1.184 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.161     ; 10.182     ;
; 1.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.153     ; 10.189     ;
; 1.195 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.152     ; 10.180     ;
; 1.196 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[11]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.146     ; 10.185     ;
; 1.196 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.148     ; 10.183     ;
; 1.200 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.157     ; 10.170     ;
; 1.208 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.147     ; 10.172     ;
; 1.210 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.163     ; 10.154     ;
; 1.213 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.153     ; 10.161     ;
; 1.216 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[9]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.165     ; 10.146     ;
; 1.225 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.160     ; 10.142     ;
; 1.227 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.163     ; 10.137     ;
; 1.230 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.157     ; 10.140     ;
; 1.231 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.154     ; 10.142     ;
; 1.236 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.162     ; 10.129     ;
; 1.244 ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.141     ; 10.142     ;
; 1.244 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[19]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 10.112     ;
; 1.249 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[8]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.163     ; 10.115     ;
; 1.251 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[14]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.148     ; 10.128     ;
; 1.257 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[17]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 10.099     ;
; 1.263 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.153     ; 10.111     ;
; 1.272 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.160     ; 10.095     ;
; 1.280 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[8]                             ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.164     ; 10.083     ;
; 1.280 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.148     ; 10.099     ;
; 1.283 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[18]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.171     ; 10.073     ;
; 1.292 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.142     ; 10.093     ;
; 1.292 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[8]                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.154     ; 10.081     ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                                                   ;
+-------+-------------------------+-------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node               ; To Node           ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------+-------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 4.575 ; svideo_yout_dly2[5]     ; cvbs2_out[1]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.975      ;
; 4.579 ; svideo_yout_dly2[6]     ; cvbs2_out[1]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.971      ;
; 4.590 ; svideo_yout_dly2[5]     ; cvbs2_out[0]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.960      ;
; 4.594 ; svideo_yout_dly2[6]     ; cvbs2_out[0]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.956      ;
; 4.631 ; svideo_yout_dly2[6]     ; cvbs2_out[3]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.919      ;
; 4.631 ; svideo_yout_dly2[5]     ; cvbs2_out[3]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.919      ;
; 4.707 ; svideo_yout_dly2[6]     ; cvbs2_out[2]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.843      ;
; 4.709 ; svideo_yout_dly2[5]     ; cvbs2_out[2]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.841      ;
; 4.758 ; svideo_yout_dly2[5]     ; cvbs2_out[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.790      ;
; 4.762 ; svideo_yout_dly2[6]     ; cvbs2_out[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.786      ;
; 4.824 ; svideo_yout_dly2[5]     ; cvbs2_out[4]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.725      ;
; 4.828 ; svideo_yout_dly2[6]     ; cvbs2_out[4]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.721      ;
; 4.845 ; svideo_yout_dly2[4]     ; cvbs2_out[1]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.705      ;
; 4.860 ; svideo_yout_dly2[4]     ; cvbs2_out[0]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.690      ;
; 4.863 ; svideo_yout_dly2[7]     ; cvbs2_out[1]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.687      ;
; 4.881 ; svideo_yout_dly2[7]     ; cvbs2_out[0]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.669      ;
; 4.901 ; svideo_yout_dly2[4]     ; cvbs2_out[3]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.649      ;
; 4.909 ; svideo_yout_dly2[7]     ; cvbs2_out[3]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.641      ;
; 4.965 ; svideo_yout_dly2[5]     ; cvbs2_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.583      ;
; 4.969 ; svideo_yout_dly2[6]     ; cvbs2_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.579      ;
; 4.985 ; svideo_yout_dly2[7]     ; cvbs2_out[2]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.565      ;
; 5.004 ; svideo_yout_dly2[4]     ; cvbs2_out[2]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.546      ;
; 5.005 ; svideo_yout_dly2[5]     ; cvbs2_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.066     ; 3.546      ;
; 5.009 ; svideo_yout_dly2[6]     ; cvbs2_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.066     ; 3.542      ;
; 5.028 ; svideo_yout_dly2[4]     ; cvbs2_out[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.520      ;
; 5.055 ; svideo_yout_dly2[3]     ; cvbs2_out[1]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.495      ;
; 5.070 ; svideo_yout_dly2[3]     ; cvbs2_out[0]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.480      ;
; 5.088 ; svideo_yout_dly2[2]     ; cvbs2_out[1]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.462      ;
; 5.094 ; svideo_yout_dly2[7]     ; cvbs2_out[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.454      ;
; 5.094 ; svideo_yout_dly2[4]     ; cvbs2_out[4]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.455      ;
; 5.106 ; svideo_yout_dly2[2]     ; cvbs2_out[0]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.444      ;
; 5.111 ; svideo_yout_dly2[3]     ; cvbs2_out[3]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.439      ;
; 5.133 ; svideo_yout_dly2[7]     ; cvbs2_out[4]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.416      ;
; 5.134 ; svideo_yout_dly2[2]     ; cvbs2_out[3]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.416      ;
; 5.145 ; svideo_yout_dly2[1]     ; cvbs2_out[1]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.405      ;
; 5.160 ; svideo_yout_dly2[1]     ; cvbs2_out[0]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.390      ;
; 5.201 ; svideo_yout_dly2[1]     ; cvbs2_out[3]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.349      ;
; 5.210 ; svideo_yout_dly2[2]     ; cvbs2_out[2]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.340      ;
; 5.214 ; svideo_yout_dly2[3]     ; cvbs2_out[2]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.336      ;
; 5.235 ; svideo_yout_dly2[4]     ; cvbs2_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.313      ;
; 5.238 ; svideo_yout_dly2[3]     ; cvbs2_out[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.310      ;
; 5.275 ; svideo_yout_dly2[4]     ; cvbs2_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.066     ; 3.276      ;
; 5.301 ; svideo_yout_dly2[7]     ; cvbs2_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.247      ;
; 5.304 ; svideo_yout_dly2[1]     ; cvbs2_out[2]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.246      ;
; 5.304 ; svideo_yout_dly2[3]     ; cvbs2_out[4]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.245      ;
; 5.308 ; svideo_yout_dly2[2]     ; cvbs2_out[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.240      ;
; 5.328 ; svideo_yout_dly2[1]     ; cvbs2_out[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.220      ;
; 5.341 ; svideo_yout_dly2[7]     ; cvbs2_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.066     ; 3.210      ;
; 5.358 ; svideo_yout_dly2[2]     ; cvbs2_out[4]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.191      ;
; 5.394 ; svideo_yout_dly2[1]     ; cvbs2_out[4]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 3.155      ;
; 5.407 ; svideo_yout_dly2[0]     ; cvbs2_out[1]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.143      ;
; 5.425 ; svideo_yout_dly2[0]     ; cvbs2_out[0]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.125      ;
; 5.445 ; svideo_yout_dly2[3]     ; cvbs2_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.103      ;
; 5.453 ; svideo_yout_dly2[0]     ; cvbs2_out[3]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.097      ;
; 5.485 ; svideo_yout_dly2[3]     ; cvbs2_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.066     ; 3.066      ;
; 5.515 ; svideo_yout_dly2[2]     ; cvbs2_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.033      ;
; 5.529 ; svideo_yout_dly2[0]     ; cvbs2_out[2]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.067     ; 3.021      ;
; 5.535 ; svideo_yout_dly2[1]     ; cvbs2_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 3.013      ;
; 5.555 ; svideo_yout_dly2[2]     ; cvbs2_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.066     ; 2.996      ;
; 5.575 ; svideo_yout_dly2[1]     ; cvbs2_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.066     ; 2.976      ;
; 5.642 ; svideo_yout_dly2[0]     ; cvbs2_out[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 2.906      ;
; 5.646 ; svideo:svideo|chroma[2] ; cvbs1_out[9]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.166     ; 2.917      ;
; 5.650 ; svideo:svideo|chroma[4] ; cvbs1_out[9]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.166     ; 2.913      ;
; 5.669 ; cvbs1_out[2]            ; cvbs2_out[0]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.063     ; 2.885      ;
; 5.677 ; svideo_yout_dly2[0]     ; cvbs2_out[4]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.068     ; 2.872      ;
; 5.695 ; cvbs1_out[3]            ; cvbs2_out[1]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.063     ; 2.859      ;
; 5.740 ; cvbs1_out[5]            ; cvbs2_out[3]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.063     ; 2.814      ;
; 5.762 ; svideo:svideo|chroma[2] ; cvbs1_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.166     ; 2.801      ;
; 5.766 ; svideo:svideo|chroma[4] ; cvbs1_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.166     ; 2.797      ;
; 5.774 ; cvbs1_out[4]            ; cvbs2_out[2]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.063     ; 2.780      ;
; 5.785 ; svideo:svideo|chroma[2] ; cvbs1_out[8]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.166     ; 2.778      ;
; 5.795 ; svideo:svideo|chroma[4] ; cvbs1_out[8]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.166     ; 2.768      ;
; 5.849 ; svideo_yout_dly2[0]     ; cvbs2_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.069     ; 2.699      ;
; 5.854 ; svideo:svideo|chroma[5] ; cvbs1_out[8]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.166     ; 2.709      ;
; 5.864 ; svideo:svideo|chroma[0] ; cvbs1_out[9]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.166     ; 2.699      ;
; 5.878 ; svideo:svideo|chroma[2] ; cvbs1_out[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.166     ; 2.685      ;
; 5.882 ; svideo:svideo|chroma[4] ; cvbs1_out[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.166     ; 2.681      ;
; 5.883 ; svideo:svideo|chroma[5] ; cvbs1_out[9]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.166     ; 2.680      ;
; 5.889 ; svideo_yout_dly2[0]     ; cvbs2_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.066     ; 2.662      ;
; 5.901 ; svideo:svideo|chroma[2] ; cvbs1_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.166     ; 2.662      ;
; 5.911 ; svideo:svideo|chroma[4] ; cvbs1_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.166     ; 2.652      ;
; 5.936 ; svideo:svideo|chroma[7] ; cvbs1_out[8]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.166     ; 2.627      ;
; 5.939 ; svideo:svideo|chroma[1] ; cvbs1_out[8]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.166     ; 2.624      ;
; 5.965 ; svideo:svideo|chroma[7] ; cvbs1_out[9]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.166     ; 2.598      ;
; 5.967 ; svideo:svideo|chroma[6] ; cvbs1_out[9]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.166     ; 2.596      ;
; 5.968 ; svideo:svideo|chroma[1] ; cvbs1_out[9]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.166     ; 2.595      ;
; 5.970 ; svideo:svideo|chroma[5] ; cvbs1_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.166     ; 2.593      ;
; 5.980 ; svideo:svideo|chroma[0] ; cvbs1_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.166     ; 2.583      ;
; 5.992 ; svideo:svideo|luma[1]   ; luma_saturated[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.158     ; 2.579      ;
; 5.994 ; svideo:svideo|chroma[2] ; cvbs1_out[3]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.166     ; 2.569      ;
; 5.999 ; svideo:svideo|chroma[5] ; cvbs1_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.166     ; 2.564      ;
; 6.009 ; svideo:svideo|chroma[0] ; cvbs1_out[8]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.166     ; 2.554      ;
; 6.017 ; svideo:svideo|chroma[2] ; cvbs1_out[4]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.166     ; 2.546      ;
; 6.021 ; svideo:svideo|luma[1]   ; luma_saturated[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.158     ; 2.550      ;
; 6.055 ; svideo:svideo|chroma[1] ; cvbs1_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.166     ; 2.508      ;
; 6.081 ; svideo:svideo|chroma[3] ; cvbs1_out[8]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.166     ; 2.482      ;
; 6.083 ; svideo:svideo|chroma[6] ; cvbs1_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.166     ; 2.480      ;
; 6.084 ; svideo:svideo|chroma[1] ; cvbs1_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.166     ; 2.479      ;
; 6.095 ; svideo:svideo|chroma[6] ; cvbs1_out[8]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.166     ; 2.468      ;
; 6.096 ; svideo:svideo|chroma[0] ; cvbs1_out[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.166     ; 2.467      ;
+-------+-------------------------+-------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                 ;
+--------+-----------------------------------------------+----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                     ; To Node                                            ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------+----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 26.557 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.083     ; 6.682      ;
; 26.557 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.083     ; 6.682      ;
; 26.592 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.648      ;
; 26.592 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.648      ;
; 26.838 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.402      ;
; 26.838 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.402      ;
; 26.873 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.081     ; 6.368      ;
; 26.873 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.081     ; 6.368      ;
; 26.877 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.363      ;
; 26.877 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.363      ;
; 26.939 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.083     ; 6.300      ;
; 26.939 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.083     ; 6.300      ;
; 26.958 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.184     ; 6.180      ;
; 26.958 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.184     ; 6.180      ;
; 26.980 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.184     ; 6.158      ;
; 26.980 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.184     ; 6.158      ;
; 27.038 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.083     ; 6.201      ;
; 27.038 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.083     ; 6.201      ;
; 27.063 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.085     ; 6.174      ;
; 27.073 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.167      ;
; 27.073 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.167      ;
; 27.098 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.084     ; 6.140      ;
; 27.115 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.125      ;
; 27.115 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.125      ;
; 27.158 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.081     ; 6.083      ;
; 27.158 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.081     ; 6.083      ;
; 27.220 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.020      ;
; 27.220 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.020      ;
; 27.235 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.184     ; 5.903      ;
; 27.235 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.184     ; 5.903      ;
; 27.237 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.003      ;
; 27.237 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 6.003      ;
; 27.257 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.184     ; 5.881      ;
; 27.257 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.184     ; 5.881      ;
; 27.282 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.185     ; 5.855      ;
; 27.282 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.185     ; 5.855      ;
; 27.304 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.185     ; 5.833      ;
; 27.304 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.185     ; 5.833      ;
; 27.358 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 5.882      ;
; 27.358 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 5.882      ;
; 27.383 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.084     ; 5.855      ;
; 27.396 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.081     ; 5.845      ;
; 27.396 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.081     ; 5.845      ;
; 27.420 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.083     ; 5.819      ;
; 27.420 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.083     ; 5.819      ;
; 27.434 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.086     ; 5.802      ;
; 27.435 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.083     ; 5.804      ;
; 27.435 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.083     ; 5.804      ;
; 27.436 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.086     ; 5.800      ;
; 27.445 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.085     ; 5.792      ;
; 27.480 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[10]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.085     ; 5.757      ;
; 27.481 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.085     ; 5.756      ;
; 27.483 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.085     ; 5.754      ;
; 27.485 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.085     ; 5.752      ;
; 27.518 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.081     ; 5.723      ;
; 27.518 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.081     ; 5.723      ;
; 27.529 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[4]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.182     ; 5.611      ;
; 27.530 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.182     ; 5.610      ;
; 27.530 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[14]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.182     ; 5.610      ;
; 27.552 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.083     ; 5.687      ;
; 27.552 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.083     ; 5.687      ;
; 27.552 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.184     ; 5.586      ;
; 27.552 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.184     ; 5.586      ;
; 27.574 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.184     ; 5.564      ;
; 27.574 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.184     ; 5.564      ;
; 27.579 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[5]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.182     ; 5.561      ;
; 27.580 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[9]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.182     ; 5.560      ;
; 27.580 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[10]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.182     ; 5.560      ;
; 27.582 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[11]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.182     ; 5.558      ;
; 27.582 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[12]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.182     ; 5.558      ;
; 27.596 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 5.644      ;
; 27.596 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 5.644      ;
; 27.608 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.087     ; 5.627      ;
; 27.610 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.087     ; 5.625      ;
; 27.621 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.084     ; 5.617      ;
; 27.643 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.086     ; 5.593      ;
; 27.643 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid_c ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.181     ; 5.498      ;
; 27.645 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.086     ; 5.591      ;
; 27.654 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[10]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.086     ; 5.582      ;
; 27.655 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.086     ; 5.581      ;
; 27.657 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.086     ; 5.579      ;
; 27.658 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.086     ; 5.578      ;
; 27.659 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.086     ; 5.577      ;
; 27.660 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.086     ; 5.576      ;
; 27.683 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[4]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.181     ; 5.458      ;
; 27.684 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.181     ; 5.457      ;
; 27.684 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[14]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.181     ; 5.457      ;
; 27.689 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[10]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.085     ; 5.548      ;
; 27.690 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.085     ; 5.547      ;
; 27.692 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.085     ; 5.545      ;
; 27.694 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.085     ; 5.543      ;
; 27.704 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[10]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.085     ; 5.533      ;
; 27.705 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.085     ; 5.532      ;
; 27.707 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.085     ; 5.530      ;
; 27.709 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.085     ; 5.528      ;
; 27.716 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 5.524      ;
; 27.716 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 5.524      ;
; 27.718 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 5.522      ;
; 27.718 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.082     ; 5.522      ;
; 27.733 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[5]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.181     ; 5.408      ;
+--------+-----------------------------------------------+----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                      ;
+--------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                                                                                                                                        ; To Node                                                                                                                                                                                                               ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+--------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 46.239 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                              ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.254      ; 4.014      ;
; 46.306 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.258      ; 3.951      ;
; 46.591 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                   ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.258      ; 3.666      ;
; 46.619 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.257      ; 3.637      ;
; 46.649 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.258      ; 3.608      ;
; 46.717 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.257      ; 3.539      ;
; 46.775 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                              ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.254      ; 3.478      ;
; 46.820 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[3]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.257      ; 3.436      ;
; 46.884 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.253      ; 3.368      ;
; 46.991 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                   ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.253      ; 3.261      ;
; 47.067 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.254      ; 3.186      ;
; 47.208 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.253      ; 3.044      ;
; 47.236 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.258      ; 3.021      ;
; 47.255 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.254      ; 2.998      ;
; 47.334 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.250      ; 2.915      ;
; 47.427 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|design_hash_reg[0]                                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.248      ; 2.820      ;
; 47.440 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.257      ; 2.816      ;
; 47.466 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.254      ; 2.787      ;
; 47.561 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.254      ; 2.692      ;
; 47.584 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.257      ; 2.672      ;
; 47.716 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[0]                                                                                                                               ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.250      ; 2.533      ;
; 47.995 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.254      ; 2.258      ;
; 48.030 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[0]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.249      ; 2.218      ;
; 48.481 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo_bypass_reg                                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.254      ; 1.772      ;
; 95.623 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 4.317      ;
; 95.623 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 4.317      ;
; 95.623 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 4.317      ;
; 95.623 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 4.317      ;
; 95.623 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 4.317      ;
; 95.623 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 4.317      ;
; 95.623 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 4.317      ;
; 95.623 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 4.317      ;
; 95.623 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 4.317      ;
; 95.736 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.310     ; 3.953      ;
; 95.737 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.310     ; 3.952      ;
; 95.757 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.310     ; 3.932      ;
; 95.768 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.310     ; 3.921      ;
; 95.777 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.310     ; 3.912      ;
; 95.809 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.064     ; 4.126      ;
; 95.809 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.064     ; 4.126      ;
; 95.809 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.064     ; 4.126      ;
; 95.809 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.064     ; 4.126      ;
; 95.809 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.064     ; 4.126      ;
; 95.809 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.064     ; 4.126      ;
; 95.809 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.064     ; 4.126      ;
; 95.809 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.064     ; 4.126      ;
; 95.854 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.310     ; 3.835      ;
; 95.877 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.310     ; 3.812      ;
; 95.888 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.060     ; 4.051      ;
; 95.896 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.310     ; 3.793      ;
; 95.937 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.314     ; 3.748      ;
; 95.942 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.314     ; 3.743      ;
; 95.978 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.314     ; 3.707      ;
; 95.983 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.314     ; 3.702      ;
; 95.983 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.314     ; 3.702      ;
; 95.989 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.314     ; 3.696      ;
; 96.007 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[3]                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.057     ; 3.935      ;
; 96.007 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[2]                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.057     ; 3.935      ;
; 96.007 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[1]                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.057     ; 3.935      ;
; 96.007 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[0]                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.057     ; 3.935      ;
; 96.041 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.314     ; 3.644      ;
; 96.080 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.314     ; 3.605      ;
; 96.081 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 3.851      ;
; 96.081 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 3.851      ;
; 96.081 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][3]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 3.851      ;
; 96.081 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 3.851      ;
; 96.081 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 3.851      ;
; 96.141 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 3.795      ;
; 96.141 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 3.795      ;
; 96.141 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 3.795      ;
; 96.141 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 3.795      ;
; 96.141 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 3.795      ;
; 96.184 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[2]                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.057     ; 3.758      ;
; 96.184 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[1]                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.057     ; 3.758      ;
; 96.184 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[0]                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.057     ; 3.758      ;
; 96.192 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[3]                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.058     ; 3.749      ;
; 96.194 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 3.742      ;
; 96.194 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 3.742      ;
; 96.194 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 3.742      ;
; 96.194 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 3.742      ;
; 96.194 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 3.742      ;
; 96.194 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 3.742      ;
; 96.194 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 3.742      ;
; 96.194 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 3.742      ;
; 96.201 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 3.731      ;
; 96.201 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 3.731      ;
; 96.201 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 3.731      ;
; 96.201 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 3.731      ;
; 96.201 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 3.731      ;
; 96.236 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.064     ; 3.699      ;
; 96.238 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 3.698      ;
; 96.238 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 3.698      ;
; 96.238 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 3.698      ;
; 96.238 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 3.698      ;
; 96.239 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.060     ; 3.700      ;
; 96.239 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.060     ; 3.700      ;
; 96.239 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.060     ; 3.700      ;
; 96.239 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.060     ; 3.700      ;
; 96.240 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[3]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 3.696      ;
; 96.240 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[3]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 3.696      ;
+--------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                                                              ;
+-------+---------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                 ; To Node                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.327 ; svideo:svideo|luma[7]     ; svideo:svideo|luma_1[7]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.141      ; 0.659      ;
; 0.327 ; svideo:svideo|luma[8]     ; svideo:svideo|luma_1[8]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.141      ; 0.659      ;
; 0.328 ; svideo:svideo|luma[3]     ; svideo:svideo|luma_1[3]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.141      ; 0.660      ;
; 0.406 ; svideo_yout_dly1[1]       ; svideo_yout_dly2[1]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.640      ;
; 0.407 ; svideo_yout_dly1[4]       ; svideo_yout_dly2[4]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.641      ;
; 0.408 ; svideo:svideo|luma_acc[7] ; svideo_yout_dly1[5]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.641      ;
; 0.553 ; svideo:svideo|luma_2[9]   ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.786      ;
; 0.556 ; svideo_yout_dly1[2]       ; svideo_yout_dly2[2]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.790      ;
; 0.557 ; svideo:svideo|luma_1[8]   ; svideo:svideo|luma_2[8]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.064      ; 0.792      ;
; 0.557 ; svideo_yout_dly1[3]       ; svideo_yout_dly2[3]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.791      ;
; 0.557 ; svideo_yout_dly1[0]       ; svideo_yout_dly2[0]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.791      ;
; 0.558 ; svideo:svideo|luma_acc[3] ; svideo_yout_dly1[1]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.792      ;
; 0.558 ; svideo_yout_dly1[7]       ; svideo_yout_dly2[7]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.792      ;
; 0.559 ; svideo:svideo|luma_acc[9] ; svideo_yout_dly1[7]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.793      ;
; 0.559 ; svideo_yout_dly1[5]       ; svideo_yout_dly2[5]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.793      ;
; 0.561 ; svideo:svideo|luma_acc[8] ; svideo_yout_dly1[6]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.794      ;
; 0.580 ; svideo:svideo|luma_1[1]   ; svideo:svideo|luma_2[1]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.064      ; 0.815      ;
; 0.580 ; svideo:svideo|luma_acc[6] ; svideo_yout_dly1[4]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.814      ;
; 0.581 ; svideo:svideo|luma_1[3]   ; svideo:svideo|luma_2[3]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.064      ; 0.816      ;
; 0.581 ; svideo:svideo|luma_1[7]   ; svideo:svideo|luma_2[7]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.064      ; 0.816      ;
; 0.582 ; svideo:svideo|luma_acc[4] ; svideo_yout_dly1[2]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.816      ;
; 0.591 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.824      ;
; 0.596 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.829      ;
; 0.597 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.830      ;
; 0.611 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.844      ;
; 0.708 ; svideo:svideo|luma[7]     ; luma_saturated[7]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.141      ; 1.040      ;
; 0.713 ; svideo:svideo|luma[3]     ; luma_saturated[3]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.141      ; 1.045      ;
; 0.720 ; svideo:svideo|luma_1[2]   ; svideo:svideo|luma_2[2]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.064      ; 0.955      ;
; 0.720 ; svideo:svideo|luma_acc[5] ; svideo_yout_dly1[3]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.954      ;
; 0.742 ; svideo:svideo|luma_1[0]   ; svideo:svideo|luma_2[0]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.065      ; 0.978      ;
; 0.743 ; svideo:svideo|luma_1[5]   ; svideo:svideo|luma_2[5]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.065      ; 0.979      ;
; 0.743 ; svideo:svideo|luma_1[9]   ; svideo:svideo|luma_2[9]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.065      ; 0.979      ;
; 0.744 ; luma_saturated[8]         ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.977      ;
; 0.747 ; luma_saturated[3]         ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.980      ;
; 0.754 ; luma_saturated[4]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.987      ;
; 0.754 ; svideo:svideo|luma_2[3]   ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.988      ;
; 0.756 ; svideo:svideo|luma_acc[2] ; svideo_yout_dly1[0]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.990      ;
; 0.757 ; luma_saturated[9]         ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.990      ;
; 0.758 ; svideo:svideo|luma_2[1]   ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.992      ;
; 0.760 ; svideo_yout_dly1[6]       ; svideo_yout_dly2[6]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.994      ;
; 0.763 ; svideo:svideo|luma_2[0]   ; svideo:svideo|luma_acc[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.996      ;
; 0.784 ; luma_saturated[2]         ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.017      ;
; 0.787 ; luma_saturated[6]         ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.020      ;
; 0.787 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.021      ;
; 0.790 ; luma_saturated[7]         ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.023      ;
; 0.793 ; svideo:svideo|luma_2[7]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.027      ;
; 0.793 ; svideo:svideo|luma_2[5]   ; svideo:svideo|luma_acc[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.027      ;
; 0.799 ; svideo:svideo|luma_2[8]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.033      ;
; 0.876 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.109      ;
; 0.878 ; svideo:svideo|luma[0]     ; luma_saturated[0]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.145      ; 1.214      ;
; 0.879 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.112      ;
; 0.884 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.117      ;
; 0.885 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.118      ;
; 0.890 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.123      ;
; 0.895 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.128      ;
; 0.896 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.129      ;
; 0.908 ; svideo:svideo|luma[8]     ; luma_saturated[8]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.141      ; 1.240      ;
; 0.917 ; svideo:svideo|luma_1[4]   ; svideo:svideo|luma_2[4]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.065      ; 1.153      ;
; 0.918 ; svideo:svideo|luma_1[6]   ; svideo:svideo|luma_2[6]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.065      ; 1.154      ;
; 0.930 ; svideo:svideo|luma[5]     ; svideo:svideo|luma_1[5]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.145      ; 1.266      ;
; 0.934 ; svideo:svideo|luma[0]     ; svideo:svideo|luma_1[0]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.145      ; 1.270      ;
; 0.937 ; svideo:svideo|luma[4]     ; svideo:svideo|luma_1[4]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.145      ; 1.273      ;
; 0.945 ; svideo:svideo|luma[2]     ; svideo:svideo|luma_1[2]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.145      ; 1.281      ;
; 0.953 ; svideo:svideo|luma[0]     ; luma_saturated[1]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.145      ; 1.289      ;
; 0.961 ; svideo:svideo|luma[4]     ; luma_saturated[4]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.145      ; 1.297      ;
; 0.961 ; svideo:svideo|luma[6]     ; luma_saturated[6]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.145      ; 1.297      ;
; 0.962 ; svideo:svideo|luma[5]     ; luma_saturated[5]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.145      ; 1.298      ;
; 0.975 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.208      ;
; 0.978 ; svideo:svideo|luma[7]     ; luma_saturated[8]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.141      ; 1.310      ;
; 0.984 ; svideo:svideo|luma[3]     ; luma_saturated[4]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.141      ; 1.316      ;
; 0.986 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.219      ;
; 0.989 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.222      ;
; 0.990 ; svideo:svideo|luma[2]     ; luma_saturated[2]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.145      ; 1.326      ;
; 0.994 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.227      ;
; 0.995 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.228      ;
; 1.000 ; svideo:svideo|luma[1]     ; svideo:svideo|luma_1[1]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.145      ; 1.336      ;
; 1.000 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.233      ;
; 1.005 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.238      ;
; 1.008 ; svideo:svideo|luma[7]     ; luma_saturated[9]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.141      ; 1.340      ;
; 1.015 ; svideo:svideo|luma[3]     ; luma_saturated[5]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.141      ; 1.347      ;
; 1.020 ; luma_saturated[4]         ; cvbs1_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.253      ;
; 1.027 ; svideo:svideo|luma_2[0]   ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.260      ;
; 1.032 ; luma_saturated[3]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.265      ;
; 1.033 ; luma_saturated[8]         ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.266      ;
; 1.036 ; luma_saturated[5]         ; cvbs1_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.269      ;
; 1.040 ; svideo:svideo|luma_2[3]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.274      ;
; 1.043 ; svideo:svideo|luma_2[1]   ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.277      ;
; 1.051 ; svideo:svideo|luma_2[0]   ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.284      ;
; 1.051 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.285      ;
; 1.055 ; luma_saturated[2]         ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.288      ;
; 1.055 ; luma_saturated[4]         ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.288      ;
; 1.058 ; luma_saturated[6]         ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.291      ;
; 1.070 ; svideo:svideo|luma_2[8]   ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.304      ;
; 1.071 ; luma_saturated[1]         ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.304      ;
; 1.075 ; luma_saturated[7]         ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.308      ;
; 1.082 ; svideo:svideo|luma_2[7]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.316      ;
; 1.084 ; svideo:svideo|luma_2[5]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.318      ;
; 1.085 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.318      ;
; 1.086 ; luma_saturated[2]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.319      ;
; 1.088 ; luma_saturated[6]         ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.321      ;
+-------+---------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                              ;
+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                  ; To Node                                                                                                                                                                                                                                  ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.347 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|last_line_of_instruction_reg                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|last_line_of_instruction_reg                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 0.597      ;
; 0.347 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wsync_reg                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wsync_reg                                                                                                                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 0.597      ;
; 0.349 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizep0_raw_reg[1]                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 0.939      ;
; 0.352 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[2]                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 0.942      ;
; 0.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[3]                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 0.943      ;
; 0.355 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[6]                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 0.944      ;
; 0.357 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[6]                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 0.947      ;
; 0.358 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[4]                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 0.947      ;
; 0.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[6]                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.385      ; 0.945      ;
; 0.361 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[1]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[1]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.065      ; 0.597      ;
; 0.361 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0]                                 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0]                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.065      ; 0.597      ;
; 0.361 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[0]                                 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[0]                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.065      ; 0.597      ;
; 0.361 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_clock_reg                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_clock_reg                                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.065      ; 0.597      ;
; 0.361 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|twotone_reg                                                                                           ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|twotone_reg                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.065      ; 0.597      ;
; 0.361 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[6]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[6]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.065      ; 0.597      ;
; 0.361 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|keyboard_overrun_reg                                                                                  ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|keyboard_overrun_reg                                                                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.065      ; 0.597      ;
; 0.361 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[0]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[0]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.065      ; 0.597      ;
; 0.361 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|keycode_latch_reg[0]                                   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|keycode_latch_reg[0]                                                                                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.065      ; 0.597      ;
; 0.361 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[5]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[5]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.065      ; 0.597      ;
; 0.361 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_ip_overrun_reg                                                                                 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_ip_overrun_reg                                                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.065      ; 0.597      ;
; 0.361 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_ip_framing_reg                                                                                 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_ip_framing_reg                                                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.065      ; 0.597      ;
; 0.361 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[1]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[1]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.065      ; 0.597      ;
; 0.361 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[2]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[2]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.065      ; 0.597      ;
; 0.361 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[6]                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.384      ; 0.946      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[0]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[0]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[1]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[1]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[3]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[3]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[2]                                                                                ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[2]                                                                                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[3]                                                                                ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[3]                                                                                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[1]                                                                                ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[1]                                                                                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_shift_reg[9]                                                                                   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_shift_reg[9]                                                                                                                                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_out_reg                                                                                        ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_out_reg                                                                                                                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_store_sp2                                                                                   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_store_sp2                                                                                                                                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|insn.dec_insn_fetch                                                                                  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|insn.dec_insn_fetch                                                                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[19]                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[19]                                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[14]                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[14]                                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[18]                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[18]                                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[20]                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[20]                                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|porta_control_reg[4]                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|porta_control_reg[4]                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|irqa_reg[1]                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|irqa_reg[1]                                                                                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|porta_control_reg[3]                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|porta_control_reg[3]                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|CA2_output_reg                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|CA2_output_reg                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[2]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[2]                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[4]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[4]                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[7]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[7]                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[5]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[5]                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[4]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[4]                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[1]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[1]                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[2]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[2]                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[3]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[3]                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[5]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[5]                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[7]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[7]                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[1]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[1]                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[0]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[0]                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[2]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[2]                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[3]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[3]                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[6]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[6]                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[4]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[4]                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[5]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[5]                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[7]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[7]                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|CartLogic:emu_cart|cfg_enable                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|CartLogic:emu_cart|cfg_enable                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[8]                                                                                                            ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[8]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|spi_speed_reg[7]                                                                                                   ; zpucore:zpu|zpu_config_regs:config_regs|spi_speed_reg[7]                                                                                                                                                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[10]                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[10]                                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|antic_fetch_real_reg                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|antic_fetch_real_reg                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[17]                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[17]                                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|highpass0_reg                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|highpass0_reg                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_noise_filter:pokey_noise_filter2|out_reg                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_noise_filter:pokey_noise_filter2|out_reg                                                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[2]                                                                                 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[2]                                                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[1]                                                                                 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[1]                                                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[3]                                                                                 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[3]                                                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_reset_reg                                                                                         ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_reset_reg                                                                                                                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[16]                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[16]                                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_loadb2                                                                                      ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_loadb2                                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_load_sp2                                                                                    ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_load_sp2                                                                                                                                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|idim_r                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|idim_r                                                                                                                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[7]                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[7]                                                                                                                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[6]                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[6]                                                                                                                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_fetch                                                                                       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_fetch                                                                                                                                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; enable_divider:enable_179_clock_div_zpu_pokey|count_reg[1]                                                                                                 ; enable_divider:enable_179_clock_div_zpu_pokey|count_reg[1]                                                                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; enable_divider:enable_179_clock_div_zpu_pokey|count_reg[2]                                                                                                 ; enable_divider:enable_179_clock_div_zpu_pokey|count_reg[2]                                                                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; enable_divider:enable_179_clock_div_zpu_pokey|count_reg[3]                                                                                                 ; enable_divider:enable_179_clock_div_zpu_pokey|count_reg[3]                                                                                                                                                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[3]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[3]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[0]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[0]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[1]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[1]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[2]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[2]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[5]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[5]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[4]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[4]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[6]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[6]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[7]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[7]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[0]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[0]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[3]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[3]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[2]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[2]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[4]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[4]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[5]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[5]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[6]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[6]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[7]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[7]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[6]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[6]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[2]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[2]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                ;
+-------+-----------------------------------------------------------------------------------------------------------------+-------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                       ; To Node                                               ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------+-------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.362 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                           ; sdram_ctrl:sdram_controller|sdram_rdy                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; sdram_ctrl:sdram_controller|r_refr_act                                                                          ; sdram_ctrl:sdram_controller|r_refr_act                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.597      ;
; 0.363 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                                                                      ; sdram_ctrl:sdram_controller|r_init_tmr[10]            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[0]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sdram_ctrl:sdram_controller|r_init_fsm[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[1]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sdram_ctrl:sdram_controller|r_wr_act                                                                            ; sdram_ctrl:sdram_controller|r_wr_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sdram_ctrl:sdram_controller|r_bst_stp[0]                                                                        ; sdram_ctrl:sdram_controller|r_bst_stp[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                                                                        ; sdram_ctrl:sdram_controller|r_rd_bctr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sdram_ctrl:sdram_controller|r_rd_act                                                                            ; sdram_ctrl:sdram_controller|r_rd_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.374 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[0]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.608      ;
; 0.428 ; seq_reg[11]                                                                                                     ; sdram_ctrl:sdram_controller|r_init_fsm[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.663      ;
; 0.440 ; sdram_ctrl:sdram_controller|r_wr_act                                                                            ; sdram_ctrl:sdram_controller|r_sdram_dq_oe             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.674      ;
; 0.520 ; seq_reg[10]                                                                                                     ; seq_reg[11]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.755      ;
; 0.570 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[21] ; ram_di_reg[5]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.142      ; 0.903      ;
; 0.588 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.822      ;
; 0.588 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.822      ;
; 0.590 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.824      ;
; 0.590 ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                                                                        ; sdram_ctrl:sdram_controller|r_wr_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.824      ;
; 0.592 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[6]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.826      ;
; 0.592 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[8]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.826      ;
; 0.592 ; sdram_ctrl:sdram_controller|r_bst_stp[0]                                                                        ; sdram_ctrl:sdram_controller|r_rd_bctr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.826      ;
; 0.592 ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                                                                        ; sdram_ctrl:sdram_controller|r_rd_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.826      ;
; 0.593 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.827      ;
; 0.594 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.828      ;
; 0.594 ; sdram_ctrl:sdram_controller|r_init_tmr[9]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.828      ;
; 0.597 ; seq_reg[5]                                                                                                      ; seq_reg[6]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.831      ;
; 0.597 ; seq_reg[8]                                                                                                      ; seq_reg[9]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.832      ;
; 0.598 ; seq_reg[9]                                                                                                      ; seq_reg[10]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.833      ;
; 0.608 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[1]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.842      ;
; 0.612 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[1]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.846      ;
; 0.614 ; seq_reg[2]                                                                                                      ; seq_reg[3]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.848      ;
; 0.614 ; seq_reg[10]                                                                                                     ; sdram_ctrl:sdram_controller|sdram_rdy                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.849      ;
; 0.656 ; sdram_ctrl:sdram_controller|r_rd_act                                                                            ; sdram_ctrl:sdram_controller|r_rd_bctr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.890      ;
; 0.681 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[1]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.915      ;
; 0.749 ; seq_reg[3]                                                                                                      ; seq_reg[4]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.983      ;
; 0.750 ; seq_reg[1]                                                                                                      ; seq_reg[2]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.984      ;
; 0.776 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[20] ; ram_di_reg[4]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.142      ; 1.109      ;
; 0.779 ; sdram_ctrl:sdram_controller|r_psel_dly[0]                                                                       ; sdram_ctrl:sdram_controller|ap1_rd_bst_act            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 1.012      ;
; 0.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[26] ; ram_di_reg[10]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.142      ; 1.113      ;
; 0.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[29] ; ram_di_reg[13]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.142      ; 1.113      ;
; 0.783 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[18] ; ram_di_reg[2]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.142      ; 1.116      ;
; 0.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[23] ; ram_di_reg[7]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.142      ; 1.118      ;
; 0.808 ; sdram_request_reg                                                                                               ; sdram_ctrl:sdram_controller|r_psel[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.042      ;
; 0.823 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[24] ; ram_di_reg[8]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.143      ; 1.157      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[17] ; ram_di_reg[1]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.143      ; 1.179      ;
; 0.855 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[25] ; ram_di_reg[9]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.143      ; 1.189      ;
; 0.864 ; sdram_ctrl:sdram_controller|r_refr_act                                                                          ; sdram_ctrl:sdram_controller|r_rd_reg                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 1.099      ;
; 0.872 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[10] ; ram_di_reg[10]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.142      ; 1.205      ;
; 0.874 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.108      ;
; 0.874 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.108      ;
; 0.878 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[6]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.112      ;
; 0.879 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.113      ;
; 0.879 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.113      ;
; 0.880 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.114      ;
; 0.881 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.115      ;
; 0.881 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.115      ;
; 0.882 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[8]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.116      ;
; 0.889 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.123      ;
; 0.891 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.125      ;
; 0.892 ; sdram_ctrl:sdram_controller|r_refr_act                                                                          ; sdram_ctrl:sdram_controller|r_wr_reg                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 1.127      ;
; 0.892 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.126      ;
; 0.892 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.126      ;
; 0.893 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.127      ;
; 0.925 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[31] ; ram_di_reg[15]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.143      ; 1.259      ;
; 0.944 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[22] ; ram_di_reg[6]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.143      ; 1.278      ;
; 0.946 ; sdram_ctrl:sdram_controller|r_psel[0]                                                                           ; sdram_ctrl:sdram_controller|r_psel_dly[0]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 1.181      ;
; 0.949 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[30] ; ram_di_reg[14]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.143      ; 1.283      ;
; 0.955 ; seq_reg[0]                                                                                                      ; sdram_ctrl:sdram_controller|r_refr_act                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 1.190      ;
; 0.959 ; seq_reg[7]                                                                                                      ; seq_reg[8]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 1.194      ;
; 0.973 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[6]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.207      ;
; 0.973 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.207      ;
; 0.978 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[8]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.212      ;
; 0.984 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.218      ;
; 0.984 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.218      ;
; 0.988 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[8]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.222      ;
; 0.989 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.223      ;
; 0.990 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.224      ;
; 0.991 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[6]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.225      ;
; 0.991 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.225      ;
; 0.995 ; seq_reg[5]                                                                                                      ; sdram_request_complete_reg                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 1.230      ;
; 0.999 ; sdram_ctrl:sdram_controller|r_rddata[1]                                                                         ; ram_do_reg[1]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.195      ; 1.365      ;
; 0.999 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.233      ;
; 1.001 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.235      ;
; 1.002 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.236      ;
; 1.002 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.236      ;
; 1.006 ; sdram_ctrl:sdram_controller|r_rddata[1]                                                                         ; ram_do_reg[9]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.195      ; 1.372      ;
; 1.010 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[27] ; ram_di_reg[11]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.143      ; 1.344      ;
; 1.018 ; sdram_ctrl:sdram_controller|r_rddata[2]                                                                         ; ram_do_reg[18]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.195      ; 1.384      ;
; 1.019 ; seq_reg[1]                                                                                                      ; sdram_ctrl:sdram_controller|r_wr_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.065      ; 1.255      ;
; 1.030 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[16] ; ram_di_reg[0]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.143      ; 1.364      ;
; 1.036 ; sdram_ctrl:sdram_controller|r_rddata[2]                                                                         ; ram_do_reg[2]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.195      ; 1.402      ;
; 1.036 ; sdram_ctrl:sdram_controller|r_rddata[2]                                                                         ; ram_do_reg[10]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.195      ; 1.402      ;
; 1.042 ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1                                                           ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 1.277      ;
; 1.043 ; sdram_ctrl:sdram_controller|r_refr_req                                                                          ; sdram_ctrl:sdram_controller|r_wr_reg                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.076      ; 1.290      ;
; 1.046 ; sdram_ctrl:sdram_controller|r_refr_req                                                                          ; sdram_ctrl:sdram_controller|r_rd_reg                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.076      ; 1.293      ;
; 1.050 ; sdram_ctrl:sdram_controller|r_rddata[0]                                                                         ; ram_do_reg[0]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.195      ; 1.416      ;
; 1.056 ; sdram_ctrl:sdram_controller|r_rddata[0]                                                                         ; ram_do_reg[16]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.195      ; 1.422      ;
; 1.072 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[21]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 1.404      ;
; 1.073 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[29]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 1.405      ;
+-------+-----------------------------------------------------------------------------------------------------------------+-------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                                                             ; To Node                                                                                                                                                                                                               ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[11]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[11]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                                                         ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                                                         ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                             ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                             ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.364 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo_bypass_reg                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo_bypass_reg                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                                                             ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.597      ;
; 0.374 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.608      ;
; 0.375 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.608      ;
; 0.375 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.608      ;
; 0.390 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.623      ;
; 0.398 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.631      ;
; 0.403 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.637      ;
; 0.405 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.638      ;
; 0.406 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[7]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.640      ;
; 0.406 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[2]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[1]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.640      ;
; 0.406 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.640      ;
; 0.406 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.639      ;
; 0.406 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[3]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[2]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.639      ;
; 0.406 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[0]                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[0]                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.639      ;
; 0.407 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.640      ;
; 0.407 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.640      ;
; 0.408 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.641      ;
; 0.408 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][3]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.641      ;
; 0.408 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.641      ;
; 0.408 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[2]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[1]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.641      ;
; 0.408 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[1]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[0]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.641      ;
; 0.408 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[14]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.642      ;
; 0.409 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.643      ;
; 0.409 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.642      ;
; 0.411 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[9]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[10]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.644      ;
; 0.411 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.645      ;
; 0.412 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.646      ;
; 0.412 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[2]                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[2]                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.645      ;
; 0.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.648      ;
; 0.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[2]                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[1]                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.647      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.648      ;
; 0.415 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.649      ;
; 0.415 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[12]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.649      ;
; 0.416 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.650      ;
; 0.420 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[7]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.654      ;
; 0.424 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.658      ;
; 0.425 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.659      ;
; 0.426 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.660      ;
; 0.426 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.660      ;
; 0.427 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[2]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.661      ;
; 0.427 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.660      ;
; 0.428 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.661      ;
; 0.455 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.689      ;
; 0.459 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.314      ; 0.974      ;
; 0.461 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.310      ; 0.972      ;
; 0.461 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.320      ; 0.982      ;
; 0.465 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.314      ; 0.980      ;
; 0.468 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.320      ; 0.989      ;
; 0.470 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.314      ; 0.985      ;
; 0.471 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.320      ; 0.992      ;
; 0.476 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.316      ; 0.993      ;
; 0.478 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.314      ; 0.993      ;
; 0.482 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.310      ; 0.993      ;
; 0.484 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.316      ; 1.001      ;
; 0.484 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.316      ; 1.001      ;
; 0.487 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.320      ; 1.008      ;
; 0.493 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.310      ; 1.004      ;
; 0.493 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.320      ; 1.014      ;
; 0.494 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.320      ; 1.015      ;
; 0.496 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.310      ; 1.007      ;
; 0.497 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.316      ; 1.014      ;
; 0.502 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.316      ; 1.019      ;
; 0.505 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.316      ; 1.022      ;
; 0.507 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.316      ; 1.024      ;
; 0.509 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.743      ;
; 0.510 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.744      ;
; 0.510 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.744      ;
; 0.514 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.320      ; 1.035      ;
; 0.516 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.750      ;
; 0.516 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.310      ; 1.027      ;
; 0.516 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.320      ; 1.037      ;
; 0.519 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[3]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[2]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.753      ;
; 0.520 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.316      ; 1.037      ;
; 0.522 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.310      ; 1.033      ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                      ;
+-------+--------------------------------------------------------------------+--------------------------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                          ; To Node                                                            ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+-------+--------------------------------------------------------------------+--------------------------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3                 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2                 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1                 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4                 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.Idle                 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.Idle                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.reset_start          ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.reset_start          ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; cntr_reset[1]                                                      ; cntr_reset[1]                                                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; cntr_reset[2]                                                      ; cntr_reset[2]                                                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; cntr_reset[5]                                                      ; cntr_reset[5]                                                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; cntr_reset[6]                                                      ; cntr_reset[6]                                                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; reset_usbdrv                                                       ; reset_usbdrv                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[3]                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[3]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[2]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[2]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[1]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[1]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state2                 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state2                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state3                 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state3                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|val                               ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|val                               ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4]                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[0]                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0]                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[2]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[2]                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2]                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[3]                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3]                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[1]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[1]                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1]                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6]                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7]                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_send_com.Idle                 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_send_com.Idle                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_send_com.reset_start          ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_send_com.reset_start          ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state4                 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state4                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1                 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[2]                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[0]                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[0]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5]                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[5]                    ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[5]                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[4]                    ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[4]                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[3]                    ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[3]                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[2]                    ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[2]                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[6]                    ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[6]                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[7]                    ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[7]                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[0]                    ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[0]                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[1]                    ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[1]                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dp_previous                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dp_previous                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dm_previous                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dm_previous                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.start_get_data         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.start_get_data         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte2        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte2        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c                 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait2                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait2                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.usb_reset_state        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.usb_reset_state        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter2[1]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter2[1]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter2[2]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter2[2]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait4                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait4                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait20                 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait20                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[0]                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[0]                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[2]                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[2]                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[4]                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[4]                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[5]                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[5]                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[7]                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[7]                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.usb_reset_1ms_start    ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.usb_reset_1ms_start    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait21                 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait21                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_available                    ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_available                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_valid                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_valid                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|val                               ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|val                               ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|send_frame                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|send_frame                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[2]                    ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[2]                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[7]                    ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[7]                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[6]                    ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[6]                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[3]                    ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[3]                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[1]                    ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[1]                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[0]                    ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[0]                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[4]                    ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[4]                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[5]                    ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[5]                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp_previous                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp_previous                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm_previous                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm_previous                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.getreport_sendpkt1_end ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.getreport_sendpkt1_end ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait30                 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait30                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte3        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte3        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte4        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte4        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
+-------+--------------------------------------------------------------------+--------------------------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                       ;
+-------+---------------------------------------+----------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                             ; To Node                                                                                                                    ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------+----------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 7.228 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.173     ; 4.238      ;
; 7.231 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[14]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.151     ; 4.257      ;
; 7.239 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.160     ; 4.240      ;
; 7.239 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[5]                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.163     ; 4.237      ;
; 7.587 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[2]                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 3.904      ;
; 7.587 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[1]                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 3.904      ;
; 7.587 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[3]                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 3.904      ;
; 7.587 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_shift_reg[9]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 3.904      ;
; 7.587 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[2]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 3.904      ;
; 7.587 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[0]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 3.904      ;
; 7.587 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[1]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 3.904      ;
; 7.587 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[2]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 3.904      ;
; 7.587 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[3]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 3.904      ;
; 7.587 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[4]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 3.904      ;
; 7.587 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[5]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 3.904      ;
; 7.587 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[6]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 3.904      ;
; 7.587 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[7]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 3.904      ;
; 7.587 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_reset_reg                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 3.904      ;
; 7.588 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[12]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.148     ; 3.903      ;
; 7.588 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[4]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 3.904      ;
; 7.588 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[5]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 3.904      ;
; 7.588 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|clock_reg                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 3.904      ;
; 7.588 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|clock_sync_reg                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 3.904      ;
; 7.588 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_clock_reg                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 3.904      ;
; 7.588 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_clock_last_reg                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 3.904      ;
; 7.588 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[0]                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 3.904      ;
; 7.588 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 3.904      ;
; 7.588 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|delay_line:serout_clock_delay|shift_reg[1]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.147     ; 3.904      ;
; 7.588 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[6]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.162     ; 3.889      ;
; 7.588 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[8]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.162     ; 3.889      ;
; 7.588 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[5]                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.153     ; 3.898      ;
; 7.588 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[4]                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.153     ; 3.898      ;
; 7.588 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[25]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.153     ; 3.898      ;
; 7.589 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[21]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 3.894      ;
; 7.589 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[7]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 3.889      ;
; 7.589 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_8BIT_WRITE_ENABLE_reg                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.154     ; 3.896      ;
; 7.589 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[0]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.154     ; 3.896      ;
; 7.589 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[1]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.154     ; 3.896      ;
; 7.589 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.164     ; 3.886      ;
; 7.589 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[22]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 3.894      ;
; 7.589 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[18]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 3.894      ;
; 7.589 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[20]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 3.894      ;
; 7.589 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 3.894      ;
; 7.589 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[14]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.164     ; 3.886      ;
; 7.589 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[0]                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.150     ; 3.900      ;
; 7.589 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[1]                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.150     ; 3.900      ;
; 7.589 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_READ_reg                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.154     ; 3.896      ;
; 7.589 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[23]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.164     ; 3.886      ;
; 7.589 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[19]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.164     ; 3.886      ;
; 7.589 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[5]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.161     ; 3.889      ;
; 7.589 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.164     ; 3.886      ;
; 7.590 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[2]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.158     ; 3.891      ;
; 7.590 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[3]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.158     ; 3.891      ;
; 7.591 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[1]                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.176     ; 3.872      ;
; 7.593 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[0]                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.177     ; 3.869      ;
; 7.596 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[2]                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.168     ; 3.875      ;
; 7.598 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[0]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 3.884      ;
; 7.598 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[1]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 3.884      ;
; 7.598 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[13]                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 3.885      ;
; 7.598 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[7]                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 3.885      ;
; 7.598 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[6]                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 3.885      ;
; 7.598 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[5]                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 3.885      ;
; 7.598 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[4]                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 3.885      ;
; 7.598 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[3]                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 3.885      ;
; 7.598 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[2]                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 3.885      ;
; 7.598 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[1]                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 3.885      ;
; 7.598 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[0]                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 3.885      ;
; 7.598 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[16]                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 3.885      ;
; 7.598 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[15]                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 3.885      ;
; 7.598 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[14]                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.156     ; 3.885      ;
; 7.598 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[0]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 3.884      ;
; 7.598 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[1]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 3.884      ;
; 7.598 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[2]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 3.884      ;
; 7.598 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[3]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 3.884      ;
; 7.598 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[4]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 3.884      ;
; 7.598 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[5]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 3.884      ;
; 7.598 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 3.884      ;
; 7.598 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 3.884      ;
; 7.598 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|key_held_reg           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 3.884      ;
; 7.599 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[11]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.166     ; 3.874      ;
; 7.601 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[12]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; 0.200      ; 4.238      ;
; 7.601 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[9]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; 0.201      ; 4.239      ;
; 7.606 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[0]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.158     ; 3.875      ;
; 7.606 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[1]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.158     ; 3.875      ;
; 7.606 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[2]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.158     ; 3.875      ;
; 7.606 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[3]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.158     ; 3.875      ;
; 7.606 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[4]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.158     ; 3.875      ;
; 7.606 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|enabled_out_reg                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 3.876      ;
; 7.606 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[0]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 3.876      ;
; 7.606 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[0]                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 3.876      ;
; 7.606 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[3]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 3.876      ;
; 7.606 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[1]                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 3.876      ;
; 7.606 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[2]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 3.876      ;
; 7.606 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[2]                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 3.876      ;
; 7.606 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[3]                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 3.876      ;
; 7.606 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[4]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 3.876      ;
; 7.606 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[4]                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 3.876      ;
; 7.606 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[5]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 3.876      ;
; 7.606 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[5]                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 3.876      ;
; 7.606 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[6]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.157     ; 3.876      ;
+-------+---------------------------------------+----------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                       ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node              ; To Node                                                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 7.764 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[7]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.249     ; 3.509      ;
; 7.812 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[4]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.175     ; 3.540      ;
; 7.812 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[5]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.175     ; 3.540      ;
; 7.813 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[6]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.177     ; 3.537      ;
; 7.813 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[7]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.178     ; 3.536      ;
; 7.813 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[8]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.178     ; 3.536      ;
; 7.814 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[9]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.176     ; 3.537      ;
; 7.814 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[11]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.176     ; 3.537      ;
; 7.833 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[0]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.168     ; 3.526      ;
; 7.833 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[1]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.168     ; 3.526      ;
; 7.833 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.168     ; 3.526      ;
; 7.834 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ba[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.167     ; 3.526      ;
; 7.834 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ba[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.167     ; 3.526      ;
; 7.835 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[2]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.163     ; 3.529      ;
; 7.835 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[3]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.163     ; 3.529      ;
; 7.835 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[7]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.164     ; 3.528      ;
; 7.841 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[8]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.305     ; 3.374      ;
; 7.845 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[9]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.311     ; 3.364      ;
; 7.848 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[13]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.306     ; 3.366      ;
; 7.848 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[14]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.306     ; 3.366      ;
; 7.848 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[15]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.306     ; 3.366      ;
; 7.849 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[12]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.307     ; 3.364      ;
; 7.849 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[11]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.307     ; 3.364      ;
; 7.849 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[10]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.307     ; 3.364      ;
; 7.858 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[4]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.306     ; 3.356      ;
; 7.861 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[2]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.284     ; 3.375      ;
; 7.861 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[1]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.284     ; 3.375      ;
; 7.861 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[0]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.284     ; 3.375      ;
; 7.864 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[5]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.298     ; 3.358      ;
; 7.865 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[6]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.296     ; 3.359      ;
; 7.867 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[3]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.296     ; 3.357      ;
; 7.874 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[8]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.198     ; 3.457      ;
; 7.878 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[9]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.204     ; 3.447      ;
; 7.881 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[13]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.199     ; 3.449      ;
; 7.881 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[14]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.199     ; 3.449      ;
; 7.881 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[15]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.199     ; 3.449      ;
; 7.882 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[10]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.200     ; 3.447      ;
; 7.882 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[11]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.200     ; 3.447      ;
; 7.882 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[12]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.200     ; 3.447      ;
; 7.891 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[4]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.199     ; 3.439      ;
; 7.894 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[0]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.177     ; 3.458      ;
; 7.894 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[1]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.177     ; 3.458      ;
; 7.894 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[2]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.177     ; 3.458      ;
; 7.897 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[5]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.191     ; 3.441      ;
; 7.898 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[6]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.189     ; 3.442      ;
; 7.900 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[3]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.189     ; 3.440      ;
; 7.993 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.175     ; 3.359      ;
; 8.016 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ras_n                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.164     ; 3.347      ;
; 8.016 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cas_n                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.164     ; 3.347      ;
; 8.016 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_we_n                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.164     ; 3.347      ;
; 8.016 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.164     ; 3.347      ;
; 8.016 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.164     ; 3.347      ;
; 8.281 ; sdram_reset_ctrl_n_reg ; seq_reg[1]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.155     ; 3.203      ;
; 8.281 ; sdram_reset_ctrl_n_reg ; seq_reg[2]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.155     ; 3.203      ;
; 8.281 ; sdram_reset_ctrl_n_reg ; seq_reg[3]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.155     ; 3.203      ;
; 8.281 ; sdram_reset_ctrl_n_reg ; seq_reg[4]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.155     ; 3.203      ;
; 8.281 ; sdram_reset_ctrl_n_reg ; seq_reg[5]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.155     ; 3.203      ;
; 8.281 ; sdram_reset_ctrl_n_reg ; seq_reg[6]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.155     ; 3.203      ;
; 8.281 ; sdram_reset_ctrl_n_reg ; seq_reg[7]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.155     ; 3.203      ;
; 8.281 ; sdram_reset_ctrl_n_reg ; seq_reg[8]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.155     ; 3.203      ;
; 8.281 ; sdram_reset_ctrl_n_reg ; seq_reg[9]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.155     ; 3.203      ;
; 8.281 ; sdram_reset_ctrl_n_reg ; seq_reg[10]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.155     ; 3.203      ;
; 8.281 ; sdram_reset_ctrl_n_reg ; seq_reg[11]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.155     ; 3.203      ;
; 8.281 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.155     ; 3.203      ;
; 8.281 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.155     ; 3.203      ;
; 8.281 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.153     ; 3.205      ;
; 8.281 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.153     ; 3.205      ;
; 8.281 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.153     ; 3.205      ;
; 8.281 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.154     ; 3.204      ;
; 8.281 ; sdram_reset_ctrl_n_reg ; sdram_request_complete_reg                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.154     ; 3.204      ;
; 8.281 ; sdram_reset_ctrl_n_reg ; sdram_request_reg                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.154     ; 3.204      ;
; 8.281 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_psel[0]                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.154     ; 3.204      ;
; 8.281 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_oe                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.153     ; 3.205      ;
; 8.281 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[1]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.153     ; 3.205      ;
; 8.281 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[0]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.153     ; 3.205      ;
; 8.281 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.145     ; 3.213      ;
; 8.282 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.152     ; 3.205      ;
; 8.282 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.152     ; 3.205      ;
; 8.282 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.152     ; 3.205      ;
; 8.282 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.152     ; 3.205      ;
; 8.282 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.152     ; 3.205      ;
; 8.282 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.152     ; 3.205      ;
; 8.282 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.152     ; 3.205      ;
; 8.282 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.152     ; 3.205      ;
; 8.282 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.152     ; 3.205      ;
; 8.282 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.152     ; 3.205      ;
; 8.282 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.152     ; 3.205      ;
; 8.282 ; sdram_reset_ctrl_n_reg ; ram_do_reg[29]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.152     ; 3.205      ;
; 8.282 ; sdram_reset_ctrl_n_reg ; ram_do_reg[30]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.152     ; 3.205      ;
; 8.282 ; sdram_reset_ctrl_n_reg ; ram_do_reg[28]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.152     ; 3.205      ;
; 8.282 ; sdram_reset_ctrl_n_reg ; ram_do_reg[24]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.152     ; 3.205      ;
; 8.282 ; sdram_reset_ctrl_n_reg ; ram_do_reg[21]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.152     ; 3.205      ;
; 8.282 ; sdram_reset_ctrl_n_reg ; ram_do_reg[19]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.152     ; 3.205      ;
; 8.282 ; sdram_reset_ctrl_n_reg ; ram_do_reg[27]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.152     ; 3.205      ;
; 8.282 ; sdram_reset_ctrl_n_reg ; ram_do_reg[6]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.152     ; 3.205      ;
; 8.282 ; sdram_reset_ctrl_n_reg ; ram_do_reg[2]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.152     ; 3.205      ;
; 8.282 ; sdram_reset_ctrl_n_reg ; ram_do_reg[4]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.152     ; 3.205      ;
; 8.282 ; sdram_reset_ctrl_n_reg ; ram_do_reg[1]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.152     ; 3.205      ;
; 8.282 ; sdram_reset_ctrl_n_reg ; ram_do_reg[5]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.152     ; 3.205      ;
; 8.282 ; sdram_reset_ctrl_n_reg ; ram_do_reg[7]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.152     ; 3.205      ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                            ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                        ; To Node                                                                                                                                                                        ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 48.511 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[8] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.253      ; 1.741      ;
; 97.667 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 2.273      ;
; 97.667 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 2.273      ;
; 97.667 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 2.273      ;
; 97.667 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 2.273      ;
; 97.828 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 2.112      ;
; 97.828 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 2.112      ;
; 97.828 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 2.112      ;
; 97.828 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 2.112      ;
; 97.880 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 2.057      ;
; 97.880 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 2.057      ;
; 97.880 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 2.057      ;
; 97.880 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 2.057      ;
; 97.948 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 1.988      ;
; 97.948 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.989      ;
; 97.948 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.989      ;
; 97.948 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.989      ;
; 97.948 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.989      ;
; 97.948 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[2]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 1.988      ;
; 97.948 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 1.988      ;
; 97.948 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.989      ;
; 97.948 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.989      ;
; 97.948 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.989      ;
; 97.948 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.989      ;
; 97.948 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 1.988      ;
; 97.948 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.989      ;
; 97.948 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.989      ;
; 97.965 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 1.971      ;
; 97.965 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 1.971      ;
; 97.995 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 1.941      ;
; 97.995 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 1.941      ;
; 97.995 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 1.941      ;
; 97.995 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 1.941      ;
; 97.995 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 1.941      ;
; 97.995 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 1.941      ;
; 97.995 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 1.941      ;
; 97.995 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 1.941      ;
; 97.995 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 1.941      ;
; 97.995 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 1.941      ;
; 98.003 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 1.937      ;
; 98.005 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 1.939      ;
; 98.005 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 1.939      ;
; 98.005 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 1.939      ;
; 98.005 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 1.939      ;
; 98.005 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 1.939      ;
; 98.005 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 1.939      ;
; 98.005 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 1.939      ;
; 98.005 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 1.939      ;
; 98.005 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 1.939      ;
; 98.129 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 1.811      ;
; 98.129 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 1.811      ;
; 98.129 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 1.811      ;
; 98.129 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 1.811      ;
; 98.129 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 1.811      ;
; 98.129 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 1.811      ;
; 98.129 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 1.811      ;
; 98.129 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 1.811      ;
; 98.129 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 1.811      ;
; 98.129 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 1.811      ;
; 98.129 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 1.811      ;
; 98.129 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 1.811      ;
; 98.145 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 1.787      ;
; 98.208 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 1.732      ;
; 98.208 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 1.732      ;
; 98.208 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 1.732      ;
; 98.232 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 1.708      ;
; 98.232 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 1.708      ;
; 98.232 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 1.708      ;
; 98.240 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.697      ;
; 98.240 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.697      ;
; 98.240 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.697      ;
; 98.240 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.697      ;
; 98.270 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 1.670      ;
; 98.282 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.060     ; 1.657      ;
; 98.282 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.060     ; 1.657      ;
; 98.291 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 1.649      ;
; 98.291 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 1.649      ;
; 98.291 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 1.649      ;
; 98.291 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[3]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 1.649      ;
; 98.291 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 1.649      ;
; 98.344 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 1.592      ;
; 98.344 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 1.592      ;
; 98.344 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 1.592      ;
; 98.344 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 1.592      ;
; 98.344 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 1.592      ;
; 98.344 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 1.592      ;
; 98.344 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 1.592      ;
; 98.344 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 1.592      ;
; 98.344 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.063     ; 1.592      ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                              ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node    ; To Node                                             ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 63.461 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.063     ; 3.131      ;
; 63.461 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.063     ; 3.131      ;
; 63.823 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.064     ; 2.768      ;
; 63.823 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.064     ; 2.768      ;
; 63.823 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.064     ; 2.768      ;
; 63.823 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.064     ; 2.768      ;
; 63.823 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.064     ; 2.768      ;
; 63.823 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.064     ; 2.768      ;
; 63.823 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.066     ; 2.766      ;
; 63.823 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.066     ; 2.766      ;
; 63.823 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.065     ; 2.767      ;
; 63.823 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.065     ; 2.767      ;
; 63.823 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.066     ; 2.766      ;
; 63.823 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.066     ; 2.766      ;
; 63.823 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.066     ; 2.766      ;
; 63.823 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.066     ; 2.766      ;
; 63.823 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.066     ; 2.766      ;
; 63.823 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.066     ; 2.766      ;
; 63.823 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.066     ; 2.766      ;
; 63.823 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.066     ; 2.766      ;
; 63.823 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.065     ; 2.767      ;
; 63.823 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.065     ; 2.767      ;
; 63.823 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.065     ; 2.767      ;
; 63.823 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.065     ; 2.767      ;
; 63.823 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.064     ; 2.768      ;
; 63.823 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.064     ; 2.768      ;
; 63.823 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.064     ; 2.768      ;
; 63.823 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.064     ; 2.768      ;
; 63.823 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.065     ; 2.767      ;
; 63.823 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.065     ; 2.767      ;
; 63.824 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.064     ; 2.767      ;
; 65.564 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.055      ; 3.146      ;
; 65.564 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.055      ; 3.146      ;
; 65.935 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.055      ; 2.775      ;
; 65.935 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.055      ; 2.775      ;
; 65.935 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.055      ; 2.775      ;
; 65.935 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.054      ; 2.774      ;
; 65.935 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.054      ; 2.774      ;
; 65.935 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.054      ; 2.774      ;
; 65.935 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.055      ; 2.775      ;
; 65.935 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.054      ; 2.774      ;
; 65.935 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.054      ; 2.774      ;
; 65.935 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.054      ; 2.774      ;
; 65.935 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.054      ; 2.774      ;
; 65.935 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.054      ; 2.774      ;
; 65.935 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.054      ; 2.774      ;
; 65.935 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.054      ; 2.774      ;
; 65.935 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.054      ; 2.774      ;
; 65.935 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.054      ; 2.774      ;
; 65.936 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.055      ; 2.774      ;
; 65.936 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.055      ; 2.774      ;
; 65.936 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.055      ; 2.774      ;
; 65.936 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.055      ; 2.774      ;
; 65.936 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.055      ; 2.774      ;
; 65.936 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.055      ; 2.774      ;
; 65.936 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.055      ; 2.774      ;
; 65.936 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.055      ; 2.774      ;
; 65.936 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.055      ; 2.774      ;
; 65.936 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.055      ; 2.774      ;
; 65.936 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.055      ; 2.774      ;
; 65.936 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.055      ; 2.774      ;
; 65.936 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.055      ; 2.774      ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                              ;
+-------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node    ; To Node                                             ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+-------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 0.180 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.267      ; 2.618      ;
; 0.180 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.267      ; 2.618      ;
; 0.180 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.267      ; 2.618      ;
; 0.180 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.267      ; 2.618      ;
; 0.180 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.267      ; 2.618      ;
; 0.180 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.267      ; 2.618      ;
; 0.180 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.267      ; 2.618      ;
; 0.180 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.267      ; 2.618      ;
; 0.180 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.267      ; 2.618      ;
; 0.180 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.267      ; 2.618      ;
; 0.180 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.267      ; 2.618      ;
; 0.180 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.267      ; 2.618      ;
; 0.181 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.268      ; 2.620      ;
; 0.181 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.268      ; 2.620      ;
; 0.181 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.268      ; 2.620      ;
; 0.181 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.268      ; 2.620      ;
; 0.181 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.269      ; 2.621      ;
; 0.181 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.269      ; 2.621      ;
; 0.181 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.269      ; 2.621      ;
; 0.181 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.269      ; 2.621      ;
; 0.181 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.268      ; 2.620      ;
; 0.181 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.268      ; 2.620      ;
; 0.181 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.268      ; 2.620      ;
; 0.181 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.268      ; 2.620      ;
; 0.181 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.268      ; 2.620      ;
; 0.181 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.268      ; 2.620      ;
; 0.181 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.268      ; 2.620      ;
; 0.181 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.268      ; 2.620      ;
; 0.181 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.269      ; 2.621      ;
; 0.524 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.269      ; 2.964      ;
; 0.524 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.269      ; 2.964      ;
; 2.381 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.060      ; 2.612      ;
; 2.381 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.060      ; 2.612      ;
; 2.381 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.061      ; 2.613      ;
; 2.381 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.061      ; 2.613      ;
; 2.381 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.060      ; 2.612      ;
; 2.381 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.060      ; 2.612      ;
; 2.381 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.060      ; 2.612      ;
; 2.381 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.060      ; 2.612      ;
; 2.381 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.060      ; 2.612      ;
; 2.381 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.060      ; 2.612      ;
; 2.381 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.060      ; 2.612      ;
; 2.381 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.060      ; 2.612      ;
; 2.381 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.061      ; 2.613      ;
; 2.381 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.061      ; 2.613      ;
; 2.381 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.061      ; 2.613      ;
; 2.381 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.061      ; 2.613      ;
; 2.381 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.061      ; 2.613      ;
; 2.381 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.061      ; 2.613      ;
; 2.382 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 2.615      ;
; 2.382 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 2.615      ;
; 2.382 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 2.615      ;
; 2.382 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 2.615      ;
; 2.383 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 2.616      ;
; 2.383 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 2.616      ;
; 2.383 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 2.616      ;
; 2.383 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 2.616      ;
; 2.383 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 2.616      ;
; 2.383 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 2.616      ;
; 2.383 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 2.616      ;
; 2.713 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 2.947      ;
; 2.713 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 2.947      ;
+-------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                             ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                        ; To Node                                                                                                                                                                        ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 1.287  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 1.520      ;
; 1.287  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 1.520      ;
; 1.287  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 1.520      ;
; 1.287  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 1.520      ;
; 1.287  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 1.520      ;
; 1.287  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 1.520      ;
; 1.287  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 1.520      ;
; 1.287  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 1.520      ;
; 1.287  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 1.520      ;
; 1.336  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 1.572      ;
; 1.336  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 1.572      ;
; 1.336  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 1.572      ;
; 1.336  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[3]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 1.572      ;
; 1.336  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 1.572      ;
; 1.345  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 1.581      ;
; 1.345  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 1.581      ;
; 1.351  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 1.587      ;
; 1.377  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 1.610      ;
; 1.377  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 1.613      ;
; 1.377  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 1.613      ;
; 1.377  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 1.613      ;
; 1.377  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 1.610      ;
; 1.377  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 1.610      ;
; 1.377  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 1.610      ;
; 1.410  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.647      ;
; 1.410  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.647      ;
; 1.410  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.647      ;
; 1.440  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.059      ; 1.670      ;
; 1.447  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.684      ;
; 1.447  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.684      ;
; 1.447  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.684      ;
; 1.447  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.684      ;
; 1.447  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.684      ;
; 1.447  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.684      ;
; 1.447  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.684      ;
; 1.447  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.684      ;
; 1.447  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.684      ;
; 1.447  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.684      ;
; 1.447  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.684      ;
; 1.447  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.684      ;
; 1.614  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 1.854      ;
; 1.614  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 1.854      ;
; 1.614  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 1.854      ;
; 1.614  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 1.854      ;
; 1.614  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 1.854      ;
; 1.614  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 1.854      ;
; 1.614  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 1.854      ;
; 1.614  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 1.854      ;
; 1.614  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 1.854      ;
; 1.614  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.851      ;
; 1.618  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.061      ; 1.850      ;
; 1.618  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.061      ; 1.850      ;
; 1.618  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.061      ; 1.850      ;
; 1.618  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.061      ; 1.850      ;
; 1.618  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.061      ; 1.850      ;
; 1.618  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.061      ; 1.850      ;
; 1.618  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.061      ; 1.850      ;
; 1.618  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.061      ; 1.850      ;
; 1.618  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.061      ; 1.850      ;
; 1.618  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.061      ; 1.850      ;
; 1.652  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.061      ; 1.884      ;
; 1.652  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.061      ; 1.884      ;
; 1.672  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 1.905      ;
; 1.672  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 1.905      ;
; 1.672  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 1.905      ;
; 1.672  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 1.905      ;
; 1.672  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 1.905      ;
; 1.672  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 1.905      ;
; 1.672  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 1.905      ;
; 1.672  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 1.905      ;
; 1.672  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 1.905      ;
; 1.672  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 1.905      ;
; 1.673  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 1.906      ;
; 1.673  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[2]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 1.906      ;
; 1.673  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 1.906      ;
; 1.673  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 1.906      ;
; 1.726  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 1.959      ;
; 1.726  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 1.959      ;
; 1.726  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 1.959      ;
; 1.726  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 1.959      ;
; 1.769  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 2.005      ;
; 1.769  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 2.005      ;
; 1.769  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 2.005      ;
; 1.769  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 2.005      ;
; 1.826  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 2.062      ;
; 1.826  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 2.062      ;
; 1.826  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 2.062      ;
; 1.826  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 2.062      ;
; 51.066 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[8] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; -50.000      ; 0.385      ; 1.642      ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                           ; To Node                                                                                                                                                                                                                ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 1.289 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a5 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.804      ;
; 1.289 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a4 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.804      ;
; 1.289 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a3 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.804      ;
; 1.289 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a2 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.804      ;
; 1.289 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.804      ;
; 1.289 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.804      ;
; 1.292 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a6 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.807      ;
; 1.292 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a5 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.807      ;
; 1.292 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a4 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.807      ;
; 1.292 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a3 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.807      ;
; 1.292 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a2 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.807      ;
; 1.292 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.807      ;
; 1.292 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.807      ;
; 1.329 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a55  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.843      ;
; 1.329 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a54  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.843      ;
; 1.329 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a53  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.843      ;
; 1.329 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a52  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.843      ;
; 1.329 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a51  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.843      ;
; 1.329 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a50  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.843      ;
; 1.329 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a49  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.843      ;
; 1.329 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a48  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.843      ;
; 1.329 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a39  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.843      ;
; 1.329 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a38  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.843      ;
; 1.329 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a37  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.843      ;
; 1.329 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a36  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.843      ;
; 1.329 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a35  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.843      ;
; 1.329 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a34  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.843      ;
; 1.329 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a33  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.843      ;
; 1.329 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a32  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.843      ;
; 1.329 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a19  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.843      ;
; 1.329 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a18  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.843      ;
; 1.329 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a17  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.843      ;
; 1.329 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a16  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.843      ;
; 1.329 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a7   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.843      ;
; 1.329 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a6   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.843      ;
; 1.329 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a5   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.843      ;
; 1.329 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a4   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.843      ;
; 1.329 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a3   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.843      ;
; 1.329 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a2   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.843      ;
; 1.329 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a1   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.843      ;
; 1.329 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 1.843      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a63  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a62  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a61  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a60  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a59  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a58  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a57  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a56  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a47  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a46  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a45  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a44  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a43  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a42  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a41  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a40  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a31  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a30  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a29  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a28  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a27  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a26  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a25  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a24  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a23  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a22  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a21  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a20  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a15  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a14  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a13  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a12  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a11  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a10  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a9   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.580 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.348      ; 2.096      ;
; 1.617 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a15   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.355      ; 2.140      ;
; 1.617 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a14   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.355      ; 2.140      ;
; 1.617 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a13   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.355      ; 2.140      ;
; 1.617 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a12   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.355      ; 2.140      ;
; 1.617 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a11   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.355      ; 2.140      ;
; 1.617 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a10   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.355      ; 2.140      ;
; 1.617 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a9    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.355      ; 2.140      ;
; 1.617 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a8    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.355      ; 2.140      ;
; 1.617 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a7    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.355      ; 2.140      ;
; 1.617 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a6    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.355      ; 2.140      ;
; 1.617 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a5    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.355      ; 2.140      ;
; 1.617 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a4    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.355      ; 2.140      ;
; 1.617 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a3    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.355      ; 2.140      ;
; 1.617 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a2    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.355      ; 2.140      ;
; 1.617 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a1    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.355      ; 2.140      ;
; 1.617 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.355      ; 2.140      ;
; 2.886 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[3]                                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.596      ; 3.673      ;
; 2.917 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[7]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.558      ; 3.666      ;
; 2.917 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[5]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.558      ; 3.666      ;
; 2.928 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[25]                                                                                                                                                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.570      ; 3.689      ;
; 2.928 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[5]                                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.571      ; 3.690      ;
; 2.928 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[4]                                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.571      ; 3.690      ;
; 2.961 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[0]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.544      ; 3.696      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                        ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node              ; To Node                                                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 2.616 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_req                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.135      ; 2.942      ;
; 2.616 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.135      ; 2.942      ;
; 2.616 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.135      ; 2.942      ;
; 2.616 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.135      ; 2.942      ;
; 2.616 ; sdram_reset_ctrl_n_reg ; ram_di_reg[2]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.133      ; 2.940      ;
; 2.616 ; sdram_reset_ctrl_n_reg ; ram_di_reg[4]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.135      ; 2.942      ;
; 2.616 ; sdram_reset_ctrl_n_reg ; ram_di_reg[5]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.133      ; 2.940      ;
; 2.616 ; sdram_reset_ctrl_n_reg ; ram_di_reg[7]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.135      ; 2.942      ;
; 2.616 ; sdram_reset_ctrl_n_reg ; ram_di_reg[10]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.133      ; 2.940      ;
; 2.616 ; sdram_reset_ctrl_n_reg ; ram_di_reg[12]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.135      ; 2.942      ;
; 2.616 ; sdram_reset_ctrl_n_reg ; ram_di_reg[13]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.133      ; 2.940      ;
; 2.617 ; sdram_reset_ctrl_n_reg ; seq_reg[0]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.148      ; 2.956      ;
; 2.617 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_act                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.148      ; 2.956      ;
; 2.617 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_reg                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.148      ; 2.956      ;
; 2.617 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_reg                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.148      ; 2.956      ;
; 2.617 ; sdram_reset_ctrl_n_reg ; ram_di_reg[0]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.137      ; 2.945      ;
; 2.617 ; sdram_reset_ctrl_n_reg ; ram_di_reg[1]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.137      ; 2.945      ;
; 2.617 ; sdram_reset_ctrl_n_reg ; ram_di_reg[3]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.137      ; 2.945      ;
; 2.617 ; sdram_reset_ctrl_n_reg ; ram_di_reg[6]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.137      ; 2.945      ;
; 2.617 ; sdram_reset_ctrl_n_reg ; ram_di_reg[8]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.137      ; 2.945      ;
; 2.617 ; sdram_reset_ctrl_n_reg ; ram_di_reg[9]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.137      ; 2.945      ;
; 2.617 ; sdram_reset_ctrl_n_reg ; ram_di_reg[11]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.137      ; 2.945      ;
; 2.617 ; sdram_reset_ctrl_n_reg ; ram_di_reg[14]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.137      ; 2.945      ;
; 2.617 ; sdram_reset_ctrl_n_reg ; ram_di_reg[15]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.137      ; 2.945      ;
; 2.617 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.148      ; 2.956      ;
; 2.618 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.148      ; 2.957      ;
; 2.618 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.148      ; 2.957      ;
; 2.619 ; sdram_reset_ctrl_n_reg ; seq_reg[8]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.150      ; 2.960      ;
; 2.619 ; sdram_reset_ctrl_n_reg ; seq_reg[9]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.150      ; 2.960      ;
; 2.619 ; sdram_reset_ctrl_n_reg ; seq_reg[10]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.150      ; 2.960      ;
; 2.619 ; sdram_reset_ctrl_n_reg ; seq_reg[11]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.150      ; 2.960      ;
; 2.619 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.150      ; 2.960      ;
; 2.619 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.150      ; 2.960      ;
; 2.621 ; sdram_reset_ctrl_n_reg ; seq_reg[1]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.149      ; 2.961      ;
; 2.621 ; sdram_reset_ctrl_n_reg ; seq_reg[2]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.149      ; 2.961      ;
; 2.621 ; sdram_reset_ctrl_n_reg ; seq_reg[3]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.149      ; 2.961      ;
; 2.621 ; sdram_reset_ctrl_n_reg ; seq_reg[4]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.149      ; 2.961      ;
; 2.621 ; sdram_reset_ctrl_n_reg ; seq_reg[5]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.149      ; 2.961      ;
; 2.621 ; sdram_reset_ctrl_n_reg ; seq_reg[6]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.149      ; 2.961      ;
; 2.621 ; sdram_reset_ctrl_n_reg ; seq_reg[7]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.149      ; 2.961      ;
; 2.621 ; sdram_reset_ctrl_n_reg ; ram_do_reg[30]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.964      ;
; 2.621 ; sdram_reset_ctrl_n_reg ; ram_do_reg[19]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.964      ;
; 2.621 ; sdram_reset_ctrl_n_reg ; ram_do_reg[27]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.964      ;
; 2.621 ; sdram_reset_ctrl_n_reg ; ram_do_reg[6]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.964      ;
; 2.621 ; sdram_reset_ctrl_n_reg ; ram_do_reg[2]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.964      ;
; 2.621 ; sdram_reset_ctrl_n_reg ; ram_do_reg[7]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.964      ;
; 2.621 ; sdram_reset_ctrl_n_reg ; ram_do_reg[3]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.964      ;
; 2.621 ; sdram_reset_ctrl_n_reg ; ram_do_reg[14]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.964      ;
; 2.621 ; sdram_reset_ctrl_n_reg ; ram_do_reg[26]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.964      ;
; 2.621 ; sdram_reset_ctrl_n_reg ; ram_do_reg[31]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.964      ;
; 2.621 ; sdram_reset_ctrl_n_reg ; ram_do_reg[18]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.964      ;
; 2.621 ; sdram_reset_ctrl_n_reg ; ram_do_reg[15]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.964      ;
; 2.621 ; sdram_reset_ctrl_n_reg ; ram_do_reg[10]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.964      ;
; 2.621 ; sdram_reset_ctrl_n_reg ; ram_do_reg[11]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.964      ;
; 2.621 ; sdram_reset_ctrl_n_reg ; ram_do_reg[22]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.964      ;
; 2.621 ; sdram_reset_ctrl_n_reg ; ram_do_reg[23]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.964      ;
; 2.621 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 2.972      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.965      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.965      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.965      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.965      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.965      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.965      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.965      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.965      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.965      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.965      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.965      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; ram_do_reg[29]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.965      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; ram_do_reg[28]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.965      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; ram_do_reg[24]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.965      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; ram_do_reg[21]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.965      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; ram_do_reg[4]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.965      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; ram_do_reg[1]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.965      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; ram_do_reg[5]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.965      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; ram_do_reg[0]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.965      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; ram_do_reg[12]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.965      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; ram_do_reg[8]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.965      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; ram_do_reg[13]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.965      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; ram_do_reg[20]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.965      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; ram_do_reg[17]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.965      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; ram_do_reg[9]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.965      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; ram_do_reg[16]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.965      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; ram_do_reg[25]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 2.965      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.151      ; 2.964      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.151      ; 2.964      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.151      ; 2.964      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.150      ; 2.963      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; sdram_request_complete_reg                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.150      ; 2.963      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; sdram_request_reg                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.150      ; 2.963      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_psel[0]                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.150      ; 2.963      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_oe                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.151      ; 2.964      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[1]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.151      ; 2.964      ;
; 2.622 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[0]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.151      ; 2.964      ;
; 2.846 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ras_n                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.121      ; 3.084      ;
; 2.846 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cas_n                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.121      ; 3.084      ;
; 2.846 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_we_n                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.121      ; 3.084      ;
; 2.846 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.121      ; 3.084      ;
; 2.846 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.121      ; 3.084      ;
; 2.868 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.110      ; 3.095      ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                         ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+---------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                                                          ; Clock Edge ; Target                    ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+---------------------------+
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[0]   ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[1]   ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[2]   ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[3]   ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[4]   ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[5]   ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[6]   ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[7]   ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[8]   ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[9]   ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[0] ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[1] ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[2] ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[3] ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[4] ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[5] ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[6] ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[7] ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[8] ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[9] ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[0]       ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[1]       ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[2]       ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[3]       ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[4]       ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[5]       ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[6]       ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[7]       ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[0]       ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[1]       ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[2]       ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[3]       ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[4]       ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[5]       ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[6]       ;
; 4.091 ; 4.309        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[7]       ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[2]              ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[3]              ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[4]              ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[5]              ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[6]              ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[7]              ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[8]              ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[9]              ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[0]         ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[1]         ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[2]         ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[3]         ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[4]         ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[5]         ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[6]         ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[7]         ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[8]         ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[9]         ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[0]   ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[1]   ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[2]   ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[3]   ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[4]   ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[5]   ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[6]   ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[7]   ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[8]   ;
; 4.092 ; 4.310        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[9]   ;
; 4.204 ; 4.355        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[0]              ;
; 4.204 ; 4.355        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[1]              ;
; 4.204 ; 4.355        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[2]              ;
; 4.204 ; 4.355        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[3]              ;
; 4.204 ; 4.355        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[7]              ;
; 4.205 ; 4.356        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[4]              ;
; 4.205 ; 4.356        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[5]              ;
; 4.205 ; 4.356        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[6]              ;
; 4.218 ; 4.374        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[4]              ;
; 4.218 ; 4.374        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[5]              ;
; 4.218 ; 4.374        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[6]              ;
; 4.219 ; 4.375        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[0]              ;
; 4.219 ; 4.375        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[1]              ;
; 4.219 ; 4.375        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[2]              ;
; 4.219 ; 4.375        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[3]              ;
; 4.219 ; 4.375        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[7]              ;
; 4.231 ; 4.417        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[2]              ;
; 4.231 ; 4.417        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[3]              ;
; 4.231 ; 4.417        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[4]              ;
; 4.231 ; 4.417        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[5]              ;
; 4.231 ; 4.417        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[6]              ;
; 4.231 ; 4.417        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[7]              ;
; 4.231 ; 4.417        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[8]              ;
; 4.231 ; 4.417        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[9]              ;
; 4.231 ; 4.417        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[0]         ;
; 4.231 ; 4.417        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[1]         ;
; 4.231 ; 4.417        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[2]         ;
; 4.231 ; 4.417        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[3]         ;
; 4.231 ; 4.417        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[4]         ;
; 4.231 ; 4.417        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[5]         ;
; 4.231 ; 4.417        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[6]         ;
; 4.231 ; 4.417        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[7]         ;
; 4.231 ; 4.417        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[8]         ;
; 4.231 ; 4.417        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[9]         ;
; 4.231 ; 4.417        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[0]   ;
; 4.231 ; 4.417        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[4]   ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+---------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                         ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-----------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                                                          ; Clock Edge ; Target                                                    ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-----------------------------------------------------------+
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[10]                                            ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[12]                                            ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[13]                                            ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[2]                                             ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[4]                                             ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[5]                                             ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[7]                                             ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_act                      ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ;
; 5.545 ; 5.763        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_refr_req                    ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[0]                                             ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[11]                                            ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[14]                                            ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[15]                                            ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[1]                                             ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[3]                                             ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[6]                                             ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[8]                                             ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[9]                                             ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_reg                      ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_refr_act                    ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1     ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_reg                      ;
; 5.546 ; 5.764        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[0]                                                ;
; 5.547 ; 5.765        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ;
; 5.547 ; 5.765        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ;
; 5.548 ; 5.766        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ;
; 5.548 ; 5.766        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|sdram_rdy                     ;
; 5.548 ; 5.766        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[10]                                               ;
; 5.548 ; 5.766        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[11]                                               ;
; 5.548 ; 5.766        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[8]                                                ;
; 5.548 ; 5.766        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[9]                                                ;
; 5.550 ; 5.768        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ;
; 5.550 ; 5.768        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[1]                                                ;
; 5.550 ; 5.768        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[2]                                                ;
; 5.550 ; 5.768        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[3]                                                ;
; 5.550 ; 5.768        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[4]                                                ;
; 5.550 ; 5.768        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[5]                                                ;
; 5.550 ; 5.768        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[6]                                                ;
; 5.550 ; 5.768        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[7]                                                ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_bena_reg[0]                                           ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_bena_reg[1]                                           ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[0]                                             ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[10]                                            ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[11]                                            ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[12]                                            ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[13]                                            ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[14]                                            ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[15]                                            ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[16]                                            ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[17]                                            ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[18]                                            ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[19]                                            ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[1]                                             ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[20]                                            ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[21]                                            ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[22]                                            ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[23]                                            ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[24]                                            ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[25]                                            ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[26]                                            ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[27]                                            ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[28]                                            ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[29]                                            ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[2]                                             ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[30]                                            ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[31]                                            ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[3]                                             ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[4]                                             ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[5]                                             ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[6]                                             ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[7]                                             ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[8]                                             ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[9]                                             ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_psel[0]                     ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_dq_oe                 ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_act                      ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_request_complete_reg                                ;
; 5.551 ; 5.769        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_request_reg                                         ;
; 5.611 ; 5.767        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[0]                   ;
; 5.611 ; 5.767        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[1]                   ;
; 5.611 ; 5.767        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[2]                   ;
; 5.613 ; 5.769        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[13]                  ;
; 5.613 ; 5.769        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[14]                  ;
; 5.613 ; 5.769        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[15]                  ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-----------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                               ;
+--------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                                          ; Clock Edge ; Target                                                                                                                         ;
+--------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------------------------------+
; 17.162 ; 17.380       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[6]          ;
; 17.164 ; 17.382       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[3]                           ;
; 17.164 ; 17.382       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[5]                           ;
; 17.164 ; 17.382       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[6]                           ;
; 17.165 ; 17.383       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_cache_reg[0]                          ;
; 17.166 ; 17.384       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[3]                       ;
; 17.166 ; 17.384       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[17]        ;
; 17.166 ; 17.384       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19]        ;
; 17.166 ; 17.384       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]         ;
; 17.166 ; 17.384       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[21]        ;
; 17.166 ; 17.384       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28]        ;
; 17.166 ; 17.384       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37]        ;
; 17.166 ; 17.384       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]         ;
; 17.166 ; 17.384       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[3]                                                                            ;
; 17.167 ; 17.385       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|display_shift_reg[0]                      ;
; 17.167 ; 17.385       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|display_shift_reg[1]                      ;
; 17.167 ; 17.385       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_cache_reg[1]                          ;
; 17.167 ; 17.385       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_cache_reg[5]                          ;
; 17.167 ; 17.385       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[5]                                                                                ;
; 17.167 ; 17.385       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[7]                                                                                ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|last_line_of_instruction_reg              ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wsync_reg                                 ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[10]        ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[15]        ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[16]        ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22]        ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]         ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[34]        ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38]        ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39]        ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40]        ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[6]         ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|nmi_n_reg                                  ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[14]                                                          ;
; 17.168 ; 17.386       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[16]                                                          ;
; 17.169 ; 17.387       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[14]        ;
; 17.169 ; 17.387       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[25]        ;
; 17.169 ; 17.387       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27]        ;
; 17.169 ; 17.387       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29]        ;
; 17.169 ; 17.387       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36]        ;
; 17.169 ; 17.387       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[41]        ;
; 17.169 ; 17.387       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]         ;
; 17.169 ; 17.387       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]         ;
; 17.169 ; 17.387       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[4]                                                                            ;
; 17.169 ; 17.387       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[5]                                                                            ;
; 17.169 ; 17.387       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[20]                                                                  ;
; 17.169 ; 17.387       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[12]                                                                             ;
; 17.169 ; 17.387       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[9]                                                                              ;
; 17.170 ; 17.388       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[0]                               ;
; 17.170 ; 17.388       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[1]                               ;
; 17.170 ; 17.388       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[2]                               ;
; 17.170 ; 17.388       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[7]                               ;
; 17.170 ; 17.388       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[25]                                                                           ;
; 17.170 ; 17.388       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[10]                                                          ;
; 17.170 ; 17.388       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[11]                                                          ;
; 17.170 ; 17.388       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[13]                                                          ;
; 17.170 ; 17.388       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[15]                                                          ;
; 17.170 ; 17.388       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[17]                                                          ;
; 17.170 ; 17.388       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[9]                                                           ;
; 17.170 ; 17.388       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[0]                                                                                ;
; 17.170 ; 17.388       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[1]                                                                                ;
; 17.170 ; 17.388       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[4]                                                                              ;
; 17.171 ; 17.389       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[1]                               ;
; 17.172 ; 17.390       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]         ;
; 17.172 ; 17.390       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[18]        ;
; 17.172 ; 17.390       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[23]        ;
; 17.172 ; 17.390       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26]        ;
; 17.172 ; 17.390       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[10]                                                                  ;
; 17.172 ; 17.390       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[11]                                                                  ;
; 17.172 ; 17.390       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[13]                                                                  ;
; 17.172 ; 17.390       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[15]                                                                  ;
; 17.172 ; 17.390       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[17]                                                                  ;
; 17.172 ; 17.390       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[9]                                                                   ;
; 17.176 ; 17.394       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|porta_output_reg[2]                           ;
; 17.176 ; 17.394       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|porta_output_reg[3]                           ;
; 17.177 ; 17.395       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32]        ;
; 17.177 ; 17.395       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[33]        ;
; 17.177 ; 17.395       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]         ;
; 17.184 ; 17.402       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hscrol_enabled_reg                        ;
; 17.184 ; 17.402       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hscrol_reg[0]                             ;
; 17.184 ; 17.402       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hscrol_reg[1]                             ;
; 17.184 ; 17.402       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hscrol_reg[2]                             ;
; 17.184 ; 17.402       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|instruction_blank_reg                     ;
; 17.184 ; 17.402       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|instruction_type_reg[2]                   ;
; 17.184 ; 17.402       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|map_background_reg                        ;
; 17.184 ; 17.402       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|multi_colour_character_reg                ;
; 17.184 ; 17.402       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|shift_twobit_reg                          ;
; 17.184 ; 17.402       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|twopixel_reg                              ;
; 17.184 ; 17.402       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_bk_modify_reg[1]                     ;
; 17.184 ; 17.402       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_bk_modify_reg[2]                     ;
; 17.184 ; 17.402       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_bk_modify_reg[3]                     ;
; 17.184 ; 17.402       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|colpm2_raw_reg[1]                           ;
; 17.184 ; 17.402       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|colpm2_raw_reg[3]                           ;
; 17.184 ; 17.402       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|colpm2_raw_reg[4]                           ;
; 17.184 ; 17.402       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|colpm3_raw_reg[1]                           ;
; 17.184 ; 17.402       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|colpm3_raw_reg[3]                           ;
; 17.184 ; 17.402       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|colpm3_raw_reg[4]                           ;
; 17.184 ; 17.402       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[0]                                ;
; 17.184 ; 17.402       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[1]                                ;
; 17.184 ; 17.402       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colbk_delay|shift_reg[0][0] ;
+--------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                         ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                ; Clock Edge ; Target                                                                                   ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+------------------------------------------------------------------------------------------+
; 17.424 ; 17.424       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]           ;
; 17.424 ; 17.424       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]           ;
; 17.424 ; 17.424       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]           ;
; 17.424 ; 17.424       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]           ;
; 17.424 ; 17.424       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|observablevcoout ;
; 17.435 ; 17.435       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; mcc_pll3|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl|inclk[0]               ;
; 17.435 ; 17.435       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; mcc_pll3|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl|outclk                 ;
; 17.448 ; 17.448       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]         ;
; 17.472 ; 17.472       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]         ;
; 17.484 ; 17.484       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; mcc_pll3|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl|inclk[0]               ;
; 17.484 ; 17.484       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; mcc_pll3|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl|outclk                 ;
; 17.495 ; 17.495       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]           ;
; 17.495 ; 17.495       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]           ;
; 17.495 ; 17.495       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]           ;
; 17.495 ; 17.495       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]           ;
; 17.495 ; 17.495       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|observablevcoout ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                             ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+--------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                ; Clock Edge ; Target                                                       ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+--------------------------------------------------------------+
; 32.951 ; 33.169       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dminus_buf1                 ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyleft_out[0]              ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyleft_out[1]              ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyleft_out[2]              ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyleft_out[3]              ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[0]              ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[1]              ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[2]              ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[3]              ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[4]              ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[5]              ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[6]              ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[7]              ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[8]              ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]                ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]                ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]                ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]                ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[0]                ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]                ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]                ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]                ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[0]              ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[1]              ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[2]              ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[3]              ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[4]              ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[5]              ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[6]              ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[7]              ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm1_last~_emulated          ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm_previous                 ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dminus_buf2                 ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dminus~en                   ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp1_last~_emulated          ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp2_prev~_emulated          ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp_previous                 ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dplus_buf1                  ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dplus_buf2                  ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dplus~en                    ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[0]           ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[1]           ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[2]           ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[3]           ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[4]           ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[5]           ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[6]           ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[7]           ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rden_sig                    ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid             ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[0]               ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[1]               ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[2]               ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[3]               ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[5]               ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[6]               ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[7]               ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[8]               ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[9]               ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[0]       ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[1]       ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[2]       ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[3]       ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[4]       ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[5]       ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[6]       ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[7]       ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[8]       ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[9]       ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|send_frame                  ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[0]                 ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]                 ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]                 ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|synch                       ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1           ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2           ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3           ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4           ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.Idle           ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.end_send1      ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.end_send2      ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.reset_released ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.reset_start    ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send1          ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send2          ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send3          ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send_bit0      ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send_bit1      ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send_bit7      ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send_complete  ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|val                         ;
; 32.969 ; 33.187       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]                ;
; 32.969 ; 33.187       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]                ;
; 32.969 ; 33.187       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]                ;
; 32.969 ; 33.187       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]                ;
; 32.969 ; 33.187       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[4]                ;
; 32.969 ; 33.187       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[5]                ;
; 32.969 ; 33.187       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[6]                ;
; 32.969 ; 33.187       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[7]                ;
; 32.969 ; 33.187       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dminus~reg0                 ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+--------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: 'altera_reserved_tck'                                                                                                                                                                                                                                                      ;
+--------+--------------+----------------+------------------+---------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock               ; Clock Edge ; Target                                                                                                                                                                                                                ;
+--------+--------------+----------------+------------------+---------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 49.400 ; 49.633       ; 0.233          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ;
; 49.400 ; 49.633       ; 0.233          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                           ;
; 49.401 ; 49.634       ; 0.233          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ;
; 49.401 ; 49.634       ; 0.233          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                           ;
; 49.402 ; 49.635       ; 0.233          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ;
; 49.403 ; 49.636       ; 0.233          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ;
; 49.476 ; 49.694       ; 0.218          ; High Pulse Width ; altera_reserved_tck ; Fall       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ;
; 49.518 ; 49.704       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ;
; 49.518 ; 49.704       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ;
; 49.518 ; 49.704       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ;
; 49.518 ; 49.704       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ;
; 49.518 ; 49.704       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ;
; 49.518 ; 49.704       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ;
; 49.518 ; 49.704       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ;
; 49.518 ; 49.704       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ;
; 49.518 ; 49.704       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ;
; 49.518 ; 49.704       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ;
; 49.518 ; 49.704       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ;
; 49.518 ; 49.704       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                                                                                                                                                 ;
; 49.518 ; 49.704       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0]                                                                                                                      ;
; 49.518 ; 49.704       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[10]                                                                                                                     ;
; 49.518 ; 49.704       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[3]                                                                                                                      ;
; 49.518 ; 49.704       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[9]                                                                                                                      ;
; 49.518 ; 49.704       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ;
; 49.518 ; 49.704       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ;
; 49.518 ; 49.704       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]                                              ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]                                              ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]                                              ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]                                              ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                   ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                   ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]                                                   ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]                                                   ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]                                                   ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                                                         ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                                                           ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                           ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                                                           ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                                                                                                                                           ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                                                           ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                                                             ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                                                             ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                             ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[3]                                                                                                                                             ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                                                             ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                             ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                                                          ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                                                          ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                                                          ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                                                          ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                                                          ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                                                          ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                                                          ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                                                          ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                                                          ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                                                          ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                        ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[2]~reg0                                                                                                                                        ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|reset_ena_reg                                                                                                                                           ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][0]                                                                                                                                    ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                                                                    ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][2]                                                                                                                                    ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][3]                                                                                                                                    ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                                                                    ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[11]                                                                                                                     ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[12]                                                                                                                     ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[14]                                                                                                                     ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[15]                                                                                                                     ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[2]                                                                                                                      ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                      ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                      ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[7]                                                                                                                      ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[8]                                                                                                                      ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo_bypass_reg                                                                                                                                          ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                     ;
; 49.519 ; 49.705       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                     ;
; 49.520 ; 49.706       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ;
; 49.520 ; 49.706       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ;
; 49.520 ; 49.706       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ;
; 49.520 ; 49.706       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ;
; 49.520 ; 49.706       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ;
; 49.520 ; 49.706       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ;
; 49.520 ; 49.706       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[2] ;
; 49.520 ; 49.706       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[3] ;
; 49.520 ; 49.706       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ;
; 49.520 ; 49.706       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]                                              ;
; 49.520 ; 49.706       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]                                              ;
; 49.520 ; 49.706       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]                                              ;
; 49.520 ; 49.706       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]                                              ;
+--------+--------------+----------------+------------------+---------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: 'FPGA_CLK'                                                                                                ;
+---------+--------------+----------------+------------------+----------+------------+----------------------------------------------------------------+
; Slack   ; Actual Width ; Required Width ; Type             ; Clock    ; Clock Edge ; Target                                                         ;
+---------+--------------+----------------+------------------+----------+------------+----------------------------------------------------------------+
; 99.779  ; 99.779       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]           ;
; 99.779  ; 99.779       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1]           ;
; 99.779  ; 99.779       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|observablevcoout ;
; 99.828  ; 99.828       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; FPGA_CLK~input|o                                               ;
; 99.857  ; 99.857       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|inclk[0]         ;
; 100.000 ; 100.000      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; FPGA_CLK~input|i                                               ;
; 100.000 ; 100.000      ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; FPGA_CLK~input|i                                               ;
; 100.142 ; 100.142      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|inclk[0]         ;
; 100.172 ; 100.172      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; FPGA_CLK~input|o                                               ;
; 100.218 ; 100.218      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]           ;
; 100.218 ; 100.218      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1]           ;
; 100.218 ; 100.218      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|observablevcoout ;
; 196.000 ; 200.000      ; 4.000          ; Port Rate        ; FPGA_CLK ; Rise       ; FPGA_CLK                                                       ;
+---------+--------------+----------------+------------------+----------+------------+----------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                                                                             ;
+---------------------+---------------------+-------+-------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+-------+-------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]         ; FPGA_CLK            ; 2.358 ; 2.529 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 2.331 ; 2.502 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 2.331 ; 2.502 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 2.331 ; 2.502 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 2.343 ; 2.514 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 2.353 ; 2.524 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 2.345 ; 2.516 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 2.343 ; 2.514 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 2.293 ; 2.463 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 2.352 ; 2.523 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 2.358 ; 2.529 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 2.354 ; 2.525 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 2.354 ; 2.525 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 2.354 ; 2.525 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 2.353 ; 2.524 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 2.353 ; 2.524 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 2.353 ; 2.524 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0             ; FPGA_CLK            ; 3.090 ; 3.295 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; altera_reserved_tdi ; altera_reserved_tck ; 3.319 ; 3.498 ; Rise       ; altera_reserved_tck                                                            ;
; altera_reserved_tms ; altera_reserved_tck ; 7.812 ; 8.070 ; Rise       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; 4.082 ; 4.389 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; 2.081 ; 2.330 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 4.519 ; 4.824 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 1.978 ; 2.279 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 4.667 ; 4.983 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 2.391 ; 2.702 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+-------+-------+------------+--------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]         ; FPGA_CLK            ; -1.518 ; -1.688 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; -1.550 ; -1.721 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; -1.550 ; -1.721 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; -1.550 ; -1.721 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; -1.563 ; -1.734 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; -1.572 ; -1.743 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; -1.565 ; -1.736 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; -1.563 ; -1.734 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; -1.518 ; -1.688 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; -1.572 ; -1.743 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; -1.579 ; -1.750 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; -1.574 ; -1.745 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; -1.574 ; -1.745 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; -1.574 ; -1.745 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; -1.573 ; -1.744 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; -1.573 ; -1.744 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; -1.573 ; -1.744 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0             ; FPGA_CLK            ; -2.244 ; -2.448 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; altera_reserved_tdi ; altera_reserved_tck ; 0.523  ; 0.314  ; Rise       ; altera_reserved_tck                                                            ;
; altera_reserved_tms ; altera_reserved_tck ; -1.427 ; -1.643 ; Rise       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; -3.376 ; -3.665 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; -1.253 ; -1.487 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; -3.810 ; -4.105 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; -1.186 ; -1.469 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; -3.908 ; -4.219 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; -1.538 ; -1.813 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                                                                     ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_A[*]          ; FPGA_CLK            ; 5.000  ; 5.175  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]         ; FPGA_CLK            ; 2.793  ; 2.643  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]         ; FPGA_CLK            ; 2.793  ; 2.643  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]         ; FPGA_CLK            ; 2.797  ; 2.647  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]         ; FPGA_CLK            ; 2.797  ; 2.647  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]         ; FPGA_CLK            ; 2.785  ; 2.635  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]         ; FPGA_CLK            ; 2.785  ; 2.635  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]         ; FPGA_CLK            ; 2.783  ; 2.633  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]         ; FPGA_CLK            ; 2.092  ; 2.035  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]         ; FPGA_CLK            ; 5.000  ; 5.175  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]         ; FPGA_CLK            ; 2.784  ; 2.634  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]        ; FPGA_CLK            ; 2.793  ; 2.643  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]        ; FPGA_CLK            ; 2.784  ; 2.634  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]         ; FPGA_CLK            ; 5.011  ; 5.186  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]        ; FPGA_CLK            ; 5.011  ; 5.186  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]        ; FPGA_CLK            ; 2.103  ; 2.046  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N         ; FPGA_CLK            ; 2.106  ; 2.049  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N          ; FPGA_CLK            ; 2.796  ; 2.646  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]         ; FPGA_CLK            ; 4.441  ; 4.774  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 3.114  ; 3.051  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 3.114  ; 3.051  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 3.114  ; 3.051  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 4.441  ; 4.774  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 4.432  ; 4.765  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 2.249  ; 2.212  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 2.973  ; 2.852  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 2.796  ; 2.646  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 3.092  ; 3.029  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 4.425  ; 4.758  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 3.090  ; 3.027  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 3.090  ; 3.027  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 3.090  ; 3.027  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 4.431  ; 4.764  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 3.091  ; 3.028  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 3.091  ; 3.028  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n        ; FPGA_CLK            ; 2.785  ; 2.635  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n        ; FPGA_CLK            ; 2.796  ; 2.646  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N         ; FPGA_CLK            ; 2.796  ; 2.646  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N          ; FPGA_CLK            ; 5.014  ; 5.189  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L             ; FPGA_CLK            ; 5.392  ; 5.605  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R             ; FPGA_CLK            ; 3.956  ; 3.809  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK              ; FPGA_CLK            ; 4.104  ; 3.956  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD              ; FPGA_CLK            ; 4.116  ; 3.969  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3             ; FPGA_CLK            ; 3.660  ; 3.792  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK           ; FPGA_CLK            ; 11.697 ;        ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK           ; FPGA_CLK            ;        ; 11.898 ; Fall       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]            ; FPGA_CLK            ; 4.310  ; 4.578  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]           ; FPGA_CLK            ; 2.093  ; 2.036  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]           ; FPGA_CLK            ; 4.310  ; 4.578  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]           ; FPGA_CLK            ; 2.092  ; 2.035  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]           ; FPGA_CLK            ; 2.095  ; 2.038  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]            ; FPGA_CLK            ; 4.312  ; 4.580  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]           ; FPGA_CLK            ; 2.094  ; 2.037  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]           ; FPGA_CLK            ; 2.094  ; 2.037  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]           ; FPGA_CLK            ; 2.094  ; 2.037  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]           ; FPGA_CLK            ; 4.312  ; 4.580  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; altera_reserved_tdo ; altera_reserved_tck ; 11.938 ; 12.749 ; Fall       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; 5.215  ; 5.113  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; 7.938  ; 7.904  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 7.467  ; 7.244  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 7.240  ; 7.383  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                                                                             ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_A[*]          ; FPGA_CLK            ; 1.451  ; 1.394  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]         ; FPGA_CLK            ; 2.124  ; 1.977  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]         ; FPGA_CLK            ; 2.124  ; 1.977  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]         ; FPGA_CLK            ; 2.129  ; 1.982  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]         ; FPGA_CLK            ; 2.129  ; 1.982  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]         ; FPGA_CLK            ; 2.117  ; 1.970  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]         ; FPGA_CLK            ; 2.117  ; 1.970  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]         ; FPGA_CLK            ; 2.115  ; 1.968  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]         ; FPGA_CLK            ; 1.451  ; 1.394  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]         ; FPGA_CLK            ; 4.332  ; 4.510  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]         ; FPGA_CLK            ; 2.116  ; 1.969  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]        ; FPGA_CLK            ; 2.124  ; 1.977  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]        ; FPGA_CLK            ; 2.116  ; 1.969  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]         ; FPGA_CLK            ; 1.462  ; 1.405  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]        ; FPGA_CLK            ; 4.343  ; 4.521  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]        ; FPGA_CLK            ; 1.462  ; 1.405  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N         ; FPGA_CLK            ; 1.465  ; 1.408  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N          ; FPGA_CLK            ; 2.128  ; 1.981  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]         ; FPGA_CLK            ; 1.608  ; 1.570  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 2.444  ; 2.383  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 2.444  ; 2.383  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 2.444  ; 2.383  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 3.800  ; 4.132  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 3.790  ; 4.122  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 1.608  ; 1.570  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 2.304  ; 2.185  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 2.128  ; 1.981  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 2.423  ; 2.362  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 3.785  ; 4.117  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 2.421  ; 2.360  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 2.421  ; 2.360  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 2.421  ; 2.360  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 3.790  ; 4.122  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 2.422  ; 2.361  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 2.422  ; 2.361  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n        ; FPGA_CLK            ; 2.117  ; 1.970  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n        ; FPGA_CLK            ; 2.128  ; 1.981  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N         ; FPGA_CLK            ; 2.128  ; 1.981  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N          ; FPGA_CLK            ; 4.346  ; 4.524  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L             ; FPGA_CLK            ; 4.617  ; 4.831  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R             ; FPGA_CLK            ; 3.148  ; 3.004  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK              ; FPGA_CLK            ; 3.291  ; 3.146  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD              ; FPGA_CLK            ; 3.303  ; 3.159  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3             ; FPGA_CLK            ; 2.863  ; 2.993  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK           ; FPGA_CLK            ; 10.984 ;        ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK           ; FPGA_CLK            ;        ; 11.186 ; Fall       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]            ; FPGA_CLK            ; 1.451  ; 1.394  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]           ; FPGA_CLK            ; 1.452  ; 1.395  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]           ; FPGA_CLK            ; 3.669  ; 3.937  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]           ; FPGA_CLK            ; 1.451  ; 1.394  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]           ; FPGA_CLK            ; 1.454  ; 1.397  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]            ; FPGA_CLK            ; 1.453  ; 1.396  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]           ; FPGA_CLK            ; 1.453  ; 1.396  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]           ; FPGA_CLK            ; 1.453  ; 1.396  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]           ; FPGA_CLK            ; 1.453  ; 1.396  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]           ; FPGA_CLK            ; 3.671  ; 3.939  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; altera_reserved_tdo ; altera_reserved_tck ; 9.639  ; 10.450 ; Fall       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; 4.654  ; 4.557  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; 7.265  ; 7.230  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 6.912  ; 6.685  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 6.592  ; 6.731  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                                                      ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 3.329 ; 3.280 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 3.329 ; 3.280 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 3.329 ; 3.280 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 3.329 ; 3.280 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 5.771 ; 6.034 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 6.545 ; 6.808 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 4.331 ; 4.221 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 4.066 ; 3.956 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 4.266 ; 4.138 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 3.713 ; 3.664 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 6.268 ; 6.531 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 3.694 ; 3.645 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 3.694 ; 3.645 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 3.694 ; 3.645 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 6.598 ; 6.861 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 4.537 ; 4.488 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 4.537 ; 4.488 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 4.078 ; 3.950 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 5.256 ; 5.207 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2       ; FPGA_CLK   ; 7.214 ; 7.104 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1        ; FPGA_CLK   ; 7.439 ; 7.702 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2        ; FPGA_CLK   ; 7.448 ; 7.338 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                                                              ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 2.576 ; 2.527 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 2.576 ; 2.527 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 2.576 ; 2.527 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 2.576 ; 2.527 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 5.004 ; 5.267 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 5.747 ; 6.010 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 3.534 ; 3.424 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 3.280 ; 3.170 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 3.430 ; 3.302 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 2.945 ; 2.896 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 5.481 ; 5.744 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 2.928 ; 2.879 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 2.928 ; 2.879 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 2.928 ; 2.879 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 5.797 ; 6.060 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 3.737 ; 3.688 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 3.737 ; 3.688 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 3.250 ; 3.122 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 4.713 ; 4.664 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2       ; FPGA_CLK   ; 6.588 ; 6.478 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1        ; FPGA_CLK   ; 6.891 ; 7.154 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2        ; FPGA_CLK   ; 6.813 ; 6.703 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                                                             ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 3.233     ; 3.282     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 3.233     ; 3.282     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 3.233     ; 3.282     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 3.233     ; 3.282     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 5.979     ; 5.716     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 6.684     ; 6.421     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 4.109     ; 4.219     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 3.853     ; 3.963     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 3.999     ; 4.127     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 3.620     ; 3.669     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 6.442     ; 6.179     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 3.601     ; 3.650     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 3.601     ; 3.650     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 3.601     ; 3.650     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 6.745     ; 6.482     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 4.372     ; 4.421     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 4.372     ; 4.421     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 3.888     ; 4.016     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 5.116     ; 5.165     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2       ; FPGA_CLK   ; 7.008     ; 7.118     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1        ; FPGA_CLK   ; 7.624     ; 7.361     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2        ; FPGA_CLK   ; 7.229     ; 7.339     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                                                     ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 2.483     ; 2.532     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 2.483     ; 2.532     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 2.483     ; 2.532     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 2.483     ; 2.532     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 5.214     ; 4.951     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 5.891     ; 5.628     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 3.316     ; 3.426     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 3.070     ; 3.180     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 3.169     ; 3.297     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 2.854     ; 2.903     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 5.658     ; 5.395     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 2.836     ; 2.885     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 2.836     ; 2.885     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 2.836     ; 2.885     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 5.949     ; 5.686     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 3.576     ; 3.625     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 3.576     ; 3.625     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 3.063     ; 3.191     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 4.577     ; 4.626     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2       ; FPGA_CLK   ; 6.386     ; 6.496     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1        ; FPGA_CLK   ; 7.079     ; 6.816     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2        ; FPGA_CLK   ; 6.598     ; 6.708     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+


---------------------------------------------
; Slow 1200mV 0C Model Metastability Report ;
---------------------------------------------
No synchronizer chains to report.


+---------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup Summary                                                                      ;
+--------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                          ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; -0.370 ; -2.772        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.541  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 6.496  ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 29.768 ; 0.000         ;
; altera_reserved_tck                                                            ; 48.247 ; 0.000         ;
+--------------------------------------------------------------------------------+--------+---------------+


+--------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold Summary                                                                      ;
+--------------------------------------------------------------------------------+-------+---------------+
; Clock                                                                          ; Slack ; End Point TNS ;
+--------------------------------------------------------------------------------+-------+---------------+
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 0.131 ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.136 ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.137 ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.187 ; 0.000         ;
; altera_reserved_tck                                                            ; 0.187 ; 0.000         ;
+--------------------------------------------------------------------------------+-------+---------------+


+---------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery Summary                                                                   ;
+--------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                          ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 9.087  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 9.444  ; 0.000         ;
; altera_reserved_tck                                                            ; 49.446 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 64.805 ; 0.000         ;
+--------------------------------------------------------------------------------+--------+---------------+


+--------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal Summary                                                                   ;
+--------------------------------------------------------------------------------+-------+---------------+
; Clock                                                                          ; Slack ; End Point TNS ;
+--------------------------------------------------------------------------------+-------+---------------+
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 0.120 ; 0.000         ;
; altera_reserved_tck                                                            ; 0.671 ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.683 ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 1.453 ; 0.000         ;
+--------------------------------------------------------------------------------+-------+---------------+


+---------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width Summary                                                        ;
+--------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                          ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 4.152  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.606  ; 0.000         ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.205 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[1]                           ; 17.437 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 33.039 ; 0.000         ;
; altera_reserved_tck                                                            ; 49.296 ; 0.000         ;
; FPGA_CLK                                                                       ; 99.418 ; 0.000         ;
+--------------------------------------------------------------------------------+--------+---------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                         ;
+--------+--------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                        ; To Node                                                                                                                 ; Launch Clock                                         ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; -0.370 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.664      ;
; -0.356 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.650      ;
; -0.318 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[22]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.794     ; 2.615      ;
; -0.302 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.596      ;
; -0.287 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.581      ;
; -0.280 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[27]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.574      ;
; -0.266 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[27]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.560      ;
; -0.262 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[22]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.794     ; 2.559      ;
; -0.257 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.791     ; 2.557      ;
; -0.249 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[30]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.791     ; 2.549      ;
; -0.243 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.791     ; 2.543      ;
; -0.235 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[22]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.794     ; 2.532      ;
; -0.230 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[28]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.524      ;
; -0.215 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[26]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.509      ;
; -0.213 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[21]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.794     ; 2.510      ;
; -0.212 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[27]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.506      ;
; -0.207 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[22]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.794     ; 2.504      ;
; -0.199 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[21]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.794     ; 2.496      ;
; -0.197 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[27]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.491      ;
; -0.193 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[30]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.791     ; 2.493      ;
; -0.189 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.791     ; 2.489      ;
; -0.174 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.791     ; 2.474      ;
; -0.174 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[28]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.468      ;
; -0.173 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[23]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.467      ;
; -0.166 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[30]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.791     ; 2.466      ;
; -0.159 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[26]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.453      ;
; -0.159 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[23]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.453      ;
; -0.147 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[28]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.441      ;
; -0.145 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[21]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.794     ; 2.442      ;
; -0.138 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[30]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.791     ; 2.438      ;
; -0.132 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[26]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.426      ;
; -0.130 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[21]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.794     ; 2.427      ;
; -0.119 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[28]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.413      ;
; -0.105 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[23]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.399      ;
; -0.104 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[26]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.398      ;
; -0.093 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.798     ; 2.386      ;
; -0.090 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[23]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.384      ;
; -0.089 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[25]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.383      ;
; -0.075 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[25]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.369      ;
; -0.070 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[24]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.364      ;
; -0.069 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.599     ; 2.561      ;
; -0.041 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[14]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.789     ; 2.343      ;
; -0.041 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.603     ; 2.529      ;
; -0.040 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[1]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.793     ; 2.338      ;
; -0.031 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[19]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.792     ; 2.330      ;
; -0.028 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.798     ; 2.321      ;
; -0.021 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[18]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.315      ;
; -0.021 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[25]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.315      ;
; -0.017 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[19]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.792     ; 2.316      ;
; -0.014 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[24]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.308      ;
; -0.007 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.801     ; 2.297      ;
; -0.006 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[20]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.609     ; 2.488      ;
; -0.006 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[25]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.300      ;
; -0.004 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.599     ; 2.496      ;
; 0.013  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[24]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.281      ;
; 0.015  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[14]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.789     ; 2.287      ;
; 0.025  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[1]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.793     ; 2.273      ;
; 0.030  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.599     ; 2.462      ;
; 0.035  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[18]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.259      ;
; 0.037  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[19]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.792     ; 2.262      ;
; 0.041  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.613     ; 2.437      ;
; 0.041  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.598     ; 2.452      ;
; 0.041  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[24]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.253      ;
; 0.042  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[14]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.789     ; 2.260      ;
; 0.043  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.633     ; 2.415      ;
; 0.050  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[20]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.609     ; 2.432      ;
; 0.052  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[19]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.792     ; 2.247      ;
; 0.058  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.801     ; 2.232      ;
; 0.058  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.637     ; 2.396      ;
; 0.060  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.613     ; 2.418      ;
; 0.061  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.602     ; 2.428      ;
; 0.062  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[18]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.232      ;
; 0.063  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.804     ; 2.224      ;
; 0.070  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.617     ; 2.404      ;
; 0.070  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[14]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.789     ; 2.232      ;
; 0.074  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[43] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.795     ; 2.222      ;
; 0.077  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[20]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.609     ; 2.405      ;
; 0.083  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.603     ; 2.405      ;
; 0.086  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[17]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.598     ; 2.407      ;
; 0.090  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[18]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.797     ; 2.204      ;
; 0.095  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.599     ; 2.397      ;
; 0.100  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.616     ; 2.375      ;
; 0.100  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.603     ; 2.388      ;
; 0.100  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[17]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.598     ; 2.393      ;
; 0.105  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[20]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.609     ; 2.377      ;
; 0.106  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.613     ; 2.372      ;
; 0.106  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.598     ; 2.387      ;
; 0.108  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.633     ; 2.350      ;
; 0.119  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.612     ; 2.360      ;
; 0.121  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[30] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.808     ; 2.162      ;
; 0.123  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.808     ; 2.160      ;
; 0.125  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.613     ; 2.353      ;
; 0.128  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.804     ; 2.159      ;
; 0.134  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[12]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.801     ; 2.156      ;
; 0.135  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.803     ; 2.153      ;
; 0.135  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.616     ; 2.340      ;
; 0.135  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.617     ; 2.339      ;
; 0.135  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.598     ; 2.358      ;
; 0.136  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.612     ; 2.343      ;
; 0.138  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3.174        ; -0.603     ; 2.350      ;
+--------+--------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                                        ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                         ; To Node                                      ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 5.541 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 5.948      ;
; 5.578 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.099     ; 5.902      ;
; 5.583 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.084     ; 5.912      ;
; 5.586 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 5.903      ;
; 5.601 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 5.888      ;
; 5.604 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.102     ; 5.873      ;
; 5.611 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.091     ; 5.877      ;
; 5.612 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.099     ; 5.868      ;
; 5.637 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.089     ; 5.853      ;
; 5.638 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.102     ; 5.839      ;
; 5.639 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 5.850      ;
; 5.642 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.097     ; 5.840      ;
; 5.668 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 5.811      ;
; 5.677 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.091     ; 5.811      ;
; 5.684 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.091     ; 5.804      ;
; 5.687 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.097     ; 5.795      ;
; 5.702 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.097     ; 5.780      ;
; 5.708 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 5.771      ;
; 5.710 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.094     ; 5.775      ;
; 5.712 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.098     ; 5.769      ;
; 5.713 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 5.766      ;
; 5.721 ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.092     ; 5.766      ;
; 5.728 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 5.751      ;
; 5.732 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.099     ; 5.748      ;
; 5.736 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 5.753      ;
; 5.738 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.101     ; 5.740      ;
; 5.738 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.096     ; 5.745      ;
; 5.742 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 5.737      ;
; 5.747 ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.095     ; 5.737      ;
; 5.751 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.097     ; 5.731      ;
; 5.752 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.095     ; 5.732      ;
; 5.758 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.102     ; 5.719      ;
; 5.764 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.099     ; 5.716      ;
; 5.765 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.099     ; 5.715      ;
; 5.772 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.098     ; 5.709      ;
; 5.777 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 5.702      ;
; 5.784 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.084     ; 5.711      ;
; 5.786 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.095     ; 5.698      ;
; 5.788 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[8]                             ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.091     ; 5.700      ;
; 5.791 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.102     ; 5.686      ;
; 5.802 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[14]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 5.687      ;
; 5.814 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.092     ; 5.673      ;
; 5.815 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.092     ; 5.672      ;
; 5.816 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.093     ; 5.670      ;
; 5.817 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.098     ; 5.664      ;
; 5.825 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.092     ; 5.662      ;
; 5.832 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.098     ; 5.649      ;
; 5.835 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.097     ; 5.647      ;
; 5.837 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.097     ; 5.645      ;
; 5.842 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.099     ; 5.638      ;
; 5.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.098     ; 5.636      ;
; 5.847 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.099     ; 5.633      ;
; 5.849 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.092     ; 5.638      ;
; 5.851 ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.093     ; 5.635      ;
; 5.858 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.087     ; 5.634      ;
; 5.859 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.092     ; 5.628      ;
; 5.861 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.093     ; 5.625      ;
; 5.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 5.617      ;
; 5.863 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 5.616      ;
; 5.866 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[8]                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.084     ; 5.629      ;
; 5.868 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.097     ; 5.614      ;
; 5.871 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[8]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.102     ; 5.606      ;
; 5.871 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[9]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 5.608      ;
; 5.876 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.093     ; 5.610      ;
; 5.877 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.091     ; 5.611      ;
; 5.878 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[12]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.089     ; 5.612      ;
; 5.879 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 5.610      ;
; 5.880 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.097     ; 5.602      ;
; 5.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.098     ; 5.600      ;
; 5.881 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.099     ; 5.599      ;
; 5.886 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.094     ; 5.599      ;
; 5.889 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|CartLogic:emu_cart|oss_bank[1]                       ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.104     ; 5.586      ;
; 5.894 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|CartLogic:emu_cart|oss_bank[0]                       ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.104     ; 5.581      ;
; 5.895 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 5.584      ;
; 5.895 ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.088     ; 5.596      ;
; 5.895 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.097     ; 5.587      ;
; 5.905 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.098     ; 5.576      ;
; 5.905 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[8]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.102     ; 5.572      ;
; 5.905 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[9]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 5.574      ;
; 5.906 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.095     ; 5.578      ;
; 5.912 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.092     ; 5.575      ;
; 5.915 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|CartLogic:emu_cart|oss_bank[1]                       ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.107     ; 5.557      ;
; 5.920 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|CartLogic:emu_cart|oss_bank[0]                       ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.107     ; 5.552      ;
; 5.921 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.084     ; 5.574      ;
; 5.921 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[9]                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.084     ; 5.574      ;
; 5.924 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 5.565      ;
; 5.925 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.093     ; 5.561      ;
; 5.929 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[9]                             ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.091     ; 5.559      ;
; 5.929 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[22]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.104     ; 5.546      ;
; 5.931 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.096     ; 5.552      ;
; 5.933 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.097     ; 5.549      ;
; 5.935 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.097     ; 5.547      ;
; 5.935 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[8]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 5.544      ;
; 5.935 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[9]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.098     ; 5.546      ;
; 5.939 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.095     ; 5.545      ;
; 5.939 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 5.550      ;
; 5.943 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[8]                             ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.098     ; 5.538      ;
; 5.949 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.091     ; 5.539      ;
; 5.952 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.091     ; 5.536      ;
; 5.955 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[22]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.107     ; 5.517      ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                                                   ;
+-------+-------------------------+-------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node               ; To Node           ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------+-------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 6.496 ; svideo_yout_dly2[5]     ; cvbs2_out[1]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 2.135      ;
; 6.498 ; svideo_yout_dly2[6]     ; cvbs2_out[1]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 2.133      ;
; 6.505 ; svideo_yout_dly2[5]     ; cvbs2_out[0]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 2.126      ;
; 6.507 ; svideo_yout_dly2[6]     ; cvbs2_out[0]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 2.124      ;
; 6.530 ; svideo_yout_dly2[5]     ; cvbs2_out[3]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 2.101      ;
; 6.532 ; svideo_yout_dly2[6]     ; cvbs2_out[3]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 2.099      ;
; 6.608 ; svideo_yout_dly2[5]     ; cvbs2_out[2]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 2.023      ;
; 6.610 ; svideo_yout_dly2[6]     ; cvbs2_out[2]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 2.021      ;
; 6.632 ; svideo_yout_dly2[5]     ; cvbs2_out[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.997      ;
; 6.634 ; svideo_yout_dly2[6]     ; cvbs2_out[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.995      ;
; 6.648 ; svideo_yout_dly2[5]     ; cvbs2_out[4]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.039     ; 1.982      ;
; 6.648 ; svideo_yout_dly2[4]     ; cvbs2_out[1]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.983      ;
; 6.650 ; svideo_yout_dly2[6]     ; cvbs2_out[4]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.039     ; 1.980      ;
; 6.657 ; svideo_yout_dly2[4]     ; cvbs2_out[0]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.974      ;
; 6.672 ; svideo_yout_dly2[7]     ; cvbs2_out[1]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.959      ;
; 6.681 ; svideo_yout_dly2[7]     ; cvbs2_out[0]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.950      ;
; 6.682 ; svideo_yout_dly2[4]     ; cvbs2_out[3]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.949      ;
; 6.701 ; svideo_yout_dly2[7]     ; cvbs2_out[3]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.930      ;
; 6.730 ; svideo_yout_dly2[5]     ; cvbs2_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.899      ;
; 6.732 ; svideo_yout_dly2[6]     ; cvbs2_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.897      ;
; 6.754 ; svideo_yout_dly2[3]     ; cvbs2_out[1]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.877      ;
; 6.755 ; svideo_yout_dly2[5]     ; cvbs2_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.037     ; 1.877      ;
; 6.757 ; svideo_yout_dly2[6]     ; cvbs2_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.037     ; 1.875      ;
; 6.760 ; svideo_yout_dly2[4]     ; cvbs2_out[2]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.871      ;
; 6.763 ; svideo_yout_dly2[3]     ; cvbs2_out[0]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.868      ;
; 6.763 ; svideo_yout_dly2[7]     ; cvbs2_out[2]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.868      ;
; 6.769 ; svideo_yout_dly2[7]     ; cvbs2_out[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.860      ;
; 6.774 ; svideo_yout_dly2[1]     ; cvbs2_out[1]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.857      ;
; 6.783 ; svideo_yout_dly2[1]     ; cvbs2_out[0]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.848      ;
; 6.784 ; svideo_yout_dly2[4]     ; cvbs2_out[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.845      ;
; 6.787 ; svideo_yout_dly2[2]     ; cvbs2_out[1]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.844      ;
; 6.788 ; svideo_yout_dly2[3]     ; cvbs2_out[3]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.843      ;
; 6.796 ; svideo_yout_dly2[2]     ; cvbs2_out[0]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.835      ;
; 6.800 ; svideo_yout_dly2[4]     ; cvbs2_out[4]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.039     ; 1.830      ;
; 6.806 ; svideo_yout_dly2[7]     ; cvbs2_out[4]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.039     ; 1.824      ;
; 6.808 ; svideo_yout_dly2[1]     ; cvbs2_out[3]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.823      ;
; 6.821 ; svideo_yout_dly2[2]     ; cvbs2_out[3]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.810      ;
; 6.866 ; svideo_yout_dly2[3]     ; cvbs2_out[2]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.765      ;
; 6.882 ; svideo_yout_dly2[4]     ; cvbs2_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.747      ;
; 6.882 ; svideo_yout_dly2[7]     ; cvbs2_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.747      ;
; 6.884 ; svideo_yout_dly2[2]     ; cvbs2_out[2]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.747      ;
; 6.886 ; svideo_yout_dly2[1]     ; cvbs2_out[2]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.745      ;
; 6.890 ; svideo_yout_dly2[3]     ; cvbs2_out[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.739      ;
; 6.890 ; svideo_yout_dly2[2]     ; cvbs2_out[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.739      ;
; 6.902 ; svideo_yout_dly2[7]     ; cvbs2_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.037     ; 1.730      ;
; 6.906 ; svideo_yout_dly2[3]     ; cvbs2_out[4]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.039     ; 1.724      ;
; 6.907 ; svideo_yout_dly2[4]     ; cvbs2_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.037     ; 1.725      ;
; 6.910 ; svideo_yout_dly2[1]     ; cvbs2_out[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.719      ;
; 6.926 ; svideo_yout_dly2[1]     ; cvbs2_out[4]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.039     ; 1.704      ;
; 6.927 ; svideo_yout_dly2[2]     ; cvbs2_out[4]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.039     ; 1.703      ;
; 6.948 ; svideo_yout_dly2[0]     ; cvbs2_out[1]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.683      ;
; 6.957 ; svideo_yout_dly2[0]     ; cvbs2_out[0]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.674      ;
; 6.982 ; svideo_yout_dly2[0]     ; cvbs2_out[3]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.649      ;
; 6.988 ; svideo_yout_dly2[3]     ; cvbs2_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.641      ;
; 6.996 ; svideo:svideo|chroma[2] ; cvbs1_out[9]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.101     ; 1.620      ;
; 7.000 ; svideo:svideo|chroma[2] ; cvbs1_out[8]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.101     ; 1.616      ;
; 7.003 ; svideo_yout_dly2[2]     ; cvbs2_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.626      ;
; 7.008 ; svideo_yout_dly2[1]     ; cvbs2_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.621      ;
; 7.013 ; svideo_yout_dly2[3]     ; cvbs2_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.037     ; 1.619      ;
; 7.023 ; svideo_yout_dly2[2]     ; cvbs2_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.037     ; 1.609      ;
; 7.033 ; svideo_yout_dly2[1]     ; cvbs2_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.037     ; 1.599      ;
; 7.034 ; svideo:svideo|chroma[5] ; cvbs1_out[9]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.101     ; 1.582      ;
; 7.038 ; svideo:svideo|chroma[5] ; cvbs1_out[8]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.101     ; 1.578      ;
; 7.040 ; cvbs1_out[2]            ; cvbs2_out[0]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.035     ; 1.594      ;
; 7.044 ; cvbs1_out[3]            ; cvbs2_out[1]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.035     ; 1.590      ;
; 7.050 ; svideo:svideo|chroma[4] ; cvbs1_out[9]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.101     ; 1.566      ;
; 7.054 ; svideo:svideo|chroma[4] ; cvbs1_out[8]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.101     ; 1.562      ;
; 7.058 ; svideo_yout_dly2[0]     ; cvbs2_out[2]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.038     ; 1.573      ;
; 7.064 ; svideo:svideo|chroma[2] ; cvbs1_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.101     ; 1.552      ;
; 7.064 ; svideo_yout_dly2[0]     ; cvbs2_out[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.565      ;
; 7.068 ; svideo:svideo|chroma[2] ; cvbs1_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.101     ; 1.548      ;
; 7.075 ; svideo:svideo|chroma[7] ; cvbs1_out[9]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.101     ; 1.541      ;
; 7.079 ; svideo:svideo|chroma[7] ; cvbs1_out[8]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.101     ; 1.537      ;
; 7.079 ; cvbs1_out[5]            ; cvbs2_out[3]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.035     ; 1.555      ;
; 7.100 ; svideo_yout_dly2[0]     ; cvbs2_out[4]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.039     ; 1.530      ;
; 7.102 ; svideo:svideo|chroma[5] ; cvbs1_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.101     ; 1.514      ;
; 7.106 ; svideo:svideo|chroma[5] ; cvbs1_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.101     ; 1.510      ;
; 7.118 ; svideo:svideo|chroma[4] ; cvbs1_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.101     ; 1.498      ;
; 7.122 ; svideo:svideo|chroma[4] ; cvbs1_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.101     ; 1.494      ;
; 7.129 ; svideo:svideo|chroma[1] ; cvbs1_out[9]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.101     ; 1.487      ;
; 7.132 ; svideo:svideo|chroma[2] ; cvbs1_out[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.101     ; 1.484      ;
; 7.133 ; svideo:svideo|chroma[1] ; cvbs1_out[8]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.101     ; 1.483      ;
; 7.136 ; svideo:svideo|chroma[2] ; cvbs1_out[4]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.101     ; 1.480      ;
; 7.141 ; cvbs1_out[4]            ; cvbs2_out[2]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.035     ; 1.493      ;
; 7.177 ; svideo_yout_dly2[0]     ; cvbs2_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.040     ; 1.452      ;
; 7.180 ; svideo:svideo|chroma[6] ; cvbs1_out[9]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.101     ; 1.436      ;
; 7.181 ; svideo:svideo|chroma[0] ; cvbs1_out[9]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.101     ; 1.435      ;
; 7.184 ; svideo:svideo|chroma[6] ; cvbs1_out[8]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.101     ; 1.432      ;
; 7.185 ; svideo:svideo|chroma[0] ; cvbs1_out[8]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.101     ; 1.431      ;
; 7.186 ; svideo:svideo|chroma[4] ; cvbs1_out[5]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.101     ; 1.430      ;
; 7.197 ; svideo:svideo|chroma[1] ; cvbs1_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.101     ; 1.419      ;
; 7.197 ; svideo_yout_dly2[0]     ; cvbs2_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.037     ; 1.435      ;
; 7.200 ; svideo:svideo|chroma[2] ; cvbs1_out[3]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.101     ; 1.416      ;
; 7.201 ; svideo:svideo|chroma[1] ; cvbs1_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.101     ; 1.415      ;
; 7.203 ; svideo:svideo|luma[1]   ; luma_saturated[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.096     ; 1.418      ;
; 7.210 ; svideo:svideo|chroma[3] ; cvbs1_out[9]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.101     ; 1.406      ;
; 7.214 ; svideo:svideo|chroma[3] ; cvbs1_out[8]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.101     ; 1.402      ;
; 7.248 ; svideo:svideo|chroma[6] ; cvbs1_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.101     ; 1.368      ;
; 7.249 ; svideo:svideo|chroma[0] ; cvbs1_out[7]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.101     ; 1.367      ;
; 7.253 ; svideo:svideo|chroma[0] ; cvbs1_out[6]      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.730        ; -0.101     ; 1.363      ;
+-------+-------------------------+-------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                 ;
+--------+-----------------------------------------------+----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                     ; To Node                                            ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------+----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 29.768 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.012     ; 3.530      ;
; 29.768 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.012     ; 3.530      ;
; 29.803 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.011     ; 3.496      ;
; 29.803 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.011     ; 3.496      ;
; 29.946 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.011     ; 3.353      ;
; 29.946 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.011     ; 3.353      ;
; 29.948 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.011     ; 3.351      ;
; 29.948 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.011     ; 3.351      ;
; 29.972 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.010     ; 3.328      ;
; 29.972 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.010     ; 3.328      ;
; 29.982 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.012     ; 3.316      ;
; 29.982 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.012     ; 3.316      ;
; 29.987 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.012     ; 3.311      ;
; 30.022 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.011     ; 3.277      ;
; 30.045 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.018      ; 3.283      ;
; 30.045 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.018      ; 3.283      ;
; 30.047 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.012     ; 3.251      ;
; 30.047 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.012     ; 3.251      ;
; 30.070 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.011     ; 3.229      ;
; 30.070 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.011     ; 3.229      ;
; 30.072 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.018      ; 3.256      ;
; 30.072 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.018      ; 3.256      ;
; 30.082 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.011     ; 3.217      ;
; 30.082 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.011     ; 3.217      ;
; 30.121 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.012     ; 3.177      ;
; 30.121 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.012     ; 3.177      ;
; 30.125 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[4]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.022      ; 3.207      ;
; 30.125 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[14]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.022      ; 3.207      ;
; 30.126 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.010     ; 3.174      ;
; 30.126 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.010     ; 3.174      ;
; 30.126 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.022      ; 3.206      ;
; 30.128 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.011     ; 3.171      ;
; 30.128 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.011     ; 3.171      ;
; 30.145 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.013     ; 3.152      ;
; 30.147 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.013     ; 3.150      ;
; 30.152 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[5]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.022      ; 3.180      ;
; 30.153 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[9]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.022      ; 3.179      ;
; 30.153 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[10]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.022      ; 3.179      ;
; 30.155 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[11]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.022      ; 3.177      ;
; 30.155 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[12]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.022      ; 3.177      ;
; 30.160 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.011     ; 3.139      ;
; 30.160 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.011     ; 3.139      ;
; 30.167 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[10]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.012     ; 3.131      ;
; 30.167 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.011     ; 3.132      ;
; 30.168 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.012     ; 3.130      ;
; 30.172 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.012     ; 3.126      ;
; 30.173 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.012     ; 3.125      ;
; 30.182 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.013     ; 3.115      ;
; 30.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.013     ; 3.113      ;
; 30.198 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.018      ; 3.130      ;
; 30.198 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.018      ; 3.130      ;
; 30.201 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.012     ; 3.097      ;
; 30.204 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[10]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.012     ; 3.094      ;
; 30.205 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.012     ; 3.093      ;
; 30.209 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.012     ; 3.089      ;
; 30.210 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.012     ; 3.088      ;
; 30.211 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.010     ; 3.089      ;
; 30.211 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.010     ; 3.089      ;
; 30.214 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.014     ; 3.082      ;
; 30.216 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.014     ; 3.080      ;
; 30.225 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.018      ; 3.103      ;
; 30.225 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.018      ; 3.103      ;
; 30.225 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.018      ; 3.103      ;
; 30.225 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.018      ; 3.103      ;
; 30.227 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.011     ; 3.072      ;
; 30.227 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.011     ; 3.072      ;
; 30.229 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[4]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.022      ; 3.103      ;
; 30.229 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[14]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.022      ; 3.103      ;
; 30.230 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.022      ; 3.102      ;
; 30.236 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[10]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.013     ; 3.061      ;
; 30.237 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.013     ; 3.060      ;
; 30.241 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.013     ; 3.056      ;
; 30.242 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.013     ; 3.055      ;
; 30.244 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.014     ; 3.052      ;
; 30.246 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.014     ; 3.050      ;
; 30.252 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.018      ; 3.076      ;
; 30.252 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.018      ; 3.076      ;
; 30.256 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[5]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.022      ; 3.076      ;
; 30.257 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[9]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.022      ; 3.075      ;
; 30.257 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[10]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.022      ; 3.075      ;
; 30.259 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[11]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.022      ; 3.073      ;
; 30.259 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[12]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.022      ; 3.073      ;
; 30.261 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.012     ; 3.037      ;
; 30.261 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.012     ; 3.037      ;
; 30.264 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.014     ; 3.032      ;
; 30.266 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.014     ; 3.030      ;
; 30.266 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[10]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.013     ; 3.031      ;
; 30.267 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.013     ; 3.030      ;
; 30.271 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.013     ; 3.026      ;
; 30.271 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.013     ; 3.026      ;
; 30.272 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.013     ; 3.025      ;
; 30.273 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.013     ; 3.024      ;
; 30.286 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[10]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.013     ; 3.011      ;
; 30.287 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.013     ; 3.010      ;
; 30.288 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.012     ; 3.010      ;
; 30.288 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.012     ; 3.010      ;
; 30.289 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.011     ; 3.010      ;
; 30.291 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.013     ; 3.006      ;
; 30.292 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.013     ; 3.005      ;
; 30.293 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.010     ; 3.007      ;
+--------+-----------------------------------------------+----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                      ;
+--------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                                                                                                                                        ; To Node                                                                                                                                                                                                               ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+--------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 48.247 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                              ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.442      ; 2.182      ;
; 48.332 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.443      ; 2.098      ;
; 48.451 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                   ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.444      ; 1.980      ;
; 48.480 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.441      ; 1.948      ;
; 48.504 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.443      ; 1.926      ;
; 48.509 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[3]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.441      ; 1.919      ;
; 48.534 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.437      ; 1.890      ;
; 48.538 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.441      ; 1.890      ;
; 48.582 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                              ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.437      ; 1.842      ;
; 48.673 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                   ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.437      ; 1.751      ;
; 48.694 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.442      ; 1.735      ;
; 48.774 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.439      ; 1.652      ;
; 48.809 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.443      ; 1.621      ;
; 48.840 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|design_hash_reg[0]                                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.436      ; 1.583      ;
; 48.844 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.439      ; 1.582      ;
; 48.845 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.438      ; 1.580      ;
; 48.926 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.441      ; 1.502      ;
; 48.952 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.439      ; 1.474      ;
; 48.964 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.441      ; 1.464      ;
; 49.012 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.439      ; 1.414      ;
; 49.024 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[0]                                                                                                                               ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.437      ; 1.400      ;
; 49.218 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[0]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.437      ; 1.206      ;
; 49.218 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.439      ; 1.208      ;
; 49.491 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo_bypass_reg                                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.439      ; 0.935      ;
; 97.627 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.039     ; 2.321      ;
; 97.627 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.039     ; 2.321      ;
; 97.627 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.039     ; 2.321      ;
; 97.627 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.039     ; 2.321      ;
; 97.627 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.039     ; 2.321      ;
; 97.627 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.039     ; 2.321      ;
; 97.627 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.039     ; 2.321      ;
; 97.627 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.039     ; 2.321      ;
; 97.635 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 2.319      ;
; 97.635 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 2.319      ;
; 97.635 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 2.319      ;
; 97.635 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 2.319      ;
; 97.635 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 2.319      ;
; 97.635 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 2.319      ;
; 97.635 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 2.319      ;
; 97.635 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 2.319      ;
; 97.635 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 2.319      ;
; 97.769 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[3]                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 2.186      ;
; 97.769 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[2]                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 2.186      ;
; 97.769 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[1]                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 2.186      ;
; 97.769 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[0]                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 2.186      ;
; 97.832 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.036     ; 2.119      ;
; 97.853 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.039     ; 2.095      ;
; 97.873 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[2]                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 2.082      ;
; 97.873 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[1]                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 2.082      ;
; 97.873 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[0]                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 2.082      ;
; 97.878 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[3]                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 2.077      ;
; 97.891 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 2.054      ;
; 97.891 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 2.054      ;
; 97.891 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][3]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 2.054      ;
; 97.891 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 2.054      ;
; 97.891 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 2.054      ;
; 97.892 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.176     ; 1.919      ;
; 97.894 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.176     ; 1.917      ;
; 97.901 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.034     ; 2.052      ;
; 97.901 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.034     ; 2.052      ;
; 97.901 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.034     ; 2.052      ;
; 97.901 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.034     ; 2.052      ;
; 97.901 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.034     ; 2.052      ;
; 97.901 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.034     ; 2.052      ;
; 97.901 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.034     ; 2.052      ;
; 97.901 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.034     ; 2.052      ;
; 97.904 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.038     ; 2.045      ;
; 97.904 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.038     ; 2.045      ;
; 97.904 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.038     ; 2.045      ;
; 97.904 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.038     ; 2.045      ;
; 97.906 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.038     ; 2.043      ;
; 97.906 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.038     ; 2.043      ;
; 97.906 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.038     ; 2.043      ;
; 97.906 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.038     ; 2.043      ;
; 97.906 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.038     ; 2.043      ;
; 97.909 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.176     ; 1.902      ;
; 97.911 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.176     ; 1.900      ;
; 97.913 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.040     ; 2.034      ;
; 97.913 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.040     ; 2.034      ;
; 97.913 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.040     ; 2.034      ;
; 97.913 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.040     ; 2.034      ;
; 97.913 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.040     ; 2.034      ;
; 97.917 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.176     ; 1.894      ;
; 97.920 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.038     ; 2.029      ;
; 97.920 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.038     ; 2.029      ;
; 97.920 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.038     ; 2.029      ;
; 97.920 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.038     ; 2.029      ;
; 97.938 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[3]                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 2.017      ;
; 97.938 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[2]                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 2.017      ;
; 97.938 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[1]                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 2.017      ;
; 97.938 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[0]                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 2.017      ;
; 97.946 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.040     ; 2.001      ;
; 97.946 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.040     ; 2.001      ;
; 97.946 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.040     ; 2.001      ;
; 97.946 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.040     ; 2.001      ;
; 97.946 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.040     ; 2.001      ;
; 97.946 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.040     ; 2.001      ;
; 97.946 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.040     ; 2.001      ;
; 97.946 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.040     ; 2.001      ;
; 97.946 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.040     ; 2.001      ;
+--------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                        ;
+-------+---------------------------------------------------------------------+---------------------------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                           ; To Node                                                             ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------------+---------------------------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 0.131 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[5]                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.868      ; 1.083      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait20                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait20                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.usb_reset_1ms_start     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.usb_reset_1ms_start     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait21                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait21                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_available                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_available                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.getreport_sendpkt1_end  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.getreport_sendpkt1_end  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait30                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait30                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.start_get_data          ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.start_get_data          ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte2         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte2         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte3         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte3         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte4         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte4         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte5         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte5         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte6         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte6         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte7         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte7         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte8         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte8         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte9         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte9         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte10        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte10        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte11        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte11        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait40                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait40                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.send_getreport_ack_end  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.send_getreport_ack_end  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_pktin3             ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_pktin3             ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait2                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait2                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt2_end ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt2_end ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.Idle                    ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.Idle                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_for_deviceconnect  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_for_deviceconnect  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.usb_reset_state         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.usb_reset_state         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter2[1]                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter2[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter2[2]                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter2[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait1                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait1                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait4                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait4                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt3_end ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt3_end ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait6                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait6                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.send_ack_end            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.send_ack_end            ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|set_command[1]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|set_command[1]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_idle            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_idle            ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt1_end ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt1_end ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[2]                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|start_sendcom                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|start_sendcom                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[0]                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[0]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[2]                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[2]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[4]                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[4]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[5]                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[5]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[7]                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[7]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_address         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_address         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|set_command[0]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|set_command[0]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_configuration   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_configuration   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|detach_ack                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|detach_ack                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_valid                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_valid                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait20                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait20                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.getreport_sendpkt1_end  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.getreport_sendpkt1_end  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait30                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait30                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte3         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte3         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte10        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte10        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid_c                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid_c                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte11        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte11        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.send_getreport_ack_end  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.send_getreport_ack_end  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt2_end ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt2_end ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait4                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait4                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt3_end ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt3_end ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.end_set_address         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.end_set_address         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.usb_reset_state         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.usb_reset_state         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|detach_ack                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|detach_ack                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait1                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait1                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt1_end ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt1_end ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait2                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait2                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|start_sendcom                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|start_sendcom                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.send_ack_end            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.send_ack_end            ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.end_set_idle            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.end_set_idle            ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_available                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_available                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_valid                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_valid                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.start_get_data          ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.start_get_data          ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte2         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte2         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte4         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte4         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte5         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte5         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte6         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte6         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte7         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte7         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte8         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte8         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte9         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte9         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait40                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait40                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_pktin2             ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_pktin2             ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|set_command[1]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|set_command[1]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.Idle                    ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.Idle                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_for_deviceconnect  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_for_deviceconnect  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter2[2]                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter2[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter2[1]                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter2[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|set_command[0]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|set_command[0]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.end_set_configuration   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.end_set_configuration   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.usb_reset_1ms_start     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.usb_reset_1ms_start     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait6                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait6                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[2]                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[0]                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[0]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[2]                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[2]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[4]                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[4]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[5]                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[5]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[6]                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[6]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[7]                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[7]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyright_temp[3]                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyright_temp[3]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_valid_temp                    ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_valid_temp                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.187 ; cntr_reset[1]                                                       ; cntr_reset[1]                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
+-------+---------------------------------------------------------------------+---------------------------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                                                       ; To Node                                                                                                                                                                                                                                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.136 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizep0_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.464      ;
; 0.139 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[3]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.466      ;
; 0.141 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[6]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.468      ;
; 0.142 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.469      ;
; 0.142 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[4]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.469      ;
; 0.144 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.471      ;
; 0.147 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.471      ;
; 0.147 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.474      ;
; 0.147 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[5]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.474      ;
; 0.148 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.471      ;
; 0.149 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.476      ;
; 0.149 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[7]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.476      ;
; 0.151 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[5]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.476      ;
; 0.152 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.477      ;
; 0.152 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[2]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.479      ;
; 0.152 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[1]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.479      ;
; 0.153 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.478      ;
; 0.154 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.478      ;
; 0.154 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.479      ;
; 0.154 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.479      ;
; 0.155 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.479      ;
; 0.155 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.480      ;
; 0.155 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.480      ;
; 0.156 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.481      ;
; 0.156 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.483      ;
; 0.157 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp2_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.481      ;
; 0.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.482      ;
; 0.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.483      ;
; 0.160 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.484      ;
; 0.160 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.485      ;
; 0.162 ; svideo:svideo|ampl_U[7]                                                                                                                                                                                         ; svideo:svideo|sin_cos:tab_inst|sin_rom:sin_inst|altsyncram:altsyncram_component|altsyncram_r842:auto_generated|ram_block1a0~porta_address_reg0                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.488      ;
; 0.162 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[5]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.486      ;
; 0.162 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.487      ;
; 0.162 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[5]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.487      ;
; 0.162 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.487      ;
; 0.163 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~portb_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.488      ;
; 0.163 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.487      ;
; 0.163 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.488      ;
; 0.164 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.487      ;
; 0.164 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.488      ;
; 0.165 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.490      ;
; 0.166 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[5]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.491      ;
; 0.167 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.492      ;
; 0.168 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~portb_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.493      ;
; 0.168 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~portb_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.493      ;
; 0.168 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.492      ;
; 0.168 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.493      ;
; 0.168 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.493      ;
; 0.169 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.492      ;
; 0.169 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.492      ;
; 0.169 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[5]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.493      ;
; 0.169 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp2_raw_reg[5]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.217      ; 0.490      ;
; 0.169 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.494      ;
; 0.169 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|cntr_pqf:cntr1|counter_reg_bit[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~portb_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.493      ;
; 0.170 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|cntr_pqf:cntr1|counter_reg_bit[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.218      ; 0.492      ;
; 0.171 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.495      ;
; 0.172 ; svideo:svideo|ampl_U[7]                                                                                                                                                                                         ; svideo:svideo|sin_cos:tab_inst|sin_rom:sin_inst|altsyncram:altsyncram_component|altsyncram_r842:auto_generated|ram_block1a3~porta_address_reg0                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.498      ;
; 0.173 ; svideo:svideo|ampl_U[2]                                                                                                                                                                                         ; svideo:svideo|sin_cos:tab_inst|sin_rom:sin_inst|altsyncram:altsyncram_component|altsyncram_r842:auto_generated|ram_block1a3~porta_address_reg0                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.499      ;
; 0.174 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|cntr_pqf:cntr1|counter_reg_bit[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~portb_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.498      ;
; 0.175 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|cntr_pqf:cntr1|counter_reg_bit[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.218      ; 0.497      ;
; 0.176 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.500      ;
; 0.176 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|cntr_4pf:cntr1|counter_reg_bit[0]    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~portb_address_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.504      ;
; 0.176 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|cntr_pqf:cntr1|counter_reg_bit[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~portb_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.500      ;
; 0.177 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~portb_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.502      ;
; 0.177 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|cntr_4pf:cntr1|counter_reg_bit[0]    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_address_reg0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.503      ;
; 0.177 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|cntr_pqf:cntr1|counter_reg_bit[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.218      ; 0.499      ;
; 0.178 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.501      ;
; 0.179 ; svideo:svideo|ampl_U[3]                                                                                                                                                                                         ; svideo:svideo|sin_cos:tab_inst|sin_rom:sin_inst|altsyncram:altsyncram_component|altsyncram_r842:auto_generated|ram_block1a0~porta_address_reg0                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.505      ;
; 0.180 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|last_line_of_instruction_reg                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|last_line_of_instruction_reg                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.043      ; 0.307      ;
; 0.180 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wsync_reg                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wsync_reg                                                                                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.043      ; 0.307      ;
; 0.186 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[1]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[1]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0]                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0]                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[0]                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[0]                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_clock_reg                                                                                                                                           ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_clock_reg                                                                                                                                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|twotone_reg                                                                                                                                                ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|twotone_reg                                                                                                                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[6]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[6]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|keyboard_overrun_reg                                                                                                                                       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|keyboard_overrun_reg                                                                                                                                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[0]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[0]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|keycode_latch_reg[0]                                                                                        ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|keycode_latch_reg[0]                                                                                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[5]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[5]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_ip_overrun_reg                                                                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_ip_overrun_reg                                                                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_ip_framing_reg                                                                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_ip_framing_reg                                                                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|antic_fetch_real_reg                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|antic_fetch_real_reg                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[1]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[1]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[2]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[2]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[17]                                                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[17]                                                                                                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|cntr_pqf:cntr1|counter_reg_bit[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~portb_address_reg0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.510      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_loadb2                                                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_loadb2                                                                                                                                                                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_load_sp2                                                                                                                                         ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_load_sp2                                                                                                                                                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|idim_r                                                                                                                                                    ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|idim_r                                                                                                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[7]                                                                                                                                                    ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[7]                                                                                                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[6]                                                                                                                                                    ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[6]                                                                                                                                                                              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_fetch                                                                                                                                            ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_fetch                                                                                                                                                                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; enable_divider:enable_179_clock_div_zpu_pokey|count_reg[1]                                                                                                                                                      ; enable_divider:enable_179_clock_div_zpu_pokey|count_reg[1]                                                                                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; enable_divider:enable_179_clock_div_zpu_pokey|count_reg[2]                                                                                                                                                      ; enable_divider:enable_179_clock_div_zpu_pokey|count_reg[2]                                                                                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; enable_divider:enable_179_clock_div_zpu_pokey|count_reg[3]                                                                                                                                                      ; enable_divider:enable_179_clock_div_zpu_pokey|count_reg[3]                                                                                                                                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[3]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[3]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[0]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[0]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[1]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[1]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[2]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[2]                                                                                                                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                                                              ;
+-------+---------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                 ; To Node                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.137 ; svideo:svideo|luma[3]     ; svideo:svideo|luma_1[3]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.084      ; 0.325      ;
; 0.137 ; svideo:svideo|luma[7]     ; svideo:svideo|luma_1[7]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.084      ; 0.325      ;
; 0.137 ; svideo:svideo|luma[8]     ; svideo:svideo|luma_1[8]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.084      ; 0.325      ;
; 0.194 ; svideo_yout_dly1[1]       ; svideo_yout_dly2[1]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.314      ;
; 0.195 ; svideo_yout_dly1[4]       ; svideo_yout_dly2[4]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.315      ;
; 0.197 ; svideo:svideo|luma_acc[7] ; svideo_yout_dly1[5]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.316      ;
; 0.262 ; svideo:svideo|luma_1[8]   ; svideo:svideo|luma_2[8]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.382      ;
; 0.262 ; svideo:svideo|luma_acc[3] ; svideo_yout_dly1[1]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.382      ;
; 0.262 ; svideo:svideo|luma_acc[9] ; svideo_yout_dly1[7]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.382      ;
; 0.262 ; svideo_yout_dly1[5]       ; svideo_yout_dly2[5]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.382      ;
; 0.264 ; svideo:svideo|luma_2[9]   ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.383      ;
; 0.266 ; svideo_yout_dly1[2]       ; svideo_yout_dly2[2]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.386      ;
; 0.267 ; svideo_yout_dly1[3]       ; svideo_yout_dly2[3]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.387      ;
; 0.267 ; svideo_yout_dly1[0]       ; svideo_yout_dly2[0]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.387      ;
; 0.269 ; svideo_yout_dly1[7]       ; svideo_yout_dly2[7]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.389      ;
; 0.271 ; svideo:svideo|luma_acc[8] ; svideo_yout_dly1[6]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.390      ;
; 0.272 ; svideo:svideo|luma_1[1]   ; svideo:svideo|luma_2[1]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.392      ;
; 0.272 ; svideo:svideo|luma_acc[6] ; svideo_yout_dly1[4]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.392      ;
; 0.273 ; svideo:svideo|luma_1[3]   ; svideo:svideo|luma_2[3]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.393      ;
; 0.273 ; svideo:svideo|luma_1[7]   ; svideo:svideo|luma_2[7]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.393      ;
; 0.273 ; svideo:svideo|luma_acc[4] ; svideo_yout_dly1[2]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.393      ;
; 0.296 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.415      ;
; 0.298 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.417      ;
; 0.300 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.419      ;
; 0.302 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.421      ;
; 0.319 ; svideo:svideo|luma[7]     ; luma_saturated[7]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.084      ; 0.507      ;
; 0.324 ; svideo:svideo|luma[3]     ; luma_saturated[3]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.084      ; 0.512      ;
; 0.335 ; svideo:svideo|luma_acc[5] ; svideo_yout_dly1[3]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.455      ;
; 0.336 ; svideo:svideo|luma_1[2]   ; svideo:svideo|luma_2[2]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.456      ;
; 0.349 ; svideo:svideo|luma_acc[2] ; svideo_yout_dly1[0]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.469      ;
; 0.352 ; svideo_yout_dly1[6]       ; svideo_yout_dly2[6]       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.472      ;
; 0.362 ; luma_saturated[8]         ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.481      ;
; 0.362 ; luma_saturated[3]         ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.481      ;
; 0.363 ; luma_saturated[4]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.482      ;
; 0.364 ; luma_saturated[9]         ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.483      ;
; 0.364 ; svideo:svideo|luma_1[5]   ; svideo:svideo|luma_2[5]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.037      ; 0.485      ;
; 0.364 ; svideo:svideo|luma_2[3]   ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.483      ;
; 0.365 ; svideo:svideo|luma_1[0]   ; svideo:svideo|luma_2[0]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.037      ; 0.486      ;
; 0.365 ; svideo:svideo|luma_1[9]   ; svideo:svideo|luma_2[9]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.037      ; 0.486      ;
; 0.366 ; svideo:svideo|luma_2[1]   ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.485      ;
; 0.371 ; svideo:svideo|luma_2[0]   ; svideo:svideo|luma_acc[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.490      ;
; 0.376 ; luma_saturated[2]         ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.495      ;
; 0.378 ; luma_saturated[6]         ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.497      ;
; 0.379 ; luma_saturated[7]         ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.498      ;
; 0.379 ; svideo:svideo|luma_2[7]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.498      ;
; 0.380 ; svideo:svideo|luma_2[5]   ; svideo:svideo|luma_acc[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.499      ;
; 0.380 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.499      ;
; 0.384 ; svideo:svideo|luma_2[8]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.503      ;
; 0.426 ; svideo:svideo|luma[8]     ; luma_saturated[8]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.084      ; 0.614      ;
; 0.429 ; svideo:svideo|luma[0]     ; luma_saturated[0]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.086      ; 0.619      ;
; 0.435 ; svideo:svideo|luma_1[4]   ; svideo:svideo|luma_2[4]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.037      ; 0.556      ;
; 0.435 ; svideo:svideo|luma_1[6]   ; svideo:svideo|luma_2[6]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.037      ; 0.556      ;
; 0.441 ; svideo:svideo|luma[5]     ; svideo:svideo|luma_1[5]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.086      ; 0.631      ;
; 0.443 ; svideo:svideo|luma[0]     ; svideo:svideo|luma_1[0]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.086      ; 0.633      ;
; 0.443 ; svideo:svideo|luma[4]     ; svideo:svideo|luma_1[4]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.086      ; 0.633      ;
; 0.444 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.563      ;
; 0.454 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.573      ;
; 0.456 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[5] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.575      ;
; 0.457 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.576      ;
; 0.458 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.577      ;
; 0.459 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.578      ;
; 0.461 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.580      ;
; 0.469 ; svideo:svideo|luma[5]     ; luma_saturated[5]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.086      ; 0.659      ;
; 0.469 ; svideo:svideo|luma[2]     ; svideo:svideo|luma_1[2]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.086      ; 0.659      ;
; 0.470 ; svideo:svideo|luma[4]     ; luma_saturated[4]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.086      ; 0.660      ;
; 0.470 ; svideo:svideo|luma[6]     ; luma_saturated[6]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.086      ; 0.660      ;
; 0.474 ; svideo:svideo|luma[0]     ; luma_saturated[1]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.086      ; 0.664      ;
; 0.478 ; svideo:svideo|luma[7]     ; luma_saturated[8]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.084      ; 0.666      ;
; 0.480 ; svideo:svideo|luma[2]     ; luma_saturated[2]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.086      ; 0.670      ;
; 0.481 ; svideo:svideo|luma[7]     ; luma_saturated[9]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.084      ; 0.669      ;
; 0.482 ; svideo:svideo|luma[3]     ; luma_saturated[4]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.084      ; 0.670      ;
; 0.485 ; svideo:svideo|luma[3]     ; luma_saturated[5]         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.084      ; 0.673      ;
; 0.495 ; svideo:svideo|luma[1]     ; svideo:svideo|luma_1[1]   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.086      ; 0.685      ;
; 0.507 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.626      ;
; 0.510 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.629      ;
; 0.510 ; luma_saturated[3]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.629      ;
; 0.513 ; luma_saturated[5]         ; cvbs1_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.632      ;
; 0.513 ; svideo:svideo|luma_2[3]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.632      ;
; 0.514 ; svideo:svideo|luma_2[1]   ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.633      ;
; 0.520 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.639      ;
; 0.521 ; luma_saturated[8]         ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.640      ;
; 0.522 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.641      ;
; 0.522 ; luma_saturated[4]         ; cvbs1_out[5]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.641      ;
; 0.523 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.642      ;
; 0.524 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.643      ;
; 0.524 ; luma_saturated[1]         ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.643      ;
; 0.524 ; svideo:svideo|luma_2[0]   ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.643      ;
; 0.525 ; luma_saturated[4]         ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.644      ;
; 0.525 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.644      ;
; 0.527 ; luma_saturated[7]         ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.646      ;
; 0.527 ; svideo:svideo|luma_2[0]   ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.646      ;
; 0.528 ; svideo:svideo|luma_2[7]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.647      ;
; 0.529 ; svideo:svideo|luma_2[5]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.648      ;
; 0.535 ; luma_saturated[2]         ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.654      ;
; 0.537 ; luma_saturated[6]         ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.656      ;
; 0.538 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.657      ;
; 0.538 ; luma_saturated[2]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.657      ;
; 0.539 ; luma_saturated[0]         ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.658      ;
; 0.540 ; luma_saturated[6]         ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.659      ;
; 0.541 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.660      ;
+-------+---------------------------+---------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                ;
+-------+-----------------------------------------------------------------------------------------------------------------+-------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                       ; To Node                                               ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------+-------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.187 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                                                                      ; sdram_ctrl:sdram_controller|r_init_tmr[10]            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[0]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_ctrl:sdram_controller|r_init_fsm[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[1]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                           ; sdram_ctrl:sdram_controller|sdram_rdy                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_ctrl:sdram_controller|r_refr_act                                                                          ; sdram_ctrl:sdram_controller|r_refr_act                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_ctrl:sdram_controller|r_wr_act                                                                            ; sdram_ctrl:sdram_controller|r_wr_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.188 ; sdram_ctrl:sdram_controller|r_bst_stp[0]                                                                        ; sdram_ctrl:sdram_controller|r_bst_stp[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                                                                        ; sdram_ctrl:sdram_controller|r_rd_bctr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sdram_ctrl:sdram_controller|r_rd_act                                                                            ; sdram_ctrl:sdram_controller|r_rd_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.194 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[0]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.214 ; sdram_ctrl:sdram_controller|r_wr_act                                                                            ; sdram_ctrl:sdram_controller|r_sdram_dq_oe             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.334      ;
; 0.222 ; seq_reg[11]                                                                                                     ; sdram_ctrl:sdram_controller|r_init_fsm[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.342      ;
; 0.265 ; seq_reg[10]                                                                                                     ; seq_reg[11]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.385      ;
; 0.272 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[21] ; ram_di_reg[5]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.084      ; 0.460      ;
; 0.276 ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                                                                        ; sdram_ctrl:sdram_controller|r_wr_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.396      ;
; 0.292 ; seq_reg[5]                                                                                                      ; seq_reg[6]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.412      ;
; 0.293 ; seq_reg[8]                                                                                                      ; seq_reg[9]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.413      ;
; 0.293 ; seq_reg[9]                                                                                                      ; seq_reg[10]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.413      ;
; 0.293 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.413      ;
; 0.294 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.414      ;
; 0.294 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.414      ;
; 0.295 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[6]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.415      ;
; 0.295 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[8]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.415      ;
; 0.296 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.416      ;
; 0.296 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.416      ;
; 0.296 ; sdram_ctrl:sdram_controller|r_init_tmr[9]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.416      ;
; 0.296 ; sdram_ctrl:sdram_controller|r_bst_stp[0]                                                                        ; sdram_ctrl:sdram_controller|r_rd_bctr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.415      ;
; 0.296 ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                                                                        ; sdram_ctrl:sdram_controller|r_rd_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.415      ;
; 0.300 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[1]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.420      ;
; 0.303 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[1]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.423      ;
; 0.304 ; seq_reg[2]                                                                                                      ; seq_reg[3]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.424      ;
; 0.310 ; seq_reg[10]                                                                                                     ; sdram_ctrl:sdram_controller|sdram_rdy                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.430      ;
; 0.333 ; sdram_ctrl:sdram_controller|r_rd_act                                                                            ; sdram_ctrl:sdram_controller|r_rd_bctr[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.452      ;
; 0.351 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[1]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.471      ;
; 0.353 ; seq_reg[1]                                                                                                      ; seq_reg[2]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.473      ;
; 0.353 ; seq_reg[3]                                                                                                      ; seq_reg[4]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.473      ;
; 0.370 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[18] ; ram_di_reg[2]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.084      ; 0.558      ;
; 0.373 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[23] ; ram_di_reg[7]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.084      ; 0.561      ;
; 0.378 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[26] ; ram_di_reg[10]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.084      ; 0.566      ;
; 0.379 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[29] ; ram_di_reg[13]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.084      ; 0.567      ;
; 0.380 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[20] ; ram_di_reg[4]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.084      ; 0.568      ;
; 0.386 ; sdram_ctrl:sdram_controller|r_psel_dly[0]                                                                       ; sdram_ctrl:sdram_controller|ap1_rd_bst_act            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.505      ;
; 0.393 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[24] ; ram_di_reg[8]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 0.582      ;
; 0.398 ; sdram_request_reg                                                                                               ; sdram_ctrl:sdram_controller|r_psel[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.518      ;
; 0.405 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[17] ; ram_di_reg[1]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 0.594      ;
; 0.409 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[25] ; ram_di_reg[9]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 0.598      ;
; 0.424 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[10] ; ram_di_reg[10]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.084      ; 0.612      ;
; 0.425 ; sdram_ctrl:sdram_controller|r_refr_act                                                                          ; sdram_ctrl:sdram_controller|r_rd_reg                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.545      ;
; 0.439 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[31] ; ram_di_reg[15]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 0.628      ;
; 0.442 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.562      ;
; 0.443 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.563      ;
; 0.444 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.564      ;
; 0.444 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.564      ;
; 0.446 ; sdram_ctrl:sdram_controller|r_refr_act                                                                          ; sdram_ctrl:sdram_controller|r_wr_reg                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.566      ;
; 0.451 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[22] ; ram_di_reg[6]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 0.640      ;
; 0.452 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[6]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.572      ;
; 0.453 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.573      ;
; 0.454 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.574      ;
; 0.454 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[8]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.574      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[30] ; ram_di_reg[14]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 0.643      ;
; 0.455 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.575      ;
; 0.455 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[2]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.575      ;
; 0.456 ; seq_reg[7]                                                                                                      ; seq_reg[8]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.576      ;
; 0.456 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.576      ;
; 0.457 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.577      ;
; 0.457 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.577      ;
; 0.458 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.578      ;
; 0.463 ; sdram_ctrl:sdram_controller|r_psel[0]                                                                           ; sdram_ctrl:sdram_controller|r_psel_dly[0]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.584      ;
; 0.475 ; seq_reg[0]                                                                                                      ; sdram_ctrl:sdram_controller|r_refr_act                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.595      ;
; 0.496 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[27] ; ram_di_reg[11]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 0.685      ;
; 0.504 ; seq_reg[1]                                                                                                      ; sdram_ctrl:sdram_controller|r_wr_act                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.626      ;
; 0.504 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[16] ; ram_di_reg[0]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 0.693      ;
; 0.505 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.625      ;
; 0.506 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[6]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.626      ;
; 0.507 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[8]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.627      ;
; 0.508 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.628      ;
; 0.509 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.629      ;
; 0.510 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.630      ;
; 0.518 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[8]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.638      ;
; 0.519 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.639      ;
; 0.519 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[21]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 0.708      ;
; 0.520 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[6]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.640      ;
; 0.520 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[29]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 0.709      ;
; 0.520 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[20]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 0.709      ;
; 0.521 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.641      ;
; 0.521 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.641      ;
; 0.521 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[28]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 0.710      ;
; 0.522 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.642      ;
; 0.522 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[24]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 0.711      ;
; 0.522 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[25]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 0.711      ;
; 0.523 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.643      ;
; 0.524 ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1                                                           ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.644      ;
; 0.524 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.644      ;
; 0.530 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[13] ; ram_di_reg[13]                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.084      ; 0.718      ;
; 0.536 ; seq_reg[5]                                                                                                      ; sdram_request_complete_reg                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.657      ;
; 0.541 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[19] ; ram_di_reg[3]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 0.734      ;
; 0.548 ; sdram_ctrl:sdram_controller|r_rddata[1]                                                                         ; ram_do_reg[1]                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.110      ; 0.742      ;
; 0.548 ; sdram_ctrl:sdram_controller|r_refr_req                                                                          ; sdram_ctrl:sdram_controller|r_wr_reg                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.045      ; 0.677      ;
; 0.550 ; sdram_ctrl:sdram_controller|r_refr_req                                                                          ; sdram_ctrl:sdram_controller|r_rd_reg                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.045      ; 0.679      ;
+-------+-----------------------------------------------------------------------------------------------------------------+-------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                                                             ; To Node                                                                                                                                                                                                               ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 0.187 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                                                         ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                                                         ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                             ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                             ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.188 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo_bypass_reg                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo_bypass_reg                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[11]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[11]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                                                             ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.307      ;
; 0.194 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.313      ;
; 0.194 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[3]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[2]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[0]                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[0]                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.314      ;
; 0.195 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[7]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.314      ;
; 0.195 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.314      ;
; 0.195 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.315      ;
; 0.195 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.315      ;
; 0.195 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.314      ;
; 0.195 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.314      ;
; 0.195 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.314      ;
; 0.195 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.314      ;
; 0.195 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.314      ;
; 0.196 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[2]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[1]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.315      ;
; 0.196 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.316      ;
; 0.196 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][3]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.316      ;
; 0.196 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.316      ;
; 0.196 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[2]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[1]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.316      ;
; 0.196 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[1]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[0]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.316      ;
; 0.197 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.317      ;
; 0.198 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[9]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[10]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.317      ;
; 0.198 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.318      ;
; 0.198 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[2]                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[2]                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.318      ;
; 0.198 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[14]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.317      ;
; 0.200 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.320      ;
; 0.200 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[2]                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[1]                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.320      ;
; 0.200 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.319      ;
; 0.201 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.321      ;
; 0.202 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.322      ;
; 0.202 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[12]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.321      ;
; 0.204 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.324      ;
; 0.204 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[7]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.323      ;
; 0.205 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.325      ;
; 0.206 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.326      ;
; 0.206 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.325      ;
; 0.206 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.326      ;
; 0.206 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.180      ; 0.490      ;
; 0.207 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.327      ;
; 0.207 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.326      ;
; 0.208 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[2]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.327      ;
; 0.208 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.328      ;
; 0.210 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.180      ; 0.494      ;
; 0.211 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.177      ; 0.492      ;
; 0.212 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.177      ; 0.493      ;
; 0.214 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.180      ; 0.498      ;
; 0.214 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.334      ;
; 0.216 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.335      ;
; 0.217 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.177      ; 0.498      ;
; 0.217 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.176      ; 0.497      ;
; 0.217 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.180      ; 0.501      ;
; 0.221 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.180      ; 0.505      ;
; 0.222 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.179      ; 0.505      ;
; 0.222 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.180      ; 0.506      ;
; 0.223 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.177      ; 0.504      ;
; 0.224 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.343      ;
; 0.227 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.179      ; 0.510      ;
; 0.227 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.179      ; 0.510      ;
; 0.229 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.176      ; 0.509      ;
; 0.231 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.180      ; 0.515      ;
; 0.231 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.180      ; 0.515      ;
; 0.232 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.176      ; 0.512      ;
; 0.233 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.179      ; 0.516      ;
; 0.235 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.179      ; 0.518      ;
; 0.236 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.179      ; 0.519      ;
; 0.236 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.176      ; 0.516      ;
; 0.238 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.179      ; 0.521      ;
; 0.240 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.179      ; 0.523      ;
; 0.241 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.177      ; 0.522      ;
; 0.243 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.176      ; 0.523      ;
; 0.245 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.176      ; 0.525      ;
; 0.254 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.373      ;
; 0.255 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[3]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[2]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.374      ;
; 0.257 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.377      ;
; 0.258 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.378      ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                       ;
+-------+---------------------------------------+----------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                             ; To Node                                                                                                                    ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------+----------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 9.087 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[14]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.091     ; 2.449      ;
; 9.089 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.104     ; 2.434      ;
; 9.094 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.097     ; 2.436      ;
; 9.097 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[5]                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.096     ; 2.434      ;
; 9.277 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[12]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; 0.084      ; 2.434      ;
; 9.278 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[9]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; 0.085      ; 2.434      ;
; 9.286 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[4]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 2.253      ;
; 9.286 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[5]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 2.253      ;
; 9.286 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|clock_reg                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 2.253      ;
; 9.286 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|clock_sync_reg                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 2.253      ;
; 9.286 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_clock_reg                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 2.253      ;
; 9.286 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_clock_last_reg                                                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 2.253      ;
; 9.286 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[0]                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 2.253      ;
; 9.286 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[2]                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 2.253      ;
; 9.286 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[1]                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 2.253      ;
; 9.286 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[3]                                                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 2.253      ;
; 9.286 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 2.253      ;
; 9.286 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|delay_line:serout_clock_delay|shift_reg[1]                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 2.253      ;
; 9.286 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_shift_reg[9]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 2.253      ;
; 9.286 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[2]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 2.253      ;
; 9.286 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[0]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 2.253      ;
; 9.286 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[1]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 2.253      ;
; 9.286 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[2]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 2.253      ;
; 9.286 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[3]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 2.253      ;
; 9.286 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[4]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 2.253      ;
; 9.286 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[5]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 2.253      ;
; 9.286 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[6]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 2.253      ;
; 9.286 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[7]                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 2.253      ;
; 9.286 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_reset_reg                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.088     ; 2.253      ;
; 9.287 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[2]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.095     ; 2.245      ;
; 9.287 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[7]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.097     ; 2.243      ;
; 9.287 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[6]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.098     ; 2.242      ;
; 9.287 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[8]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.098     ; 2.242      ;
; 9.287 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[0]                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.090     ; 2.250      ;
; 9.287 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[1]                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.090     ; 2.250      ;
; 9.287 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[5]                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.092     ; 2.248      ;
; 9.287 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[4]                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.092     ; 2.248      ;
; 9.287 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[25]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.092     ; 2.248      ;
; 9.287 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[3]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.095     ; 2.245      ;
; 9.287 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[5]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.097     ; 2.243      ;
; 9.288 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[12]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.087     ; 2.252      ;
; 9.289 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[21]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.094     ; 2.244      ;
; 9.289 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_8BIT_WRITE_ENABLE_reg                                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.092     ; 2.246      ;
; 9.289 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[0]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.092     ; 2.246      ;
; 9.289 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[1]                                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.092     ; 2.246      ;
; 9.289 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.099     ; 2.239      ;
; 9.289 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[22]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.094     ; 2.244      ;
; 9.289 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[18]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.094     ; 2.244      ;
; 9.289 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[20]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.094     ; 2.244      ;
; 9.289 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.094     ; 2.244      ;
; 9.289 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[14]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.099     ; 2.239      ;
; 9.289 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_READ_reg                                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.092     ; 2.246      ;
; 9.289 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[23]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.099     ; 2.239      ;
; 9.289 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[19]                                                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.099     ; 2.239      ;
; 9.289 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.099     ; 2.239      ;
; 9.293 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[0]                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.108     ; 2.226      ;
; 9.293 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[1]                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.106     ; 2.228      ;
; 9.295 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[0]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 2.239      ;
; 9.295 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[1]                                                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 2.239      ;
; 9.295 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[13]                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 2.239      ;
; 9.295 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[7]                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 2.239      ;
; 9.295 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[6]                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 2.239      ;
; 9.295 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[5]                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 2.239      ;
; 9.295 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[4]                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 2.239      ;
; 9.295 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[3]                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 2.239      ;
; 9.295 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[2]                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 2.239      ;
; 9.295 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[1]                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 2.239      ;
; 9.295 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[0]                          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 2.239      ;
; 9.295 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[16]                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 2.239      ;
; 9.295 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[15]                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 2.239      ;
; 9.295 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[14]                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 2.239      ;
; 9.295 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[0]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 2.239      ;
; 9.295 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[1]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 2.239      ;
; 9.295 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[2]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 2.239      ;
; 9.295 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[3]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 2.239      ;
; 9.295 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[4]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 2.239      ;
; 9.295 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[5]          ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 2.239      ;
; 9.295 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 2.239      ;
; 9.295 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 2.239      ;
; 9.295 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|key_held_reg           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.093     ; 2.239      ;
; 9.295 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[2]                                                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.102     ; 2.230      ;
; 9.299 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[21]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.083     ; 2.245      ;
; 9.299 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[21]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.083     ; 2.245      ;
; 9.299 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[28]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.083     ; 2.245      ;
; 9.299 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[28]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.083     ; 2.245      ;
; 9.299 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[12]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.083     ; 2.245      ;
; 9.299 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[12]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.083     ; 2.245      ;
; 9.299 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[12]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.083     ; 2.245      ;
; 9.299 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[0]                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.082     ; 2.246      ;
; 9.299 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[1]                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.082     ; 2.246      ;
; 9.299 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[2]                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.082     ; 2.246      ;
; 9.299 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[3]                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.082     ; 2.246      ;
; 9.299 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[4]                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.082     ; 2.246      ;
; 9.299 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[5]                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.082     ; 2.246      ;
; 9.299 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[6]                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.082     ; 2.246      ;
; 9.299 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[7]                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.082     ; 2.246      ;
; 9.299 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[2] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.082     ; 2.246      ;
; 9.299 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.082     ; 2.246      ;
; 9.299 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[11]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.083     ; 2.245      ;
; 9.299 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[11]                                                                       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.640       ; -0.083     ; 2.245      ;
+-------+---------------------------------------+----------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                       ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node              ; To Node                                                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 9.444 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[7]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.147     ; 1.986      ;
; 9.475 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[7]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.110     ; 1.994      ;
; 9.475 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[8]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.110     ; 1.994      ;
; 9.476 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[4]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.107     ; 1.996      ;
; 9.476 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[5]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.107     ; 1.996      ;
; 9.476 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[6]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.109     ; 1.994      ;
; 9.476 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[9]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.108     ; 1.995      ;
; 9.476 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[11]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.108     ; 1.995      ;
; 9.479 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[8]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.124     ; 1.977      ;
; 9.480 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[9]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.130     ; 1.970      ;
; 9.481 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[8]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.178     ; 1.919      ;
; 9.482 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[9]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.184     ; 1.912      ;
; 9.482 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[13]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.125     ; 1.973      ;
; 9.482 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[14]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.125     ; 1.973      ;
; 9.482 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[15]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.125     ; 1.973      ;
; 9.484 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[13]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.179     ; 1.915      ;
; 9.484 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[14]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.179     ; 1.915      ;
; 9.484 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[15]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.179     ; 1.915      ;
; 9.484 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[10]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.126     ; 1.970      ;
; 9.484 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[11]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.126     ; 1.970      ;
; 9.484 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[12]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.126     ; 1.970      ;
; 9.486 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[12]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.180     ; 1.912      ;
; 9.486 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[11]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.180     ; 1.912      ;
; 9.486 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[10]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.180     ; 1.912      ;
; 9.489 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ba[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.103     ; 1.987      ;
; 9.489 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ba[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.103     ; 1.987      ;
; 9.489 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[0]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.103     ; 1.987      ;
; 9.489 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[1]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.103     ; 1.987      ;
; 9.489 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[4]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.128     ; 1.963      ;
; 9.489 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[7]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.101     ; 1.989      ;
; 9.489 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.103     ; 1.987      ;
; 9.490 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[2]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.989      ;
; 9.490 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[3]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.100     ; 1.989      ;
; 9.491 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[4]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.182     ; 1.905      ;
; 9.491 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[0]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.110     ; 1.979      ;
; 9.491 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[1]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.110     ; 1.979      ;
; 9.491 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[2]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.110     ; 1.979      ;
; 9.492 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[5]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.120     ; 1.968      ;
; 9.492 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[6]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.119     ; 1.969      ;
; 9.493 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[2]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.164     ; 1.921      ;
; 9.493 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[1]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.164     ; 1.921      ;
; 9.493 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[0]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.164     ; 1.921      ;
; 9.493 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[3]               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.119     ; 1.968      ;
; 9.494 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[5]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.174     ; 1.910      ;
; 9.494 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[6]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.173     ; 1.911      ;
; 9.495 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[3]                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.173     ; 1.910      ;
; 9.586 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.107     ; 1.886      ;
; 9.599 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_we_n                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.101     ; 1.879      ;
; 9.599 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.101     ; 1.879      ;
; 9.600 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ras_n                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.101     ; 1.878      ;
; 9.600 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cas_n                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.101     ; 1.878      ;
; 9.600 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.101     ; 1.878      ;
; 9.713 ; sdram_reset_ctrl_n_reg ; seq_reg[1]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.093     ; 1.821      ;
; 9.713 ; sdram_reset_ctrl_n_reg ; seq_reg[2]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.093     ; 1.821      ;
; 9.713 ; sdram_reset_ctrl_n_reg ; seq_reg[3]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.093     ; 1.821      ;
; 9.713 ; sdram_reset_ctrl_n_reg ; seq_reg[4]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.093     ; 1.821      ;
; 9.713 ; sdram_reset_ctrl_n_reg ; seq_reg[5]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.093     ; 1.821      ;
; 9.713 ; sdram_reset_ctrl_n_reg ; seq_reg[6]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.093     ; 1.821      ;
; 9.713 ; sdram_reset_ctrl_n_reg ; seq_reg[7]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.093     ; 1.821      ;
; 9.713 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.087     ; 1.827      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; seq_reg[8]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.093     ; 1.820      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; seq_reg[9]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.093     ; 1.820      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; seq_reg[10]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.093     ; 1.820      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; seq_reg[11]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.093     ; 1.820      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.093     ; 1.820      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.093     ; 1.820      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; ram_do_reg[29]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; ram_do_reg[30]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; ram_do_reg[28]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; ram_do_reg[24]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; ram_do_reg[21]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; ram_do_reg[19]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; ram_do_reg[27]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; ram_do_reg[6]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; ram_do_reg[2]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; ram_do_reg[4]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; ram_do_reg[1]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; ram_do_reg[5]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; ram_do_reg[7]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; ram_do_reg[0]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; ram_do_reg[12]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; ram_do_reg[8]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; ram_do_reg[13]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; ram_do_reg[3]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; ram_do_reg[14]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; ram_do_reg[26]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; ram_do_reg[20]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; ram_do_reg[31]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
; 9.714 ; sdram_reset_ctrl_n_reg ; ram_do_reg[18]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.640       ; -0.090     ; 1.823      ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                            ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                        ; To Node                                                                                                                                                                        ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 49.446 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[8] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.437      ; 0.978      ;
; 98.695 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 1.259      ;
; 98.695 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 1.259      ;
; 98.695 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 1.259      ;
; 98.695 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 1.259      ;
; 98.791 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 1.163      ;
; 98.791 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 1.163      ;
; 98.791 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 1.163      ;
; 98.791 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 1.163      ;
; 98.820 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.036     ; 1.131      ;
; 98.820 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 1.132      ;
; 98.820 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 1.132      ;
; 98.820 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 1.132      ;
; 98.820 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 1.132      ;
; 98.820 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[2]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.036     ; 1.131      ;
; 98.820 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.036     ; 1.131      ;
; 98.820 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 1.132      ;
; 98.820 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 1.132      ;
; 98.820 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 1.132      ;
; 98.820 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 1.132      ;
; 98.820 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.036     ; 1.131      ;
; 98.820 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 1.132      ;
; 98.820 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 1.132      ;
; 98.824 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.036     ; 1.127      ;
; 98.824 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.036     ; 1.127      ;
; 98.824 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.036     ; 1.127      ;
; 98.824 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.036     ; 1.127      ;
; 98.826 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.038     ; 1.123      ;
; 98.826 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.038     ; 1.123      ;
; 98.839 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.031     ; 1.117      ;
; 98.839 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.031     ; 1.117      ;
; 98.839 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.031     ; 1.117      ;
; 98.839 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.031     ; 1.117      ;
; 98.839 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.031     ; 1.117      ;
; 98.839 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.031     ; 1.117      ;
; 98.839 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.031     ; 1.117      ;
; 98.839 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.031     ; 1.117      ;
; 98.839 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.031     ; 1.117      ;
; 98.855 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.038     ; 1.094      ;
; 98.855 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.038     ; 1.094      ;
; 98.855 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.038     ; 1.094      ;
; 98.855 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.038     ; 1.094      ;
; 98.855 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.038     ; 1.094      ;
; 98.855 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.038     ; 1.094      ;
; 98.855 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.038     ; 1.094      ;
; 98.855 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.038     ; 1.094      ;
; 98.855 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.038     ; 1.094      ;
; 98.855 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.038     ; 1.094      ;
; 98.866 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.031     ; 1.090      ;
; 98.927 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.034     ; 1.026      ;
; 98.927 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.034     ; 1.026      ;
; 98.927 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.034     ; 1.026      ;
; 98.927 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.034     ; 1.026      ;
; 98.927 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.034     ; 1.026      ;
; 98.927 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.034     ; 1.026      ;
; 98.927 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.034     ; 1.026      ;
; 98.927 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.034     ; 1.026      ;
; 98.927 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.034     ; 1.026      ;
; 98.927 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.034     ; 1.026      ;
; 98.927 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.034     ; 1.026      ;
; 98.927 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.038     ; 1.022      ;
; 98.927 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.034     ; 1.026      ;
; 98.975 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 0.977      ;
; 98.975 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 0.977      ;
; 98.975 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 0.977      ;
; 98.991 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 0.964      ;
; 98.991 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 0.964      ;
; 98.991 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 0.964      ;
; 99.025 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.034     ; 0.928      ;
; 99.025 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.034     ; 0.928      ;
; 99.026 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 0.928      ;
; 99.027 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.036     ; 0.924      ;
; 99.027 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.036     ; 0.924      ;
; 99.027 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.036     ; 0.924      ;
; 99.027 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.036     ; 0.924      ;
; 99.033 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 0.921      ;
; 99.033 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 0.921      ;
; 99.033 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 0.921      ;
; 99.033 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[3]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 0.921      ;
; 99.033 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 0.921      ;
; 99.065 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.036     ; 0.886      ;
; 99.065 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.036     ; 0.886      ;
; 99.065 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.036     ; 0.886      ;
; 99.065 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.036     ; 0.886      ;
; 99.065 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.036     ; 0.886      ;
; 99.065 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.036     ; 0.886      ;
; 99.065 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.036     ; 0.886      ;
; 99.065 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.036     ; 0.886      ;
; 99.065 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.036     ; 0.886      ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                              ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node    ; To Node                                             ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 64.805 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.036     ; 1.802      ;
; 64.805 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.036     ; 1.802      ;
; 65.008 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.037     ; 1.598      ;
; 65.008 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.037     ; 1.598      ;
; 65.008 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.037     ; 1.598      ;
; 65.008 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.038     ; 1.597      ;
; 65.008 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.038     ; 1.597      ;
; 65.008 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.038     ; 1.597      ;
; 65.008 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.038     ; 1.597      ;
; 65.008 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.038     ; 1.597      ;
; 65.008 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.038     ; 1.597      ;
; 65.008 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.038     ; 1.597      ;
; 65.008 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.038     ; 1.597      ;
; 65.008 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.038     ; 1.597      ;
; 65.008 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.037     ; 1.598      ;
; 65.008 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.037     ; 1.598      ;
; 65.008 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.037     ; 1.598      ;
; 65.008 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.037     ; 1.598      ;
; 65.008 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.038     ; 1.597      ;
; 65.008 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.038     ; 1.597      ;
; 65.009 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.036     ; 1.598      ;
; 65.009 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.036     ; 1.598      ;
; 65.009 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.036     ; 1.598      ;
; 65.009 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.038     ; 1.596      ;
; 65.009 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.038     ; 1.596      ;
; 65.009 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.038     ; 1.596      ;
; 65.009 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.038     ; 1.596      ;
; 65.009 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.038     ; 1.596      ;
; 65.009 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.038     ; 1.596      ;
; 65.009 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.038     ; 1.596      ;
; 65.009 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.037     ; 1.597      ;
; 65.957 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.129      ; 1.815      ;
; 65.957 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.129      ; 1.815      ;
; 66.169 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.127      ; 1.601      ;
; 66.169 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.127      ; 1.601      ;
; 66.169 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.127      ; 1.601      ;
; 66.169 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.127      ; 1.601      ;
; 66.169 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.128      ; 1.602      ;
; 66.169 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.128      ; 1.602      ;
; 66.169 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.128      ; 1.602      ;
; 66.169 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.128      ; 1.602      ;
; 66.169 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.128      ; 1.602      ;
; 66.169 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.128      ; 1.602      ;
; 66.169 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.127      ; 1.601      ;
; 66.169 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.127      ; 1.601      ;
; 66.169 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.127      ; 1.601      ;
; 66.169 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.127      ; 1.601      ;
; 66.169 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.128      ; 1.602      ;
; 66.169 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.128      ; 1.602      ;
; 66.169 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.127      ; 1.601      ;
; 66.169 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.127      ; 1.601      ;
; 66.169 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.127      ; 1.601      ;
; 66.169 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.127      ; 1.601      ;
; 66.169 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.128      ; 1.602      ;
; 66.170 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.128      ; 1.601      ;
; 66.170 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.128      ; 1.601      ;
; 66.170 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.128      ; 1.601      ;
; 66.170 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.128      ; 1.601      ;
; 66.170 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.129      ; 1.602      ;
; 66.170 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.129      ; 1.602      ;
; 66.170 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.129      ; 1.602      ;
; 66.170 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.129      ; 1.602      ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                              ;
+-------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node    ; To Node                                             ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+-------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 0.120 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.452      ;
; 0.120 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.452      ;
; 0.120 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.452      ;
; 0.121 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.453      ;
; 0.121 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.453      ;
; 0.121 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.453      ;
; 0.121 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.453      ;
; 0.121 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.249      ; 1.454      ;
; 0.121 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.249      ; 1.454      ;
; 0.121 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.249      ; 1.454      ;
; 0.121 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.249      ; 1.454      ;
; 0.121 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.453      ;
; 0.121 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.453      ;
; 0.121 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.453      ;
; 0.121 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.453      ;
; 0.121 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.453      ;
; 0.121 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.453      ;
; 0.121 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.453      ;
; 0.121 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.453      ;
; 0.121 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.453      ;
; 0.121 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.249      ; 1.454      ;
; 0.122 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.454      ;
; 0.122 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.454      ;
; 0.122 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.454      ;
; 0.122 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.454      ;
; 0.122 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.454      ;
; 0.122 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.454      ;
; 0.122 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.454      ;
; 0.122 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.454      ;
; 0.306 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.249      ; 1.639      ;
; 0.306 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.249      ; 1.639      ;
; 1.331 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 1.450      ;
; 1.331 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 1.450      ;
; 1.331 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 1.450      ;
; 1.331 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 1.450      ;
; 1.331 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 1.450      ;
; 1.331 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 1.450      ;
; 1.331 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.033      ; 1.448      ;
; 1.331 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.033      ; 1.448      ;
; 1.331 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.034      ; 1.449      ;
; 1.331 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.034      ; 1.449      ;
; 1.331 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.033      ; 1.448      ;
; 1.331 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.033      ; 1.448      ;
; 1.331 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.033      ; 1.448      ;
; 1.331 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.033      ; 1.448      ;
; 1.331 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.033      ; 1.448      ;
; 1.331 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.033      ; 1.448      ;
; 1.331 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.033      ; 1.448      ;
; 1.331 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.033      ; 1.448      ;
; 1.331 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.034      ; 1.449      ;
; 1.331 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.034      ; 1.449      ;
; 1.331 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.034      ; 1.449      ;
; 1.331 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.034      ; 1.449      ;
; 1.331 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.034      ; 1.449      ;
; 1.331 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 1.450      ;
; 1.331 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 1.450      ;
; 1.331 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 1.450      ;
; 1.331 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 1.450      ;
; 1.331 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.034      ; 1.449      ;
; 1.331 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.034      ; 1.449      ;
; 1.509 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 1.628      ;
; 1.509 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 1.628      ;
+-------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                             ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                        ; To Node                                                                                                                                                                        ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 0.671  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.790      ;
; 0.671  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.790      ;
; 0.671  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.790      ;
; 0.671  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.790      ;
; 0.671  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.790      ;
; 0.671  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.790      ;
; 0.671  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.790      ;
; 0.671  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.790      ;
; 0.671  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.790      ;
; 0.690  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.811      ;
; 0.690  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.811      ;
; 0.690  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.811      ;
; 0.690  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[3]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.811      ;
; 0.690  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.811      ;
; 0.693  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.038      ; 0.815      ;
; 0.698  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.819      ;
; 0.698  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.819      ;
; 0.707  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.826      ;
; 0.707  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.826      ;
; 0.707  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.826      ;
; 0.707  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.826      ;
; 0.719  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.039      ; 0.842      ;
; 0.719  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.039      ; 0.842      ;
; 0.719  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.039      ; 0.842      ;
; 0.734  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.855      ;
; 0.734  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.855      ;
; 0.734  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.855      ;
; 0.749  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.870      ;
; 0.749  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.870      ;
; 0.749  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.870      ;
; 0.749  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.870      ;
; 0.749  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.870      ;
; 0.749  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.870      ;
; 0.749  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.870      ;
; 0.749  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.870      ;
; 0.749  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.870      ;
; 0.749  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.870      ;
; 0.749  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.870      ;
; 0.749  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.037      ; 0.870      ;
; 0.754  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.034      ; 0.872      ;
; 0.832  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.039      ; 0.955      ;
; 0.846  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.033      ; 0.963      ;
; 0.846  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.033      ; 0.963      ;
; 0.846  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.033      ; 0.963      ;
; 0.846  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.033      ; 0.963      ;
; 0.846  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.033      ; 0.963      ;
; 0.846  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.033      ; 0.963      ;
; 0.846  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.033      ; 0.963      ;
; 0.846  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.033      ; 0.963      ;
; 0.846  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.033      ; 0.963      ;
; 0.846  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.033      ; 0.963      ;
; 0.860  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.040      ; 0.984      ;
; 0.860  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.040      ; 0.984      ;
; 0.860  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.040      ; 0.984      ;
; 0.860  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.040      ; 0.984      ;
; 0.860  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.040      ; 0.984      ;
; 0.860  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.040      ; 0.984      ;
; 0.860  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.040      ; 0.984      ;
; 0.860  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.040      ; 0.984      ;
; 0.860  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.040      ; 0.984      ;
; 0.863  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.982      ;
; 0.863  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.982      ;
; 0.863  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.982      ;
; 0.863  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.982      ;
; 0.863  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.982      ;
; 0.863  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.982      ;
; 0.863  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.982      ;
; 0.863  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.982      ;
; 0.863  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.982      ;
; 0.863  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.982      ;
; 0.865  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.984      ;
; 0.865  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[2]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.984      ;
; 0.865  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.984      ;
; 0.865  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.984      ;
; 0.867  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.032      ; 0.983      ;
; 0.867  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.032      ; 0.983      ;
; 0.880  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.999      ;
; 0.880  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.999      ;
; 0.880  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.999      ;
; 0.880  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.999      ;
; 0.909  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.038      ; 1.031      ;
; 0.909  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.038      ; 1.031      ;
; 0.909  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.038      ; 1.031      ;
; 0.909  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.038      ; 1.031      ;
; 0.947  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.038      ; 1.069      ;
; 0.947  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.038      ; 1.069      ;
; 0.947  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.038      ; 1.069      ;
; 0.947  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.038      ; 1.069      ;
; 50.231 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[8] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; -50.000      ; 0.514      ; 0.849      ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                           ; To Node                                                                                                                                                                                                                ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 0.683 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a5 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 0.975      ;
; 0.683 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a4 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 0.975      ;
; 0.683 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a3 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 0.975      ;
; 0.683 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a2 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 0.975      ;
; 0.683 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 0.975      ;
; 0.683 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 0.975      ;
; 0.691 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a6 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.982      ;
; 0.691 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a5 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.982      ;
; 0.691 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a4 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.982      ;
; 0.691 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a3 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.982      ;
; 0.691 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a2 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.982      ;
; 0.691 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.982      ;
; 0.691 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.982      ;
; 0.706 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a55  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.997      ;
; 0.706 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a54  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.997      ;
; 0.706 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a53  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.997      ;
; 0.706 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a52  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.997      ;
; 0.706 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a51  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.997      ;
; 0.706 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a50  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.997      ;
; 0.706 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a49  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.997      ;
; 0.706 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a48  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.997      ;
; 0.706 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a39  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.997      ;
; 0.706 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a38  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.997      ;
; 0.706 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a37  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.997      ;
; 0.706 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a36  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.997      ;
; 0.706 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a35  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.997      ;
; 0.706 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a34  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.997      ;
; 0.706 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a33  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.997      ;
; 0.706 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a32  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.997      ;
; 0.706 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a19  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.997      ;
; 0.706 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a18  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.997      ;
; 0.706 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a17  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.997      ;
; 0.706 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a16  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.997      ;
; 0.706 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a7   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.997      ;
; 0.706 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a6   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.997      ;
; 0.706 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a5   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.997      ;
; 0.706 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a4   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.997      ;
; 0.706 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a3   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.997      ;
; 0.706 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a2   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.997      ;
; 0.706 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a1   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.997      ;
; 0.706 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 0.997      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a63  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a62  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a61  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a60  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a59  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a58  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a57  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a56  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a47  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a46  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a45  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a44  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a43  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a42  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a41  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a40  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a31  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a30  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a29  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a28  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a27  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a26  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a25  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a24  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a23  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a22  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a21  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a20  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a15  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a14  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a13  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a12  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a11  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a10  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a9   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.124      ;
; 0.858 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a15   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.211      ; 1.159      ;
; 0.858 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a14   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.211      ; 1.159      ;
; 0.858 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a13   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.211      ; 1.159      ;
; 0.858 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a12   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.211      ; 1.159      ;
; 0.858 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a11   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.211      ; 1.159      ;
; 0.858 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a10   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.211      ; 1.159      ;
; 0.858 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a9    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.211      ; 1.159      ;
; 0.858 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a8    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.211      ; 1.159      ;
; 0.858 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a7    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.211      ; 1.159      ;
; 0.858 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a6    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.211      ; 1.159      ;
; 0.858 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a5    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.211      ; 1.159      ;
; 0.858 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a4    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.211      ; 1.159      ;
; 0.858 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a3    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.211      ; 1.159      ;
; 0.858 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a2    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.211      ; 1.159      ;
; 0.858 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a1    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.211      ; 1.159      ;
; 0.858 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.211      ; 1.159      ;
; 1.651 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[3]                                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.313      ; 2.068      ;
; 1.670 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[7]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.288      ; 2.062      ;
; 1.670 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[5]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.288      ; 2.062      ;
; 1.675 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[25]                                                                                                                                                                   ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.298      ; 2.077      ;
; 1.676 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[5]                                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.298      ; 2.078      ;
; 1.676 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[4]                                                                                                                                                                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.298      ; 2.078      ;
; 1.688 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[0]                                                                                                                                                                        ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.288      ; 2.080      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                        ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node              ; To Node                                                   ; Launch Clock                                                                   ; Latch Clock                                                                    ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+
; 1.453 ; sdram_reset_ctrl_n_reg ; seq_reg[0]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.088      ; 1.645      ;
; 1.453 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_act                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.088      ; 1.645      ;
; 1.453 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_reg                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.088      ; 1.645      ;
; 1.453 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_reg                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.088      ; 1.645      ;
; 1.453 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.088      ; 1.645      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.088      ; 1.646      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.088      ; 1.646      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[29]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[30]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[28]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[24]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[21]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[19]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[27]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[6]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[2]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[4]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[1]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[5]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[7]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[0]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[12]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[8]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[13]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[3]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[14]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[26]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[20]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[31]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[18]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[17]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[15]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[9]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[10]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[16]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[11]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[25]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[22]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_do_reg[23]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.650      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_req                    ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.078      ; 1.636      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.078      ; 1.636      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.078      ; 1.636      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.078      ; 1.636      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_di_reg[4]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.078      ; 1.636      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_di_reg[7]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.078      ; 1.636      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; ram_di_reg[12]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.078      ; 1.636      ;
; 1.454 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.096      ; 1.654      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; seq_reg[1]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 1.648      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; seq_reg[2]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 1.648      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; seq_reg[3]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 1.648      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; seq_reg[4]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 1.648      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; seq_reg[5]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 1.648      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; seq_reg[6]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 1.648      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; seq_reg[7]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 1.648      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; seq_reg[8]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 1.648      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; seq_reg[9]                                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 1.648      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; seq_reg[10]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 1.648      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; seq_reg[11]                                               ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 1.648      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.651      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.651      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.651      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.651      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.651      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.651      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.651      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.651      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.651      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.651      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.651      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 1.648      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 1.648      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_act                      ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.091      ; 1.650      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.091      ; 1.650      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.091      ; 1.650      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.090      ; 1.649      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; sdram_request_complete_reg                                ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.090      ; 1.649      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; sdram_request_reg                                         ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.090      ; 1.649      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_psel[0]                     ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.090      ; 1.649      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; ram_di_reg[0]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.639      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; ram_di_reg[1]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.639      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; ram_di_reg[2]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.075      ; 1.634      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; ram_di_reg[3]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.639      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; ram_di_reg[5]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.075      ; 1.634      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; ram_di_reg[6]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.639      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; ram_di_reg[8]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.639      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; ram_di_reg[9]                                             ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.639      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; ram_di_reg[10]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.075      ; 1.634      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; ram_di_reg[11]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.639      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; ram_di_reg[13]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.075      ; 1.634      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; ram_di_reg[14]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.639      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; ram_di_reg[15]                                            ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.639      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_oe                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.091      ; 1.650      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[1]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.091      ; 1.650      ;
; 1.455 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[0]                                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.091      ; 1.650      ;
; 1.572 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ras_n                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 1.717      ;
; 1.572 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cas_n                 ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 1.717      ;
; 1.572 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_we_n                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 1.717      ;
; 1.572 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[0]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 1.717      ;
; 1.572 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n                  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 1.717      ;
; 1.584 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[1]              ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.723      ;
+-------+------------------------+-----------------------------------------------------------+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                         ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+---------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                                                          ; Clock Edge ; Target                    ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+---------------------------+
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[2]              ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[3]              ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[4]              ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[5]              ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[6]              ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[7]              ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[8]              ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[9]              ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[0]         ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[1]         ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[2]         ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[3]         ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[4]         ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[5]         ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[6]         ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[7]         ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[8]         ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[9]         ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[0]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[1]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[2]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[3]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[4]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[5]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[6]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[7]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[8]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[9]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[0]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[1]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[2]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[3]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[4]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[5]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[6]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[7]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[8]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[9]   ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[0] ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[1] ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[2] ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[3] ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[4] ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[5] ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[6] ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[7] ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[8] ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[9] ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[0]       ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[1]       ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[2]       ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[3]       ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[4]       ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[5]       ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[6]       ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[7]       ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[0]       ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[1]       ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[2]       ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[3]       ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[4]       ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[5]       ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[6]       ;
; 4.152 ; 4.368        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[7]       ;
; 4.175 ; 4.359        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[1]   ;
; 4.175 ; 4.359        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[2]   ;
; 4.175 ; 4.359        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[3]   ;
; 4.175 ; 4.359        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[7]   ;
; 4.175 ; 4.359        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[8]   ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[2]              ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[3]              ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[4]              ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[5]              ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[6]              ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[7]              ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[8]              ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[9]              ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[0]         ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[1]         ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[2]         ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[3]         ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[4]         ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[5]         ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[6]         ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[7]         ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[8]         ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[9]         ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[0]   ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[4]   ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[5]   ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[6]   ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[9]   ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[0]   ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[1]   ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[2]   ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[3]   ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[4]   ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[5]   ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[6]   ;
; 4.176 ; 4.360        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[7]   ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+---------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                         ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-----------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                                                          ; Clock Edge ; Target                                                    ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-----------------------------------------------------------+
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[0]                                             ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[10]                                            ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[11]                                            ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[12]                                            ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[13]                                            ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[14]                                            ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[15]                                            ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[1]                                             ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[2]                                             ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[3]                                             ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[4]                                             ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[5]                                             ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[6]                                             ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[7]                                             ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[8]                                             ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[9]                                             ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_act                      ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_reg                      ;
; 5.606 ; 5.761        ; 0.155          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[0]                   ;
; 5.606 ; 5.761        ; 0.155          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[1]                   ;
; 5.606 ; 5.761        ; 0.155          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[2]                   ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_refr_act                    ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_refr_req                    ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1     ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_reg                      ;
; 5.606 ; 5.822        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[0]                                                ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ;
; 5.607 ; 5.823        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ;
; 5.607 ; 5.762        ; 0.155          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[13]                  ;
; 5.607 ; 5.762        ; 0.155          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[14]                  ;
; 5.607 ; 5.762        ; 0.155          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[15]                  ;
; 5.608 ; 5.763        ; 0.155          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[10]                  ;
; 5.608 ; 5.763        ; 0.155          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[11]                  ;
; 5.608 ; 5.763        ; 0.155          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[12]                  ;
; 5.608 ; 5.763        ; 0.155          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[3]                   ;
; 5.608 ; 5.763        ; 0.155          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[4]                   ;
; 5.608 ; 5.763        ; 0.155          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[5]                   ;
; 5.608 ; 5.763        ; 0.155          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[6]                   ;
; 5.608 ; 5.763        ; 0.155          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[8]                   ;
; 5.608 ; 5.763        ; 0.155          ; Low Pulse Width  ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[9]                   ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_bena_reg[0]                                           ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_bena_reg[1]                                           ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[0]                                             ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[10]                                            ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[11]                                            ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[12]                                            ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[13]                                            ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[14]                                            ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[15]                                            ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[16]                                            ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[17]                                            ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[18]                                            ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[19]                                            ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[1]                                             ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[20]                                            ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[21]                                            ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[22]                                            ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[23]                                            ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[24]                                            ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[25]                                            ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[26]                                            ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[27]                                            ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[28]                                            ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[29]                                            ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[2]                                             ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[30]                                            ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[31]                                            ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[3]                                             ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[4]                                             ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[5]                                             ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[6]                                             ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[7]                                             ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[8]                                             ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[9]                                             ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_psel[0]                     ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_dq_oe                 ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_act                      ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|sdram_rdy                     ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_request_complete_reg                                ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_request_reg                                         ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[10]                                               ;
; 5.609 ; 5.825        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[11]                                               ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------------------+------------+-----------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                          ;
+--------+--------------+----------------+-----------------+--------------------------------------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type            ; Clock                                                                          ; Clock Edge ; Target                                                                                                                                                                                                                                     ;
+--------+--------------+----------------+-----------------+--------------------------------------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 17.205 ; 17.435       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_address_reg0  ;
; 17.205 ; 17.435       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a18~porta_address_reg0                                                                                                                                      ;
; 17.205 ; 17.435       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a3~porta_address_reg0                                                                                                                                       ;
; 17.205 ; 17.435       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a7~porta_address_reg0                                                                                                                                       ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0                     ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~portb_address_reg0  ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a1                     ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a2                     ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a3                     ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a4                     ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a5                     ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a6                     ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_address_reg0    ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|sin_cos:tab_inst|sin_rom:sin_inst|altsyncram:altsyncram_component|altsyncram_r842:auto_generated|ram_block1a0~porta_address_reg0                                                                                             ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|sin_cos:tab_inst|sin_rom:sin_inst|altsyncram:altsyncram_component|altsyncram_r842:auto_generated|ram_block1a3~porta_address_reg0                                                                                             ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a0~porta_address_reg0                                                                                                                                       ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a11~porta_address_reg0                                                                                                                                      ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a14~porta_address_reg0                                                                                                                                      ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a16~porta_address_reg0                                                                                                                                      ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a20~porta_address_reg0                                                                                                                                      ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a21~porta_address_reg0                                                                                                                                      ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a22~porta_address_reg0                                                                                                                                      ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a2~porta_address_reg0                                                                                                                                       ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a4~porta_address_reg0                                                                                                                                       ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a5~porta_address_reg0                                                                                                                                       ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram23_16|altsyncram:ram_block_rtl_0|altsyncram_ig41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                           ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram23_16|altsyncram:ram_block_rtl_0|altsyncram_ig41:auto_generated|ram_block1a0~porta_we_reg                                                                                                                 ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_ig41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                          ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_ig41:auto_generated|ram_block1a0~porta_we_reg                                                                                                                ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_7_0|altsyncram:ram_block_rtl_0|altsyncram_ig41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                            ;
; 17.206 ; 17.436       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_7_0|altsyncram:ram_block_rtl_0|altsyncram_ig41:auto_generated|ram_block1a0~porta_we_reg                                                                                                                  ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|generic_ram_infer:freezer_bram|altsyncram:ram_block_rtl_0|altsyncram_sd41:auto_generated|ram_block1a0~porta_address_reg0 ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|generic_ram_infer:freezer_bram|altsyncram:ram_block_rtl_0|altsyncram_sd41:auto_generated|ram_block1a0~porta_we_reg       ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0   ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_address_reg0  ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0                       ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~portb_address_reg0    ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a1                       ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a16                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a17                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a18                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a19                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a2                       ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a3                       ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a32                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a33                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a34                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a35                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a36                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a37                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a38                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a39                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a4                       ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a48                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a49                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a5                       ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a50                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a51                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a52                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a53                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a54                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a55                      ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a6                       ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a7                       ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_address_reg0    ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_address_reg0     ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|sin_cos:tab_inst|sin_rom:sin_inst|altsyncram:altsyncram_component|altsyncram_r842:auto_generated|ram_block1a0~portb_address_reg0                                                                                             ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|sin_cos:tab_inst|sin_rom:sin_inst|altsyncram:altsyncram_component|altsyncram_r842:auto_generated|ram_block1a3~portb_address_reg0                                                                                             ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a1~porta_address_reg0                                                                                                                                       ;
; 17.207 ; 17.437       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a6~porta_address_reg0                                                                                                                                       ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0                     ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~portb_address_reg0  ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a1                     ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a2                     ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a3                     ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a4                     ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a5                     ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0     ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a10                      ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a11                      ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a12                      ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a13                      ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a14                      ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a15                      ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a20                      ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a21                      ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a22                      ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a23                      ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a24                      ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a25                      ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a26                      ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a27                      ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a28                      ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a29                      ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a30                      ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a31                      ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a40                      ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a41                      ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a42                      ;
; 17.208 ; 17.438       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a43                      ;
+--------+--------------+----------------+-----------------+--------------------------------------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                         ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                ; Clock Edge ; Target                                                                                   ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+------------------------------------------------------------------------------------------+
; 17.437 ; 17.437       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]           ;
; 17.437 ; 17.437       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]           ;
; 17.437 ; 17.437       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]           ;
; 17.437 ; 17.437       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]           ;
; 17.437 ; 17.437       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|observablevcoout ;
; 17.451 ; 17.451       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]         ;
; 17.458 ; 17.458       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; mcc_pll3|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl|inclk[0]               ;
; 17.458 ; 17.458       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; mcc_pll3|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl|outclk                 ;
; 17.462 ; 17.462       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; mcc_pll3|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl|inclk[0]               ;
; 17.462 ; 17.462       ; 0.000          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; mcc_pll3|altpll_component|auto_generated|wire_pll1_clk[1]~clkctrl|outclk                 ;
; 17.468 ; 17.468       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]         ;
; 17.483 ; 17.483       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]           ;
; 17.483 ; 17.483       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]           ;
; 17.483 ; 17.483       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]           ;
; 17.483 ; 17.483       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]           ;
; 17.483 ; 17.483       ; 0.000          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|observablevcoout ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                  ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                ; Clock Edge ; Target                                                                                                                                                                            ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 33.039 ; 33.269       ; 0.230          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~porta_address_reg0 ;
; 33.039 ; 33.269       ; 0.230          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~porta_re_reg       ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[0]                                                                                                                                  ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[10]                                                                                                                                  ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[11]                                                                                                                                  ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[12]                                                                                                                                  ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[13]                                                                                                                                  ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[14]                                                                                                                                  ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[15]                                                                                                                                  ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[16]                                                                                                                                  ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[17]                                                                                                                                  ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[18]                                                                                                                                  ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[9]                                                                                                                                   ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|start_sendcom                                                                                                                                    ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.end_set_address                                                                                                                       ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.end_set_idle                                                                                                                          ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.getreport_sendpkt1_end                                                                                                                ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.read_pktin2                                                                                                                           ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.read_pktin3                                                                                                                           ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.read_pktin4                                                                                                                           ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.send_ack                                                                                                                              ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.send_ack_end                                                                                                                          ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt1_end                                                                                                               ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt2                                                                                                                   ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt2_end                                                                                                               ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt3                                                                                                                   ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt3_end                                                                                                               ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait2                                                                                                                                 ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait30                                                                                                                                ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait4                                                                                                                                 ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_pktin1                                                                                                                           ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_pktin3                                                                                                                           ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_pktin4                                                                                                                           ;
; 33.062 ; 33.278       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[0]                                                                                                                                 ;
; 33.062 ; 33.278       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[1]                                                                                                                                 ;
; 33.062 ; 33.278       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[2]                                                                                                                                 ;
; 33.062 ; 33.278       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[4]                                                                                                                                 ;
; 33.062 ; 33.278       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[5]                                                                                                                                 ;
; 33.062 ; 33.278       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[6]                                                                                                                                 ;
; 33.062 ; 33.278       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[7]                                                                                                                                 ;
; 33.062 ; 33.278       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|detach_ack                                                                                                                                       ;
; 33.062 ; 33.278       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid_c                                                                                                                                ;
; 33.062 ; 33.278       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.read_byte1                                                                                                                            ;
; 33.062 ; 33.278       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.read_byte10                                                                                                                           ;
; 33.062 ; 33.278       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.read_byte11                                                                                                                           ;
; 33.062 ; 33.278       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.read_byte2                                                                                                                            ;
; 33.062 ; 33.278       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.read_byte9                                                                                                                            ;
; 33.062 ; 33.278       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.usb_reset_1ms_wait1                                                                                                                   ;
; 33.062 ; 33.278       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.usb_reset_state                                                                                                                       ;
; 33.062 ; 33.278       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte10                                                                                                                      ;
; 33.062 ; 33.278       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte11                                                                                                                      ;
; 33.062 ; 33.278       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte3                                                                                                                       ;
; 33.062 ; 33.278       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_reset                                                                                                                                        ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[0]                                                                                                                                      ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[1]                                                                                                                                      ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[4]                                                                                                                                      ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[6]                                                                                                                                      ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[10]                                                                                                                                 ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[11]                                                                                                                                 ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[12]                                                                                                                                 ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[13]                                                                                                                                 ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[14]                                                                                                                                 ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[1]                                                                                                                                  ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[2]                                                                                                                                  ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[3]                                                                                                                                  ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[4]                                                                                                                                  ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[5]                                                                                                                                  ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[6]                                                                                                                                  ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[7]                                                                                                                                  ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[8]                                                                                                                                  ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[9]                                                                                                                                  ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_available                                                                                                                                   ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_byte2[0]                                                                                                                                    ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_byte2[1]                                                                                                                                    ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_byte2[2]                                                                                                                                    ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_byte2[3]                                                                                                                                    ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_byte2[4]                                                                                                                                    ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_byte2[5]                                                                                                                                    ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_valid                                                                                                                                       ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_valid_temp                                                                                                                                  ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyright_temp[3]                                                                                                                                 ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.crc_complete                                                                                                                          ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.getreport_sendpkt1                                                                                                                    ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.read_byte3                                                                                                                            ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.read_byte4                                                                                                                            ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.read_byte5                                                                                                                            ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.read_byte6                                                                                                                            ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.read_byte7                                                                                                                            ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.read_byte8                                                                                                                            ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.send_getreport_ack_end                                                                                                                ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.start_get_data                                                                                                                        ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait1                                                                                                                                 ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait20                                                                                                                                ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_pktin2                                                                                                                           ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte2                                                                                                                       ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte4                                                                                                                       ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte5                                                                                                                       ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte6                                                                                                                       ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte7                                                                                                                       ;
; 33.063 ; 33.279       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte8                                                                                                                       ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: 'altera_reserved_tck'                                                                                                                                                                                                                                                      ;
+--------+--------------+----------------+------------------+---------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock               ; Clock Edge ; Target                                                                                                                                                                                                                ;
+--------+--------------+----------------+------------------+---------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 49.296 ; 49.526       ; 0.230          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ;
; 49.296 ; 49.526       ; 0.230          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                           ;
; 49.296 ; 49.526       ; 0.230          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ;
; 49.296 ; 49.526       ; 0.230          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                           ;
; 49.298 ; 49.528       ; 0.230          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ;
; 49.298 ; 49.528       ; 0.230          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ;
; 49.311 ; 49.527       ; 0.216          ; High Pulse Width ; altera_reserved_tck ; Fall       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ;
; 49.354 ; 49.538       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                           ;
; 49.354 ; 49.538       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                           ;
; 49.354 ; 49.538       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                                                           ;
; 49.354 ; 49.538       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                                                           ;
; 49.354 ; 49.538       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                                                           ;
; 49.354 ; 49.538       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                                                          ;
; 49.354 ; 49.538       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                                                          ;
; 49.354 ; 49.538       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                                                          ;
; 49.354 ; 49.538       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                                                          ;
; 49.354 ; 49.538       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                                                          ;
; 49.354 ; 49.538       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                                                          ;
; 49.354 ; 49.538       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                                                          ;
; 49.354 ; 49.538       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                                                          ;
; 49.354 ; 49.538       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                                                          ;
; 49.354 ; 49.538       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                                                          ;
; 49.354 ; 49.538       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|mixer_addr_reg[0]                                                                                                                                       ;
; 49.354 ; 49.538       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|mixer_addr_reg[1]                                                                                                                                       ;
; 49.354 ; 49.538       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|mixer_addr_reg[2]                                                                                                                                       ;
; 49.354 ; 49.538       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|mixer_addr_reg[3]                                                                                                                                       ;
; 49.354 ; 49.538       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|mixer_addr_reg[4]                                                                                                                                       ;
; 49.354 ; 49.538       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                                                                    ;
; 49.354 ; 49.538       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                                                                    ;
; 49.354 ; 49.538       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                                                                    ;
; 49.354 ; 49.538       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][3]                                                                                                                                    ;
; 49.354 ; 49.538       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                                                                    ;
; 49.354 ; 49.538       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                     ;
; 49.354 ; 49.538       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                     ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]                                              ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]                                              ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]                                              ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]                                              ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[2] ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[3] ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]                                              ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]                                              ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]                                              ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]                                              ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ;
; 49.355 ; 49.539       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[2] ;
+--------+--------------+----------------+------------------+---------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: 'FPGA_CLK'                                                                                                ;
+---------+--------------+----------------+------------------+----------+------------+----------------------------------------------------------------+
; Slack   ; Actual Width ; Required Width ; Type             ; Clock    ; Clock Edge ; Target                                                         ;
+---------+--------------+----------------+------------------+----------+------------+----------------------------------------------------------------+
; 99.418  ; 99.418       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]           ;
; 99.418  ; 99.418       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1]           ;
; 99.418  ; 99.418       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|observablevcoout ;
; 99.449  ; 99.449       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; FPGA_CLK~input|o                                               ;
; 99.460  ; 99.460       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|inclk[0]         ;
; 100.000 ; 100.000      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; FPGA_CLK~input|i                                               ;
; 100.000 ; 100.000      ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; FPGA_CLK~input|i                                               ;
; 100.539 ; 100.539      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|inclk[0]         ;
; 100.551 ; 100.551      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; FPGA_CLK~input|o                                               ;
; 100.580 ; 100.580      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]           ;
; 100.580 ; 100.580      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[1]           ;
; 100.580 ; 100.580      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|observablevcoout ;
; 196.000 ; 200.000      ; 4.000          ; Port Rate        ; FPGA_CLK ; Rise       ; FPGA_CLK                                                       ;
+---------+--------------+----------------+------------------+----------+------------+----------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                                                                             ;
+---------------------+---------------------+-------+-------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+-------+-------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]         ; FPGA_CLK            ; 1.396 ; 1.947 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 1.376 ; 1.927 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 1.376 ; 1.927 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 1.376 ; 1.927 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 1.385 ; 1.936 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 1.394 ; 1.945 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 1.386 ; 1.937 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 1.385 ; 1.936 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 1.362 ; 1.911 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 1.390 ; 1.941 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 1.396 ; 1.947 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 1.392 ; 1.943 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 1.392 ; 1.943 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 1.392 ; 1.943 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 1.391 ; 1.942 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 1.391 ; 1.942 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 1.391 ; 1.942 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0             ; FPGA_CLK            ; 1.854 ; 2.336 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; altera_reserved_tdi ; altera_reserved_tck ; 1.355 ; 1.869 ; Rise       ; altera_reserved_tck                                                            ;
; altera_reserved_tms ; altera_reserved_tck ; 3.323 ; 3.780 ; Rise       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; 2.445 ; 3.231 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; 1.322 ; 2.143 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 2.656 ; 3.453 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 1.290 ; 2.079 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 2.705 ; 3.534 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 1.387 ; 2.186 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+-------+-------+------------+--------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]         ; FPGA_CLK            ; -0.913 ; -1.462 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; -0.925 ; -1.476 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; -0.925 ; -1.476 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; -0.925 ; -1.476 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; -0.934 ; -1.485 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; -0.944 ; -1.495 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; -0.936 ; -1.487 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; -0.934 ; -1.485 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; -0.913 ; -1.462 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; -0.940 ; -1.491 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; -0.946 ; -1.497 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; -0.941 ; -1.492 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; -0.941 ; -1.492 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; -0.941 ; -1.492 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; -0.941 ; -1.492 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; -0.941 ; -1.492 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; -0.941 ; -1.492 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0             ; FPGA_CLK            ; -1.359 ; -1.844 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; altera_reserved_tdi ; altera_reserved_tck ; 0.576  ; 0.148  ; Rise       ; altera_reserved_tck                                                            ;
; altera_reserved_tms ; altera_reserved_tck ; -0.205 ; -0.658 ; Rise       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; -2.039 ; -2.811 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; -0.850 ; -1.655 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; -2.246 ; -3.035 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; -0.834 ; -1.608 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; -2.271 ; -3.087 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; -0.895 ; -1.672 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                                                                     ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_A[*]          ; FPGA_CLK            ; 3.466  ; 3.843  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]         ; FPGA_CLK            ; 1.696  ; 1.601  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]         ; FPGA_CLK            ; 1.696  ; 1.601  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]         ; FPGA_CLK            ; 1.699  ; 1.604  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]         ; FPGA_CLK            ; 1.699  ; 1.604  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]         ; FPGA_CLK            ; 1.692  ; 1.597  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]         ; FPGA_CLK            ; 1.692  ; 1.597  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]         ; FPGA_CLK            ; 1.690  ; 1.595  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]         ; FPGA_CLK            ; 1.252  ; 1.226  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]         ; FPGA_CLK            ; 3.466  ; 3.843  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]         ; FPGA_CLK            ; 1.691  ; 1.596  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]        ; FPGA_CLK            ; 1.696  ; 1.601  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]        ; FPGA_CLK            ; 1.691  ; 1.596  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]         ; FPGA_CLK            ; 3.473  ; 3.850  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]        ; FPGA_CLK            ; 3.473  ; 3.850  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]        ; FPGA_CLK            ; 1.259  ; 1.233  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N         ; FPGA_CLK            ; 1.261  ; 1.235  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N          ; FPGA_CLK            ; 1.698  ; 1.603  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]         ; FPGA_CLK            ; 3.113  ; 3.588  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 1.949  ; 1.907  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 1.949  ; 1.907  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 1.949  ; 1.907  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 3.113  ; 3.588  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 3.103  ; 3.578  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 1.335  ; 1.396  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 1.795  ; 1.791  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 1.698  ; 1.603  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 1.934  ; 1.892  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 3.101  ; 3.576  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 1.933  ; 1.891  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 1.933  ; 1.891  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 1.933  ; 1.891  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 3.106  ; 3.581  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 1.933  ; 1.891  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 1.933  ; 1.891  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n        ; FPGA_CLK            ; 1.692  ; 1.597  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n        ; FPGA_CLK            ; 1.698  ; 1.603  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N         ; FPGA_CLK            ; 1.698  ; 1.603  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N          ; FPGA_CLK            ; 3.475  ; 3.852  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L             ; FPGA_CLK            ; 3.559  ; 4.064  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R             ; FPGA_CLK            ; 2.172  ; 2.268  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK              ; FPGA_CLK            ; 2.281  ; 2.386  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD              ; FPGA_CLK            ; 2.284  ; 2.394  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3             ; FPGA_CLK            ; 2.195  ; 2.109  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK           ; FPGA_CLK            ; 10.491 ;        ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK           ; FPGA_CLK            ;        ; 10.968 ; Fall       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]            ; FPGA_CLK            ; 3.029  ; 3.475  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]           ; FPGA_CLK            ; 1.254  ; 1.228  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]           ; FPGA_CLK            ; 3.029  ; 3.475  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]           ; FPGA_CLK            ; 1.252  ; 1.226  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]           ; FPGA_CLK            ; 1.255  ; 1.229  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]            ; FPGA_CLK            ; 3.031  ; 3.477  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]           ; FPGA_CLK            ; 1.254  ; 1.228  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]           ; FPGA_CLK            ; 1.254  ; 1.228  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]           ; FPGA_CLK            ; 1.254  ; 1.228  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]           ; FPGA_CLK            ; 3.031  ; 3.477  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; altera_reserved_tdo ; altera_reserved_tck ; 6.906  ; 7.656  ; Fall       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; 2.923  ; 3.072  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; 4.398  ; 4.680  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 5.150  ; 4.548  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 4.261  ; 4.069  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                                                                             ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_A[*]          ; FPGA_CLK            ; 0.867  ; 0.841  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]         ; FPGA_CLK            ; 1.293  ; 1.201  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]         ; FPGA_CLK            ; 1.293  ; 1.201  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]         ; FPGA_CLK            ; 1.296  ; 1.204  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]         ; FPGA_CLK            ; 1.296  ; 1.204  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]         ; FPGA_CLK            ; 1.289  ; 1.197  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]         ; FPGA_CLK            ; 1.289  ; 1.197  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]         ; FPGA_CLK            ; 1.287  ; 1.195  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]         ; FPGA_CLK            ; 0.867  ; 0.841  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]         ; FPGA_CLK            ; 3.063  ; 3.443  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]         ; FPGA_CLK            ; 1.288  ; 1.196  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]        ; FPGA_CLK            ; 1.293  ; 1.201  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]        ; FPGA_CLK            ; 1.288  ; 1.196  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]         ; FPGA_CLK            ; 0.874  ; 0.848  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]        ; FPGA_CLK            ; 3.070  ; 3.450  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]        ; FPGA_CLK            ; 0.874  ; 0.848  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N         ; FPGA_CLK            ; 0.876  ; 0.850  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N          ; FPGA_CLK            ; 1.295  ; 1.203  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]         ; FPGA_CLK            ; 0.950  ; 1.012  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 1.545  ; 1.507  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 1.545  ; 1.507  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 1.545  ; 1.507  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 2.727  ; 3.203  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 2.718  ; 3.194  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 0.950  ; 1.012  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 1.391  ; 1.391  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 1.295  ; 1.203  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 1.531  ; 1.493  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 2.716  ; 3.192  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 1.529  ; 1.491  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 1.529  ; 1.491  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 1.529  ; 1.491  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 2.721  ; 3.197  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 1.530  ; 1.492  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 1.530  ; 1.492  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n        ; FPGA_CLK            ; 1.289  ; 1.197  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n        ; FPGA_CLK            ; 1.295  ; 1.203  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N         ; FPGA_CLK            ; 1.295  ; 1.203  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N          ; FPGA_CLK            ; 3.072  ; 3.452  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L             ; FPGA_CLK            ; 3.107  ; 3.610  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R             ; FPGA_CLK            ; 1.705  ; 1.796  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK              ; FPGA_CLK            ; 1.810  ; 1.909  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD              ; FPGA_CLK            ; 1.813  ; 1.917  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3             ; FPGA_CLK            ; 1.726  ; 1.645  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK           ; FPGA_CLK            ; 10.074 ;        ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK           ; FPGA_CLK            ;        ; 10.550 ; Fall       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]            ; FPGA_CLK            ; 0.867  ; 0.841  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]           ; FPGA_CLK            ; 0.868  ; 0.842  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]           ; FPGA_CLK            ; 2.644  ; 3.090  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]           ; FPGA_CLK            ; 0.867  ; 0.841  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]           ; FPGA_CLK            ; 0.870  ; 0.844  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]            ; FPGA_CLK            ; 0.869  ; 0.843  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]           ; FPGA_CLK            ; 0.869  ; 0.843  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]           ; FPGA_CLK            ; 0.869  ; 0.843  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]           ; FPGA_CLK            ; 0.869  ; 0.843  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]           ; FPGA_CLK            ; 2.646  ; 3.092  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; altera_reserved_tdo ; altera_reserved_tck ; 5.714  ; 6.467  ; Fall       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; 2.609  ; 2.754  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; 4.018  ; 4.292  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 4.832  ; 4.235  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 3.889  ; 3.702  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                                                      ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 1.949 ; 1.948 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 1.949 ; 1.948 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 1.949 ; 1.948 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 1.949 ; 1.948 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 3.788 ; 4.235 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 4.186 ; 4.633 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 2.390 ; 2.423 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 2.250 ; 2.283 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 2.332 ; 2.277 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 2.154 ; 2.153 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 4.028 ; 4.475 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 2.136 ; 2.135 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 2.136 ; 2.135 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 2.136 ; 2.135 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 4.206 ; 4.653 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 2.575 ; 2.574 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 2.575 ; 2.574 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 2.268 ; 2.213 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 2.976 ; 2.975 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2       ; FPGA_CLK   ; 3.975 ; 4.008 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1        ; FPGA_CLK   ; 4.688 ; 5.135 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2        ; FPGA_CLK   ; 4.115 ; 4.148 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                                                              ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 1.507 ; 1.506 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 1.507 ; 1.506 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 1.507 ; 1.506 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 1.507 ; 1.506 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 3.337 ; 3.784 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 3.720 ; 4.167 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 1.925 ; 1.958 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 1.790 ; 1.823 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 1.858 ; 1.803 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 1.704 ; 1.703 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 3.568 ; 4.015 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 1.686 ; 1.685 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 1.686 ; 1.685 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 1.686 ; 1.685 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 3.739 ; 4.186 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 2.108 ; 2.107 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 2.108 ; 2.107 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 1.797 ; 1.742 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 2.665 ; 2.664 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2       ; FPGA_CLK   ; 3.618 ; 3.651 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1        ; FPGA_CLK   ; 4.374 ; 4.821 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2        ; FPGA_CLK   ; 3.752 ; 3.785 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------+------------+-------+-------+------------+--------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                                                             ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 2.002     ; 2.003     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 2.002     ; 2.003     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 2.002     ; 2.003     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 2.002     ; 2.003     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 4.320     ; 3.873     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 4.758     ; 4.311     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 2.555     ; 2.522     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 2.395     ; 2.362     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 2.408     ; 2.463     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 2.242     ; 2.243     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 4.604     ; 4.157     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 2.222     ; 2.223     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 2.222     ; 2.223     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 2.222     ; 2.223     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 4.797     ; 4.350     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 2.718     ; 2.719     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 2.718     ; 2.719     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 2.345     ; 2.400     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 3.110     ; 3.111     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2       ; FPGA_CLK   ; 4.131     ; 4.098     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1        ; FPGA_CLK   ; 5.281     ; 4.834     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2        ; FPGA_CLK   ; 4.287     ; 4.254     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                                                     ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                                                ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 1.558     ; 1.559     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 1.558     ; 1.559     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 1.558     ; 1.559     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 1.558     ; 1.559     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 3.866     ; 3.419     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 4.287     ; 3.840     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 2.085     ; 2.052     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 1.931     ; 1.898     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 1.928     ; 1.983     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 1.788     ; 1.789     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 4.138     ; 3.691     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 1.769     ; 1.770     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 1.769     ; 1.770     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 1.769     ; 1.770     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 4.324     ; 3.877     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 2.245     ; 2.246     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 2.245     ; 2.246     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 1.868     ; 1.923     ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 2.794     ; 2.795     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2       ; FPGA_CLK   ; 3.769     ; 3.736     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1        ; FPGA_CLK   ; 4.962     ; 4.515     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2        ; FPGA_CLK   ; 3.919     ; 3.886     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------+------------+-----------+-----------+------------+--------------------------------------------------------------------------------+


---------------------------------------------
; Fast 1200mV 0C Model Metastability Report ;
---------------------------------------------
No synchronizer chains to report.


+-----------------------------------------------------------------------------------------------------------------------------------------------+
; Multicorner Timing Analysis Summary                                                                                                           ;
+---------------------------------------------------------------------------------+----------+-------+----------+---------+---------------------+
; Clock                                                                           ; Setup    ; Hold  ; Recovery ; Removal ; Minimum Pulse Width ;
+---------------------------------------------------------------------------------+----------+-------+----------+---------+---------------------+
; Worst-case Slack                                                                ; -3.966   ; 0.131 ; 6.778    ; 0.120   ; 4.091               ;
;  FPGA_CLK                                                                       ; N/A      ; N/A   ; N/A      ; N/A     ; 99.418              ;
;  \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.499   ; 0.187 ; 7.369    ; 1.453   ; 5.545               ;
;  \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; -3.966   ; 0.136 ; 6.778    ; 0.683   ; 17.162              ;
;  \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 4.171    ; 0.137 ; N/A      ; N/A     ; 4.091               ;
;  altera_reserved_tck                                                            ; 45.803   ; 0.187 ; 48.242   ; 0.671   ; 49.296              ;
;  mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 26.002   ; 0.131 ; 63.099   ; 0.120   ; 32.951              ;
;  mcc_pll3|altpll_component|auto_generated|pll1|clk[1]                           ; N/A      ; N/A   ; N/A      ; N/A     ; 17.424              ;
; Design-wide TNS                                                                 ; -337.907 ; 0.0   ; 0.0      ; 0.0     ; 0.0                 ;
;  FPGA_CLK                                                                       ; N/A      ; N/A   ; N/A      ; N/A     ; 0.000               ;
;  \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -1.262   ; 0.000 ; 0.000    ; 0.000   ; 0.000               ;
;  \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; -336.645 ; 0.000 ; 0.000    ; 0.000   ; 0.000               ;
;  \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000    ; 0.000 ; N/A      ; N/A     ; 0.000               ;
;  altera_reserved_tck                                                            ; 0.000    ; 0.000 ; 0.000    ; 0.000   ; 0.000               ;
;  mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 0.000    ; 0.000 ; 0.000    ; 0.000   ; 0.000               ;
;  mcc_pll3|altpll_component|auto_generated|pll1|clk[1]                           ; N/A      ; N/A   ; N/A      ; N/A     ; 0.000               ;
+---------------------------------------------------------------------------------+----------+-------+----------+---------+---------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                                                                             ;
+---------------------+---------------------+-------+-------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+-------+-------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]         ; FPGA_CLK            ; 2.679 ; 2.858 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 2.650 ; 2.829 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 2.650 ; 2.829 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 2.650 ; 2.829 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 2.664 ; 2.843 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 2.672 ; 2.851 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 2.665 ; 2.844 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 2.664 ; 2.843 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 2.611 ; 2.789 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 2.672 ; 2.851 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 2.679 ; 2.858 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 2.675 ; 2.854 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 2.675 ; 2.854 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 2.675 ; 2.854 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 2.673 ; 2.852 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 2.673 ; 2.852 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 2.673 ; 2.852 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0             ; FPGA_CLK            ; 3.509 ; 3.680 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; altera_reserved_tdi ; altera_reserved_tck ; 3.345 ; 3.556 ; Rise       ; altera_reserved_tck                                                            ;
; altera_reserved_tms ; altera_reserved_tck ; 8.006 ; 8.229 ; Rise       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; 4.671 ; 5.104 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; 2.435 ; 2.852 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 5.144 ; 5.578 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 2.344 ; 2.775 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 5.291 ; 5.761 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 2.733 ; 3.182 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+-------+-------+------------+--------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_DQ[*]         ; FPGA_CLK            ; -0.913 ; -1.462 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; -0.925 ; -1.476 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; -0.925 ; -1.476 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; -0.925 ; -1.476 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; -0.934 ; -1.485 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; -0.944 ; -1.495 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; -0.936 ; -1.487 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; -0.934 ; -1.485 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; -0.913 ; -1.462 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; -0.940 ; -1.491 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; -0.946 ; -1.497 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; -0.941 ; -1.492 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; -0.941 ; -1.492 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; -0.941 ; -1.492 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; -0.941 ; -1.492 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; -0.941 ; -1.492 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; -0.941 ; -1.492 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0             ; FPGA_CLK            ; -1.359 ; -1.844 ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; altera_reserved_tdi ; altera_reserved_tck ; 0.719  ; 0.548  ; Rise       ; altera_reserved_tck                                                            ;
; altera_reserved_tms ; altera_reserved_tck ; -0.205 ; -0.658 ; Rise       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; -2.039 ; -2.811 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; -0.850 ; -1.487 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; -2.246 ; -3.035 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; -0.834 ; -1.469 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; -2.271 ; -3.087 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; -0.895 ; -1.672 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                                                                     ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_A[*]          ; FPGA_CLK            ; 5.734  ; 5.981  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]         ; FPGA_CLK            ; 3.130  ; 2.917  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]         ; FPGA_CLK            ; 3.130  ; 2.917  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]         ; FPGA_CLK            ; 3.133  ; 2.920  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]         ; FPGA_CLK            ; 3.133  ; 2.920  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]         ; FPGA_CLK            ; 3.120  ; 2.907  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]         ; FPGA_CLK            ; 3.120  ; 2.907  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]         ; FPGA_CLK            ; 3.118  ; 2.905  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]         ; FPGA_CLK            ; 2.297  ; 2.223  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]         ; FPGA_CLK            ; 5.734  ; 5.981  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]         ; FPGA_CLK            ; 3.119  ; 2.906  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]        ; FPGA_CLK            ; 3.130  ; 2.917  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]        ; FPGA_CLK            ; 3.119  ; 2.906  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]         ; FPGA_CLK            ; 5.747  ; 5.994  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]        ; FPGA_CLK            ; 5.747  ; 5.994  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]        ; FPGA_CLK            ; 2.310  ; 2.236  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N         ; FPGA_CLK            ; 2.311  ; 2.237  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N          ; FPGA_CLK            ; 3.131  ; 2.918  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]         ; FPGA_CLK            ; 5.070  ; 5.494  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 3.512  ; 3.367  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 3.512  ; 3.367  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 3.512  ; 3.367  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 5.070  ; 5.494  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 5.061  ; 5.485  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 2.456  ; 2.435  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 3.318  ; 3.164  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 3.132  ; 2.919  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 3.489  ; 3.344  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 5.054  ; 5.478  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 3.487  ; 3.342  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 3.487  ; 3.342  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 3.487  ; 3.342  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 5.060  ; 5.484  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 3.488  ; 3.343  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 3.488  ; 3.343  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n        ; FPGA_CLK            ; 3.120  ; 2.907  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n        ; FPGA_CLK            ; 3.132  ; 2.919  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N         ; FPGA_CLK            ; 3.131  ; 2.918  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N          ; FPGA_CLK            ; 5.749  ; 5.996  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L             ; FPGA_CLK            ; 6.048  ; 6.425  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R             ; FPGA_CLK            ; 4.261  ; 4.193  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK              ; FPGA_CLK            ; 4.419  ; 4.339  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD              ; FPGA_CLK            ; 4.433  ; 4.353  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3             ; FPGA_CLK            ; 4.019  ; 4.081  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK           ; FPGA_CLK            ; 12.242 ;        ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK           ; FPGA_CLK            ;        ; 12.593 ; Fall       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]            ; FPGA_CLK            ; 4.914  ; 5.300  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]           ; FPGA_CLK            ; 2.298  ; 2.224  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]           ; FPGA_CLK            ; 4.914  ; 5.300  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]           ; FPGA_CLK            ; 2.297  ; 2.223  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]           ; FPGA_CLK            ; 2.300  ; 2.226  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]            ; FPGA_CLK            ; 4.916  ; 5.302  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]           ; FPGA_CLK            ; 2.299  ; 2.225  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]           ; FPGA_CLK            ; 2.299  ; 2.225  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]           ; FPGA_CLK            ; 2.299  ; 2.225  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]           ; FPGA_CLK            ; 4.916  ; 5.302  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; altera_reserved_tdo ; altera_reserved_tck ; 12.821 ; 13.823 ; Fall       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; 5.670  ; 5.652  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; 8.639  ; 8.746  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 8.494  ; 8.067  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 8.016  ; 8.035  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                                                                             ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                                ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+
; SDRAM_A[*]          ; FPGA_CLK            ; 0.867  ; 0.841  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]         ; FPGA_CLK            ; 1.293  ; 1.201  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]         ; FPGA_CLK            ; 1.293  ; 1.201  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]         ; FPGA_CLK            ; 1.296  ; 1.204  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]         ; FPGA_CLK            ; 1.296  ; 1.204  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]         ; FPGA_CLK            ; 1.289  ; 1.197  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]         ; FPGA_CLK            ; 1.289  ; 1.197  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]         ; FPGA_CLK            ; 1.287  ; 1.195  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]         ; FPGA_CLK            ; 0.867  ; 0.841  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]         ; FPGA_CLK            ; 3.063  ; 3.443  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]         ; FPGA_CLK            ; 1.288  ; 1.196  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]        ; FPGA_CLK            ; 1.293  ; 1.201  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]        ; FPGA_CLK            ; 1.288  ; 1.196  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]         ; FPGA_CLK            ; 0.874  ; 0.848  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]        ; FPGA_CLK            ; 3.070  ; 3.450  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]        ; FPGA_CLK            ; 0.874  ; 0.848  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N         ; FPGA_CLK            ; 0.876  ; 0.850  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N          ; FPGA_CLK            ; 1.295  ; 1.203  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]         ; FPGA_CLK            ; 0.950  ; 1.012  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 1.545  ; 1.507  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 1.545  ; 1.507  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 1.545  ; 1.507  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 2.727  ; 3.203  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 2.718  ; 3.194  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 0.950  ; 1.012  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 1.391  ; 1.391  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 1.295  ; 1.203  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 1.531  ; 1.493  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 2.716  ; 3.192  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 1.529  ; 1.491  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 1.529  ; 1.491  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 1.529  ; 1.491  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 2.721  ; 3.197  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 1.530  ; 1.492  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 1.530  ; 1.492  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n        ; FPGA_CLK            ; 1.289  ; 1.197  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n        ; FPGA_CLK            ; 1.295  ; 1.203  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N         ; FPGA_CLK            ; 1.295  ; 1.203  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N          ; FPGA_CLK            ; 3.072  ; 3.452  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L             ; FPGA_CLK            ; 3.107  ; 3.610  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R             ; FPGA_CLK            ; 1.705  ; 1.796  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK              ; FPGA_CLK            ; 1.810  ; 1.909  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD              ; FPGA_CLK            ; 1.813  ; 1.917  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3             ; FPGA_CLK            ; 1.726  ; 1.645  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK           ; FPGA_CLK            ; 10.074 ;        ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK           ; FPGA_CLK            ;        ; 10.550 ; Fall       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]            ; FPGA_CLK            ; 0.867  ; 0.841  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]           ; FPGA_CLK            ; 0.868  ; 0.842  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]           ; FPGA_CLK            ; 2.644  ; 3.090  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]           ; FPGA_CLK            ; 0.867  ; 0.841  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]           ; FPGA_CLK            ; 0.870  ; 0.844  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]            ; FPGA_CLK            ; 0.869  ; 0.843  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]           ; FPGA_CLK            ; 0.869  ; 0.843  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]           ; FPGA_CLK            ; 0.869  ; 0.843  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]           ; FPGA_CLK            ; 0.869  ; 0.843  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]           ; FPGA_CLK            ; 2.646  ; 3.092  ; Rise       ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; altera_reserved_tdo ; altera_reserved_tck ; 5.714  ; 6.467  ; Fall       ; altera_reserved_tck                                                            ;
; dminus1             ; FPGA_CLK            ; 2.609  ; 2.754  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dminus2             ; FPGA_CLK            ; 4.018  ; 4.292  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus1              ; FPGA_CLK            ; 4.832  ; 4.235  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
; dplus2              ; FPGA_CLK            ; 3.889  ; 3.702  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ;
+---------------------+---------------------+--------+--------+------------+--------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Board Trace Model Assignments                                                                                                                                                                                                                                                                                                                                                                                          ;
+---------------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
; Pin                 ; I/O Standard ; Near Tline Length ; Near Tline L per Length ; Near Tline C per Length ; Near Series R ; Near Differential R ; Near Pull-up R ; Near Pull-down R ; Near C ; Far Tline Length ; Far Tline L per Length ; Far Tline C per Length ; Far Series R ; Far Pull-up R ; Far Pull-down R ; Far C ; Termination Voltage ; Far Differential R ; EBD File Name ; EBD Signal Name ; EBD Far-end ;
+---------------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
; VGA_B[0]            ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_B[1]            ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_B[2]            ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_B[3]            ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_G[0]            ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_G[1]            ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_G[2]            ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_G[3]            ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; AUDIO_L             ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; AUDIO_R             ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_BA[0]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_BA[1]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_CS_N          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_RAS_N         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_CAS_N         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_WE_N          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQMH_n        ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQML_n        ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_CLK           ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_CKE           ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[0]          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[1]          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[2]          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[3]          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[4]          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[5]          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[6]          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[7]          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[8]          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[9]          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[10]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[11]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[12]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SD_CLK              ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SD_CMD              ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SD_DAT3             ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; CFG_CLK             ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; CFG_CS_n            ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; CFG_DOUT            ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; dplus1              ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; dminus1             ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; dplus2              ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; dminus2             ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[0]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[1]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[2]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[3]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[4]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[5]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[6]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[7]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[8]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[9]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[10]        ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[11]        ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[12]        ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[13]        ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[14]        ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[15]        ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; altera_reserved_tdo ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
+---------------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+


+------------------------------------------------------------------------+
; Input Transition Times                                                 ;
+---------------------+--------------+-----------------+-----------------+
; Pin                 ; I/O Standard ; 10-90 Rise Time ; 90-10 Fall Time ;
+---------------------+--------------+-----------------+-----------------+
; CFG_DIN             ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; dplus1              ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; dminus1             ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; dplus2              ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; dminus2             ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[0]         ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[1]         ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[2]         ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[3]         ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[4]         ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[5]         ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[6]         ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[7]         ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[8]         ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[9]         ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[10]        ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[11]        ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[12]        ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[13]        ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[14]        ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[15]        ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; FPGA_CLK            ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SD_DAT0             ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; altera_reserved_tms ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; altera_reserved_tck ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; altera_reserved_tdi ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
+---------------------+--------------+-----------------+-----------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Signal Integrity Metrics (Slow 1200mv 0c Model)                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  ;
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; Pin                 ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; VGA_B[0]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; VGA_B[1]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.09 V              ; -0.00419 V          ; 0.108 V                              ; 0.251 V                              ; 5.73e-09 s                  ; 5.85e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.69e-08 V                  ; 3.09 V             ; -0.00419 V         ; 0.108 V                             ; 0.251 V                             ; 5.73e-09 s                 ; 5.85e-09 s                 ; Yes                       ; Yes                       ;
; VGA_B[2]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; VGA_B[3]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; VGA_G[0]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; VGA_G[1]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; VGA_G[2]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; VGA_G[3]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.09 V              ; -0.00419 V          ; 0.108 V                              ; 0.251 V                              ; 5.73e-09 s                  ; 5.85e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.69e-08 V                  ; 3.09 V             ; -0.00419 V         ; 0.108 V                             ; 0.251 V                             ; 5.73e-09 s                 ; 5.85e-09 s                 ; Yes                       ; Yes                       ;
; AUDIO_L             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.09 V              ; -0.00419 V          ; 0.108 V                              ; 0.251 V                              ; 5.73e-09 s                  ; 5.85e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.69e-08 V                  ; 3.09 V             ; -0.00419 V         ; 0.108 V                             ; 0.251 V                             ; 5.73e-09 s                 ; 5.85e-09 s                 ; Yes                       ; Yes                       ;
; AUDIO_R             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_BA[0]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.09 V              ; -0.00419 V          ; 0.108 V                              ; 0.251 V                              ; 5.73e-09 s                  ; 5.85e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.69e-08 V                  ; 3.09 V             ; -0.00419 V         ; 0.108 V                             ; 0.251 V                             ; 5.73e-09 s                 ; 5.85e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_BA[1]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_CS_N          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_RAS_N         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_CAS_N         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_WE_N          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.09 V              ; -0.00419 V          ; 0.108 V                              ; 0.251 V                              ; 5.73e-09 s                  ; 5.85e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.69e-08 V                  ; 3.09 V             ; -0.00419 V         ; 0.108 V                             ; 0.251 V                             ; 5.73e-09 s                 ; 5.85e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQMH_n        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_DQML_n        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_CLK           ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.09 V              ; -0.00419 V          ; 0.108 V                              ; 0.251 V                              ; 5.73e-09 s                  ; 5.85e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.69e-08 V                  ; 3.09 V             ; -0.00419 V         ; 0.108 V                             ; 0.251 V                             ; 5.73e-09 s                 ; 5.85e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_CKE           ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[0]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[1]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[2]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[3]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[4]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[5]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[6]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[7]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[8]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.09 V              ; -0.00419 V          ; 0.108 V                              ; 0.251 V                              ; 5.73e-09 s                  ; 5.85e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.69e-08 V                  ; 3.09 V             ; -0.00419 V         ; 0.108 V                             ; 0.251 V                             ; 5.73e-09 s                 ; 5.85e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[9]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[10]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[11]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[12]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SD_CLK              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SD_CMD              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SD_DAT3             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; CFG_CLK             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 6.15e-09 V                   ; 3.18 V              ; -0.0303 V           ; 0.317 V                              ; 0.07 V                               ; 3.25e-10 s                  ; 3.88e-10 s                  ; No                         ; Yes                        ; 3.08 V                      ; 6.15e-09 V                  ; 3.18 V             ; -0.0303 V          ; 0.317 V                             ; 0.07 V                              ; 3.25e-10 s                 ; 3.88e-10 s                 ; No                        ; Yes                       ;
; CFG_CS_n            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.76e-08 V                   ; 3.09 V              ; -0.0166 V           ; 0.084 V                              ; 0.289 V                              ; 2.05e-09 s                  ; 1.96e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.76e-08 V                  ; 3.09 V             ; -0.0166 V          ; 0.084 V                             ; 0.289 V                             ; 2.05e-09 s                 ; 1.96e-09 s                 ; Yes                       ; Yes                       ;
; CFG_DOUT            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.76e-08 V                   ; 3.09 V              ; -0.0166 V           ; 0.084 V                              ; 0.289 V                              ; 2.05e-09 s                  ; 1.96e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.76e-08 V                  ; 3.09 V             ; -0.0166 V          ; 0.084 V                             ; 0.289 V                             ; 2.05e-09 s                 ; 1.96e-09 s                 ; Yes                       ; Yes                       ;
; dplus1              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.09 V              ; -0.00398 V          ; 0.168 V                              ; 0.263 V                              ; 6.02e-09 s                  ; 6.14e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.09 V             ; -0.00398 V         ; 0.168 V                             ; 0.263 V                             ; 6.02e-09 s                 ; 6.14e-09 s                 ; Yes                       ; Yes                       ;
; dminus1             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; dplus2              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0307 V           ; 0.185 V                              ; 0.216 V                              ; 1.07e-09 s                  ; 1.08e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0307 V          ; 0.185 V                             ; 0.216 V                             ; 1.07e-09 s                 ; 1.08e-09 s                 ; Yes                       ; Yes                       ;
; dminus2             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0307 V           ; 0.185 V                              ; 0.216 V                              ; 1.07e-09 s                  ; 1.08e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0307 V          ; 0.185 V                             ; 0.216 V                             ; 1.07e-09 s                 ; 1.08e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[0]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[1]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[2]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[3]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.09 V              ; -0.00398 V          ; 0.168 V                              ; 0.263 V                              ; 6.02e-09 s                  ; 6.14e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.09 V             ; -0.00398 V         ; 0.168 V                             ; 0.263 V                             ; 6.02e-09 s                 ; 6.14e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[4]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.09 V              ; -0.00398 V          ; 0.168 V                              ; 0.263 V                              ; 6.02e-09 s                  ; 6.14e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.09 V             ; -0.00398 V         ; 0.168 V                             ; 0.263 V                             ; 6.02e-09 s                 ; 6.14e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[5]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0307 V           ; 0.185 V                              ; 0.216 V                              ; 1.07e-09 s                  ; 1.08e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0307 V          ; 0.185 V                             ; 0.216 V                             ; 1.07e-09 s                 ; 1.08e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[6]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0307 V           ; 0.185 V                              ; 0.216 V                              ; 1.07e-09 s                  ; 1.08e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0307 V          ; 0.185 V                             ; 0.216 V                             ; 1.07e-09 s                 ; 1.08e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[7]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_DQ[8]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[9]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.09 V              ; -0.00398 V          ; 0.168 V                              ; 0.263 V                              ; 6.02e-09 s                  ; 6.14e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.09 V             ; -0.00398 V         ; 0.168 V                             ; 0.263 V                             ; 6.02e-09 s                 ; 6.14e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[10]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[11]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[12]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[13]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.09 V              ; -0.00398 V          ; 0.168 V                              ; 0.263 V                              ; 6.02e-09 s                  ; 6.14e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.09 V             ; -0.00398 V         ; 0.168 V                             ; 0.263 V                             ; 6.02e-09 s                 ; 6.14e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[14]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[15]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; altera_reserved_tdo ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 5.09e-08 V                   ; 3.11 V              ; 5.09e-08 V          ; 0.193 V                              ; 0.27 V                               ; 1.07e-09 s                  ; 2.77e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 5.09e-08 V                  ; 3.11 V             ; 5.09e-08 V         ; 0.193 V                             ; 0.27 V                              ; 1.07e-09 s                 ; 2.77e-09 s                 ; Yes                       ; Yes                       ;
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Signal Integrity Metrics (Slow 1200mv 85c Model)                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                 ;
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; Pin                 ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; VGA_B[0]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; VGA_B[1]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.00169 V          ; 0.058 V                              ; 0.159 V                              ; 6.95e-09 s                  ; 7.33e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.00169 V         ; 0.058 V                             ; 0.159 V                             ; 6.95e-09 s                 ; 7.33e-09 s                 ; Yes                       ; Yes                       ;
; VGA_B[2]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; VGA_B[3]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; VGA_G[0]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; VGA_G[1]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; VGA_G[2]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; VGA_G[3]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.00169 V          ; 0.058 V                              ; 0.159 V                              ; 6.95e-09 s                  ; 7.33e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.00169 V         ; 0.058 V                             ; 0.159 V                             ; 6.95e-09 s                 ; 7.33e-09 s                 ; Yes                       ; Yes                       ;
; AUDIO_L             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.00169 V          ; 0.058 V                              ; 0.159 V                              ; 6.95e-09 s                  ; 7.33e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.00169 V         ; 0.058 V                             ; 0.159 V                             ; 6.95e-09 s                 ; 7.33e-09 s                 ; Yes                       ; Yes                       ;
; AUDIO_R             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_BA[0]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.00169 V          ; 0.058 V                              ; 0.159 V                              ; 6.95e-09 s                  ; 7.33e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.00169 V         ; 0.058 V                             ; 0.159 V                             ; 6.95e-09 s                 ; 7.33e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_BA[1]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_CS_N          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_RAS_N         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_CAS_N         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_WE_N          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.00169 V          ; 0.058 V                              ; 0.159 V                              ; 6.95e-09 s                  ; 7.33e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.00169 V         ; 0.058 V                             ; 0.159 V                             ; 6.95e-09 s                 ; 7.33e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQMH_n        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQML_n        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_CLK           ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.00169 V          ; 0.058 V                              ; 0.159 V                              ; 6.95e-09 s                  ; 7.33e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.00169 V         ; 0.058 V                             ; 0.159 V                             ; 6.95e-09 s                 ; 7.33e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_CKE           ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[0]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[1]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[2]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[3]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[4]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[5]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[6]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[7]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[8]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.00169 V          ; 0.058 V                              ; 0.159 V                              ; 6.95e-09 s                  ; 7.33e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.00169 V         ; 0.058 V                             ; 0.159 V                             ; 6.95e-09 s                 ; 7.33e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[9]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[10]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[11]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[12]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SD_CLK              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SD_CMD              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SD_DAT3             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; CFG_CLK             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 6.52e-07 V                   ; 3.14 V              ; -0.0428 V           ; 0.161 V                              ; 0.071 V                              ; 4.71e-10 s                  ; 4.5e-10 s                   ; Yes                        ; Yes                        ; 3.08 V                      ; 6.52e-07 V                  ; 3.14 V             ; -0.0428 V          ; 0.161 V                             ; 0.071 V                             ; 4.71e-10 s                 ; 4.5e-10 s                  ; Yes                       ; Yes                       ;
; CFG_CS_n            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.13e-06 V                   ; 3.08 V              ; -0.00721 V          ; 0.043 V                              ; 0.226 V                              ; 2.47e-09 s                  ; 2.5e-09 s                   ; Yes                        ; Yes                        ; 3.08 V                      ; 3.13e-06 V                  ; 3.08 V             ; -0.00721 V         ; 0.043 V                             ; 0.226 V                             ; 2.47e-09 s                 ; 2.5e-09 s                  ; Yes                       ; Yes                       ;
; CFG_DOUT            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.13e-06 V                   ; 3.08 V              ; -0.00721 V          ; 0.043 V                              ; 0.226 V                              ; 2.47e-09 s                  ; 2.5e-09 s                   ; Yes                        ; Yes                        ; 3.08 V                      ; 3.13e-06 V                  ; 3.08 V             ; -0.00721 V         ; 0.043 V                             ; 0.226 V                             ; 2.47e-09 s                 ; 2.5e-09 s                  ; Yes                       ; Yes                       ;
; dplus1              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.00144 V          ; 0.08 V                               ; 0.174 V                              ; 7.33e-09 s                  ; 7.73e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.00144 V         ; 0.08 V                              ; 0.174 V                             ; 7.33e-09 s                 ; 7.73e-09 s                 ; Yes                       ; Yes                       ;
; dminus1             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; dplus2              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.0139 V           ; 0.07 V                               ; 0.155 V                              ; 1.28e-09 s                  ; 1.32e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.0139 V          ; 0.07 V                              ; 0.155 V                             ; 1.28e-09 s                 ; 1.32e-09 s                 ; Yes                       ; Yes                       ;
; dminus2             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.0139 V           ; 0.07 V                               ; 0.155 V                              ; 1.28e-09 s                  ; 1.32e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.0139 V          ; 0.07 V                              ; 0.155 V                             ; 1.28e-09 s                 ; 1.32e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[0]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[1]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[2]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[3]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.00144 V          ; 0.08 V                               ; 0.174 V                              ; 7.33e-09 s                  ; 7.73e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.00144 V         ; 0.08 V                              ; 0.174 V                             ; 7.33e-09 s                 ; 7.73e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[4]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.00144 V          ; 0.08 V                               ; 0.174 V                              ; 7.33e-09 s                  ; 7.73e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.00144 V         ; 0.08 V                              ; 0.174 V                             ; 7.33e-09 s                 ; 7.73e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[5]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.0139 V           ; 0.07 V                               ; 0.155 V                              ; 1.28e-09 s                  ; 1.32e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.0139 V          ; 0.07 V                              ; 0.155 V                             ; 1.28e-09 s                 ; 1.32e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[6]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.0139 V           ; 0.07 V                               ; 0.155 V                              ; 1.28e-09 s                  ; 1.32e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.0139 V          ; 0.07 V                              ; 0.155 V                             ; 1.28e-09 s                 ; 1.32e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[7]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[8]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[9]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.00144 V          ; 0.08 V                               ; 0.174 V                              ; 7.33e-09 s                  ; 7.73e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.00144 V         ; 0.08 V                              ; 0.174 V                             ; 7.33e-09 s                 ; 7.73e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[10]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[11]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[12]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[13]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.00144 V          ; 0.08 V                               ; 0.174 V                              ; 7.33e-09 s                  ; 7.73e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.00144 V         ; 0.08 V                              ; 0.174 V                             ; 7.33e-09 s                 ; 7.73e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[14]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[15]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; altera_reserved_tdo ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 5.8e-06 V                    ; 3.09 V              ; 5.8e-06 V           ; 0.119 V                              ; 0.138 V                              ; 1.28e-09 s                  ; 3.52e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 5.8e-06 V                   ; 3.09 V             ; 5.8e-06 V          ; 0.119 V                             ; 0.138 V                             ; 1.28e-09 s                 ; 3.52e-09 s                 ; Yes                       ; Yes                       ;
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Signal Integrity Metrics (Fast 1200mv 0c Model)                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  ;
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; Pin                 ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; VGA_B[0]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; VGA_B[1]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.47 V              ; -0.00753 V          ; 0.323 V                              ; 0.336 V                              ; 4.77e-09 s                  ; 5.18e-09 s                  ; Yes                        ; No                         ; 3.46 V                      ; 3.12e-07 V                  ; 3.47 V             ; -0.00753 V         ; 0.323 V                             ; 0.336 V                             ; 4.77e-09 s                 ; 5.18e-09 s                 ; Yes                       ; No                        ;
; VGA_B[2]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; VGA_B[3]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; VGA_G[0]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; VGA_G[1]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; VGA_G[2]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; VGA_G[3]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.47 V              ; -0.00753 V          ; 0.323 V                              ; 0.336 V                              ; 4.77e-09 s                  ; 5.18e-09 s                  ; Yes                        ; No                         ; 3.46 V                      ; 3.12e-07 V                  ; 3.47 V             ; -0.00753 V         ; 0.323 V                             ; 0.336 V                             ; 4.77e-09 s                 ; 5.18e-09 s                 ; Yes                       ; No                        ;
; AUDIO_L             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.47 V              ; -0.00753 V          ; 0.323 V                              ; 0.336 V                              ; 4.77e-09 s                  ; 5.18e-09 s                  ; Yes                        ; No                         ; 3.46 V                      ; 3.12e-07 V                  ; 3.47 V             ; -0.00753 V         ; 0.323 V                             ; 0.336 V                             ; 4.77e-09 s                 ; 5.18e-09 s                 ; Yes                       ; No                        ;
; AUDIO_R             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_BA[0]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.47 V              ; -0.00753 V          ; 0.323 V                              ; 0.336 V                              ; 4.77e-09 s                  ; 5.18e-09 s                  ; Yes                        ; No                         ; 3.46 V                      ; 3.12e-07 V                  ; 3.47 V             ; -0.00753 V         ; 0.323 V                             ; 0.336 V                             ; 4.77e-09 s                 ; 5.18e-09 s                 ; Yes                       ; No                        ;
; SDRAM_BA[1]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_CS_N          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_RAS_N         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_CAS_N         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_WE_N          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.47 V              ; -0.00753 V          ; 0.323 V                              ; 0.336 V                              ; 4.77e-09 s                  ; 5.18e-09 s                  ; Yes                        ; No                         ; 3.46 V                      ; 3.12e-07 V                  ; 3.47 V             ; -0.00753 V         ; 0.323 V                             ; 0.336 V                             ; 4.77e-09 s                 ; 5.18e-09 s                 ; Yes                       ; No                        ;
; SDRAM_DQMH_n        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_DQML_n        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_CLK           ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.47 V              ; -0.00753 V          ; 0.323 V                              ; 0.336 V                              ; 4.77e-09 s                  ; 5.18e-09 s                  ; Yes                        ; No                         ; 3.46 V                      ; 3.12e-07 V                  ; 3.47 V             ; -0.00753 V         ; 0.323 V                             ; 0.336 V                             ; 4.77e-09 s                 ; 5.18e-09 s                 ; Yes                       ; No                        ;
; SDRAM_CKE           ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[0]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[1]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[2]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[3]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[4]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[5]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[6]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[7]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[8]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.47 V              ; -0.00753 V          ; 0.323 V                              ; 0.336 V                              ; 4.77e-09 s                  ; 5.18e-09 s                  ; Yes                        ; No                         ; 3.46 V                      ; 3.12e-07 V                  ; 3.47 V             ; -0.00753 V         ; 0.323 V                             ; 0.336 V                             ; 4.77e-09 s                 ; 5.18e-09 s                 ; Yes                       ; No                        ;
; SDRAM_A[9]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[10]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[11]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[12]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SD_CLK              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SD_CMD              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SD_DAT3             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; CFG_CLK             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 6.59e-08 V                   ; 3.58 V              ; -0.0703 V           ; 0.234 V                              ; 0.091 V                              ; 2.93e-10 s                  ; 3.09e-10 s                  ; Yes                        ; Yes                        ; 3.46 V                      ; 6.59e-08 V                  ; 3.58 V             ; -0.0703 V          ; 0.234 V                             ; 0.091 V                             ; 2.93e-10 s                 ; 3.09e-10 s                 ; Yes                       ; Yes                       ;
; CFG_CS_n            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.08e-07 V                   ; 3.48 V              ; -0.026 V            ; 0.261 V                              ; 0.327 V                              ; 1.74e-09 s                  ; 1.77e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 3.08e-07 V                  ; 3.48 V             ; -0.026 V           ; 0.261 V                             ; 0.327 V                             ; 1.74e-09 s                 ; 1.77e-09 s                 ; No                        ; No                        ;
; CFG_DOUT            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.08e-07 V                   ; 3.48 V              ; -0.026 V            ; 0.261 V                              ; 0.327 V                              ; 1.74e-09 s                  ; 1.77e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 3.08e-07 V                  ; 3.48 V             ; -0.026 V           ; 0.261 V                             ; 0.327 V                             ; 1.74e-09 s                 ; 1.77e-09 s                 ; No                        ; No                        ;
; dplus1              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.47 V              ; -0.00704 V          ; 0.325 V                              ; 0.344 V                              ; 5.02e-09 s                  ; 5.44e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.47 V             ; -0.00704 V         ; 0.325 V                             ; 0.344 V                             ; 5.02e-09 s                 ; 5.44e-09 s                 ; No                        ; No                        ;
; dminus1             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; dplus2              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.51 V              ; -0.0513 V           ; 0.246 V                              ; 0.327 V                              ; 8.76e-10 s                  ; 8.99e-10 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.51 V             ; -0.0513 V          ; 0.246 V                             ; 0.327 V                             ; 8.76e-10 s                 ; 8.99e-10 s                 ; No                        ; No                        ;
; dminus2             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.51 V              ; -0.0513 V           ; 0.246 V                              ; 0.327 V                              ; 8.76e-10 s                  ; 8.99e-10 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.51 V             ; -0.0513 V          ; 0.246 V                             ; 0.327 V                             ; 8.76e-10 s                 ; 8.99e-10 s                 ; No                        ; No                        ;
; SDRAM_DQ[0]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[1]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[2]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[3]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.47 V              ; -0.00704 V          ; 0.325 V                              ; 0.344 V                              ; 5.02e-09 s                  ; 5.44e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.47 V             ; -0.00704 V         ; 0.325 V                             ; 0.344 V                             ; 5.02e-09 s                 ; 5.44e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[4]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.47 V              ; -0.00704 V          ; 0.325 V                              ; 0.344 V                              ; 5.02e-09 s                  ; 5.44e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.47 V             ; -0.00704 V         ; 0.325 V                             ; 0.344 V                             ; 5.02e-09 s                 ; 5.44e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[5]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.51 V              ; -0.0513 V           ; 0.246 V                              ; 0.327 V                              ; 8.76e-10 s                  ; 8.99e-10 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.51 V             ; -0.0513 V          ; 0.246 V                             ; 0.327 V                             ; 8.76e-10 s                 ; 8.99e-10 s                 ; No                        ; No                        ;
; SDRAM_DQ[6]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.51 V              ; -0.0513 V           ; 0.246 V                              ; 0.327 V                              ; 8.76e-10 s                  ; 8.99e-10 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.51 V             ; -0.0513 V          ; 0.246 V                             ; 0.327 V                             ; 8.76e-10 s                 ; 8.99e-10 s                 ; No                        ; No                        ;
; SDRAM_DQ[7]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_DQ[8]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[9]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.47 V              ; -0.00704 V          ; 0.325 V                              ; 0.344 V                              ; 5.02e-09 s                  ; 5.44e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.47 V             ; -0.00704 V         ; 0.325 V                             ; 0.344 V                             ; 5.02e-09 s                 ; 5.44e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[10]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[11]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[12]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[13]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.47 V              ; -0.00704 V          ; 0.325 V                              ; 0.344 V                              ; 5.02e-09 s                  ; 5.44e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.47 V             ; -0.00704 V         ; 0.325 V                             ; 0.344 V                             ; 5.02e-09 s                 ; 5.44e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[14]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[15]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; altera_reserved_tdo ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 5.7e-07 V                    ; 3.51 V              ; -0.00915 V          ; 0.24 V                               ; 0.283 V                              ; 8.77e-10 s                  ; 2.48e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 5.7e-07 V                   ; 3.51 V             ; -0.00915 V         ; 0.24 V                              ; 0.283 V                             ; 8.77e-10 s                 ; 2.48e-09 s                 ; No                        ; No                        ;
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Setup Transfers                                                                                                                                                                                             ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
; From Clock                                                                     ; To Clock                                                                       ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 1850     ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 129462   ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 6570     ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 22900483 ; 0        ; 0        ; 0        ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 556      ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 117      ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 224      ; 0        ; 0        ; 0        ;
; altera_reserved_tck                                                            ; altera_reserved_tck                                                            ; 1905     ; 0        ; 35       ; 0        ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 3377     ; 140      ; 1681     ; 10372    ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Hold Transfers                                                                                                                                                                                              ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
; From Clock                                                                     ; To Clock                                                                       ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 1850     ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 129462   ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 6570     ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 22900483 ; 0        ; 0        ; 0        ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 556      ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 117      ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 224      ; 0        ; 0        ; 0        ;
; altera_reserved_tck                                                            ; altera_reserved_tck                                                            ; 1905     ; 0        ; 35       ; 0        ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 3377     ; 140      ; 1681     ; 10372    ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Recovery Transfers                                                                                                                                                                                          ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
; From Clock                                                                     ; To Clock                                                                       ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 146      ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 522      ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 1754     ; 0        ; 0        ; 0        ;
; altera_reserved_tck                                                            ; altera_reserved_tck                                                            ; 88       ; 0        ; 1        ; 0        ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 62       ; 0        ; 0        ; 0        ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Removal Transfers                                                                                                                                                                                           ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
; From Clock                                                                     ; To Clock                                                                       ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 146      ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 522      ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 1754     ; 0        ; 0        ; 0        ;
; altera_reserved_tck                                                            ; altera_reserved_tck                                                            ; 88       ; 0        ; 1        ; 0        ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                           ; 62       ; 0        ; 0        ; 0        ;
+--------------------------------------------------------------------------------+--------------------------------------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


---------------
; Report TCCS ;
---------------
No dedicated SERDES Transmitter circuitry present in device or used in design


---------------
; Report RSKM ;
---------------
No dedicated SERDES Receiver circuitry present in device or used in design


+------------------------------------------------+
; Unconstrained Paths                            ;
+---------------------------------+-------+------+
; Property                        ; Setup ; Hold ;
+---------------------------------+-------+------+
; Illegal Clocks                  ; 0     ; 0    ;
; Unconstrained Clocks            ; 3     ; 3    ;
; Unconstrained Input Ports       ; 23    ; 23   ;
; Unconstrained Input Port Paths  ; 88    ; 88   ;
; Unconstrained Output Ports      ; 55    ; 55   ;
; Unconstrained Output Port Paths ; 76    ; 76   ;
+---------------------------------+-------+------+


+------------------------------------+
; TimeQuest Timing Analyzer Messages ;
+------------------------------------+
Info: *******************************************************************
Info: Running Quartus II 32-bit TimeQuest Timing Analyzer
    Info: Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
    Info: Processing started: Sat Nov  1 14:21:48 2014
Info: Command: quartus_sta atari800core -c atari800core
Info: qsta_default_script.tcl version: #1
Info (11104): Parallel Compilation has detected 4 hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use 2 of the 2 physical processors detected instead.
Info (21077): Low junction temperature is 0 degrees C
Info (21077): High junction temperature is 85 degrees C
Warning (335093): TimeQuest Timing Analyzer is analyzing 6 combinational loops as latches.
Info (332164): Evaluating HDL-embedded SDC commands
    Info (332165): Entity sld_jtag_hub
        Info (332166): create_clock -name altera_reserved_tck [get_ports {altera_reserved_tck}] -period 10MHz   
        Info (332166): set_clock_groups -asynchronous -group {altera_reserved_tck}
Info (332104): Reading SDC File: 'atari800core.sdc'
Info (332110): Deriving PLL clocks
    Info (332110): create_generated_clock -source {mcc_pll3|altpll_component|auto_generated|pll1|inclk[0]} -multiply_by 3 -duty_cycle 50.00 -name {mcc_pll3|altpll_component|auto_generated|pll1|clk[0]} {mcc_pll3|altpll_component|auto_generated|pll1|clk[0]}
    Info (332110): create_generated_clock -source {mcc_pll3|altpll_component|auto_generated|pll1|inclk[0]} -divide_by 11 -multiply_by 63 -duty_cycle 50.00 -name {mcc_pll3|altpll_component|auto_generated|pll1|clk[1]} {mcc_pll3|altpll_component|auto_generated|pll1|clk[1]}
    Info (332110): create_generated_clock -source {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]} -multiply_by 3 -duty_cycle 50.00 -name {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]} {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]}
    Info (332110): create_generated_clock -source {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]} -duty_cycle 50.00 -name {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]} {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]}
    Info (332110): create_generated_clock -source {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]} -multiply_by 3 -phase 236.25 -duty_cycle 50.00 -name {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]} {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]}
    Info (332110): create_generated_clock -source {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]} -multiply_by 4 -duty_cycle 50.00 -name {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]} {\gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]}
Info (332151): Clock uncertainty is not calculated until you update the timing netlist.
Warning (332060): Node: reset_usbdrv was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|reg_10bits[4] was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[4] was determined to be a clock but was found without an associated clock assignment.
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
Info: Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON
Info: Analyzing Slow 1200mV 85C Model
Critical Warning (332148): Timing requirements not met
    Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer.
Info (332146): Worst-case setup slack is -3.966
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    -3.966      -336.645 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    -0.499        -1.262 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     4.171         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
    Info (332119):    26.002         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    45.803         0.000 altera_reserved_tck 
Info (332146): Worst-case hold slack is 0.339
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.339         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.352         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
    Info (332119):     0.412         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     0.413         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     0.414         0.000 altera_reserved_tck 
Info (332146): Worst-case recovery slack is 6.778
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     6.778         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     7.369         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    48.242         0.000 altera_reserved_tck 
    Info (332119):    63.099         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case removal slack is 0.220
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.220         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     1.401         0.000 altera_reserved_tck 
    Info (332119):     1.423         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     2.938         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case minimum pulse width slack is 4.091
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.091         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
    Info (332119):     5.547         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    17.176         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    17.427         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    33.012         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    49.483         0.000 altera_reserved_tck 
    Info (332119):    99.796         0.000 FPGA_CLK 
Info: Analyzing Slow 1200mV 0C Model
Info (334003): Started post-fitting delay annotation
Info (334004): Delay annotation completed successfully
Warning (332060): Node: reset_usbdrv was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|reg_10bits[4] was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[4] was determined to be a clock but was found without an associated clock assignment.
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
Critical Warning (332148): Timing requirements not met
    Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer.
Info (332146): Worst-case setup slack is -3.268
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    -3.268      -269.012 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.419         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     4.575         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
    Info (332119):    26.557         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    46.239         0.000 altera_reserved_tck 
Info (332146): Worst-case hold slack is 0.327
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.327         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
    Info (332119):     0.347         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.362         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     0.363         0.000 altera_reserved_tck 
    Info (332119):     0.363         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case recovery slack is 7.228
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     7.228         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     7.764         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    48.511         0.000 altera_reserved_tck 
    Info (332119):    63.461         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case removal slack is 0.180
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.180         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     1.287         0.000 altera_reserved_tck 
    Info (332119):     1.289         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     2.616         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case minimum pulse width slack is 4.091
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.091         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
    Info (332119):     5.545         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    17.162         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    17.424         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    32.951         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    49.400         0.000 altera_reserved_tck 
    Info (332119):    99.779         0.000 FPGA_CLK 
Info: Analyzing Fast 1200mV 0C Model
Warning (332060): Node: reset_usbdrv was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|reg_10bits[4] was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[4] was determined to be a clock but was found without an associated clock assignment.
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
Critical Warning (332148): Timing requirements not met
    Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer.
Info (332146): Worst-case setup slack is -0.370
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    -0.370        -2.772 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     5.541         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     6.496         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
    Info (332119):    29.768         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    48.247         0.000 altera_reserved_tck 
Info (332146): Worst-case hold slack is 0.131
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.131         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     0.136         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.137         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
    Info (332119):     0.187         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     0.187         0.000 altera_reserved_tck 
Info (332146): Worst-case recovery slack is 9.087
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     9.087         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     9.444         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    49.446         0.000 altera_reserved_tck 
    Info (332119):    64.805         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case removal slack is 0.120
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.120         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     0.671         0.000 altera_reserved_tck 
    Info (332119):     0.683         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     1.453         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case minimum pulse width slack is 4.152
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.152         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
    Info (332119):     5.606         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    17.205         0.000 \gen_real_pll:gen_tv_ntsc:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    17.437         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    33.039         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    49.296         0.000 altera_reserved_tck 
    Info (332119):    99.418         0.000 FPGA_CLK 
Info (332102): Design is not fully constrained for setup requirements
Info (332102): Design is not fully constrained for hold requirements
Info: Quartus II 32-bit TimeQuest Timing Analyzer was successful. 0 errors, 13 warnings
    Info: Peak virtual memory: 535 megabytes
    Info: Processing ended: Sat Nov  1 14:22:43 2014
    Info: Elapsed time: 00:00:55
    Info: Total CPU time (on all processors): 00:00:36


